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* Blackfin: bfin_spi: round up clock dividerCliff Cai2010-01-17-1/+6
| | | | | | | | If the requested clock cannot be exactly obtained, round it up so that we err on the side of slightly slower rather than slightly faster. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: bfin_spi: let boards control idle valueCliff Cai2010-01-17-1/+5
| | | | | | | Some SPI devices like to see high idle values rather than low. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: spi: fix pin handling of SPI0 SSEL4Mike Frysinger2009-05-29-1/+1
| | | | | | | CS4 on SPI0 has a dedicated PH8 pin which needs to be enabled as a peripheral in order to work. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: spi: make cs deassert function deterministicTodor I Mollov2009-04-06-1/+15
| | | | | | | | | | | | | | | | | | | | | | Blackfin SPI driver was not driving the SPI chip-select high before putting the chip-select signals into tri-state mode. This is probably something that slipped by unnoticed in most designs. If the signals are put directly into a tri-state mode, then the board is relying on the pull-up resistors to pull up the chip-select before the next transaction. Most of the time this is fine, except when you have two transactions that follow each other very closely, such as the flash erase and read status register commands. In this case I was seeing a 500ns separation between the transactions. In my setup, with a 10kOhm pull-up, it would meet timing spec about half the time and resulted in intermittent errors. (A stronger pull up would fix this, but our design is targeted for low power consumption and a 3.3kOhm @ 3.3v is 3.3mW of needless power consumption.) I modified the spi_cs_deactivate() function in bfin_spi.c to drive the chip-selects high before putting them into tri-state. For me, this resulted in a rise time of 5ns instead of the previous rise time of about 1us, and fully satisfied the timing spec of the chip. Signed-off-by: Todor I Mollov <tmollov@ucsd.edu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add BF538/BF539 SPI portmux handlingMike Frysinger2009-04-02-0/+18
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: spi: there is no PORTJ_FER MMR on BF537Sonic Zhang2009-03-23-5/+3
| | | | | | | | Since the PORTJ on the BF537 is peripheral-only (no GPIO functionality), then there is no PORTJ_FER register for us to worry about. Signed-off-by: Sonic Zhang <Sonic.Zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add driver for on-chip SPI controllerMike Frysinger2009-02-02-0/+343
This fills out the SPI backend for the Blackfin on-chip SPI peripheral. Signed-off-by: Mike Frysinger <vapier@gentoo.org>