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* Merge git://git.denx.de/u-boot-rockchipTom Rini2015-09-03-0/+53
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| * rockchip: Add serial supportSimon Glass2015-09-02-0/+53
| | | | | | | | | | | | | | Add support for the Rockchip serial device using the ns16550 driver. This uses driver model and device tree for both SPL and U-Boot proper. Signed-off-by: Simon Glass <sjg@chromium.org>
* | serial: drop redundant depends onMasahiro Yamada2015-09-02-2/+2
|/ | | | | | | | | | | | SANDBOX_SERIAL depends on SANDBOX, and SANDBOX selects DM. So, "SANDBOX_SERIAL depends on DM" is redundant. Likewise, UNIPHIER_SERIAL depends on ARCH_UNIPHIER, and ARCH_UNIPHIER selects DM_SERIAL. So, "UNIPHIER_SERIAL depends on DM_SERIAL" is redundant. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: Use dev_get_addr() where possibleSimon Glass2015-08-31-5/+4
| | | | | | | | | | This is a convenient way for a driver to get the hardware address of a device, when regmap or syscon are not being used. Change existing callers to use it as an example to others. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* serial: uniphier: drop platform data supportMasahiro Yamada2015-08-31-26/+15
| | | | | | | | | | This driver is enabled only for UniPhier SoCs and ARCH_UNIPHIER now selects OF_CONTROL and SPL_OF_CONTROL. This driver no longer needs to support platform data configuration. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* serial: pxa: clean-up include file orderMarcel Ziswiler2015-08-24-2/+2
| | | | | | | Cleaning up order of include files by sorting them alphabetically keeping in mind to leave common.h on top. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* of: clean up OF_CONTROL ifdef conditionalsMasahiro Yamada2015-08-18-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* dra7xx: Add dra72_evm_defconfig using CONFIG_DMTom Rini2015-08-12-0/+1
| | | | | | | | | | - Import various DT files for DRA7 / DR72x / dra72-evm from Linux Kernel v4.1 - Add config file for this board, enable DM and DM_GPIO Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* drivers: hierarchize drivers Kconfig menuMasahiro Yamada2015-08-12-0/+8
| | | | | | | | | | | The menuconfig for drivers are getting more and more cluttered and unreadable because too many entries are displayed in a single flat menu. Use hierarchic menu for each category. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Update to apply again in a few places, drop USB hunk] Signed-off-by: Tom Rini <trini@konsulko.com>
* dm: serial: Add a REQUIRE_SERIAL_CONSOLE option for boards with no serial portHans de Goede2015-08-10-3/+28
| | | | | | | | | | | | | | | | | | | | Currently the serial code assumes that there is always at least one serial port (and panics / crashes due to null pointer dereferences when there is none). This makes it impossible to use u-boot on boards where there is no (debug) serial port, because e.g. all uart pins are muxed to another function. This commit adds a CONFIG_REQUIRE_SERIAL_CONSOLE Kconfig option, which defaults to y (preserving existing behavior), which can be set to n on such boards to make them work. This commit only implements this for CONFIG_DM_SERIAL=y configs, as allowing running without a serial port for CONFIG_DM_SERIAL=n configs is non trivial, and is not necessary at this moment. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Simon Glass <sjg@chromium.org>
* exynos: Enable the debug UART in SPLSimon Glass2015-08-05-0/+2
| | | | | | | | As a debugging aid, allow UART3 to be used as a debug UART in SPL. This is a precursor to proper UART support, which requires a substantial refactor. Signed-off-by: Simon Glass <sjg@chromium.org>
* exynos: Add debug UART support for Samsung S5P serialSimon Glass2015-08-05-0/+32
| | | | | | | Add a debug UART implementation for this serial driver. It does not set up pinmux automatically - this must be done before calling debug_uart_init(). Signed-off-by: Simon Glass <sjg@chromium.org>
* exynos: serial: Refactor init code for debug UARTSimon Glass2015-08-05-12/+24
| | | | | | | | | The debug UART code needs to perform the same init as the normal UART driver. In preparation for this, move the init code into two functions, one for the basic init and one for setting the baud rate. This will make adding debug UART support easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* efi: Add a serial driverSimon Glass2015-08-05-0/+167
| | | | | | | | | Add a serial driver which makes use of EFI's console in/out service. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested on Intel Crown Bay and QEMU Tested-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Move CONFIG_X86_SERIAL to KconfigSimon Glass2015-08-05-0/+10
| | | | | | | Move this config option to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: serial: Correct logic in serial_find_console_or_panic()Simon Glass2015-08-05-1/+1
| | | | | | | | | | | | | In a final attempt to find a console UART this function uses the first first available serial device. However the check for a valid device is inverted. This code is only executed when there is in fact no serial UART, but at present it can fail to reach the panic_str() call in this case, and start trying to use a non-existent UART. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* ns16550: Improve debug UART so it can work with 32-bit accessSimon Glass2015-07-21-15/+21
| | | | | | | Since Rockchip requires 32-bit serial access, add this to the driver. Refactor a little to make this easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: dcc: Add uart dcc support for armv8Siva Durga Prasad Paladugu2015-07-07-0/+16
| | | | | | | | Added UART DCC support for armv8 Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* sandbox: Move CONFIG_SANDBOX_SERIAL to KconfigSimon Glass2015-06-10-2/+23
| | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: serial: Don't support CONFIG_CONS_INDEX with device treeSimon Glass2015-06-10-32/+37
| | | | | | | | This feature should be deprecated for new boards, and significantly adds to SPL code size. Drop it. Instead, we can use stdout-path in the /chosen node. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: ns16550: Support CONFIG_SYS_NS16550_MEM32 with driver modelSimon Glass2015-06-10-0/+4
| | | | | | | | This option is used by some boards, so support it with driver model. This is really ugly - we should rewrite this driver once all users are moved to driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* ARM: UniPhier: update the vendor name of UniPhier in KconfigMasahiro Yamada2015-05-31-2/+3
| | | | | | | | | The business for UniPhier Soc family has been transferred from Panasonic Corporation to Socionext Inc. Update the SoC select menu in Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: UniPhier: replace <asm/io.h> with <linux/io.h>Masahiro Yamada2015-05-31-4/+2
| | | | | | | In the Linux coding style, it is recommended to include <linux/io.h> rather than <asm/io.h>. Follow this trend. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Revert "Revert "stm32f4: fix serial output""Tom Rini2015-05-27-0/+3
| | | | | | | | | | Due to a misunderstanding, in 698a12b we reverted changes that we in fact wanted to keep. So lets fix that mistake and bring the code back to how it should have been. This reverts commit 698a12bef9e782dcd99c555a739c16eec8669f14. Signed-off-by: Tom Rini <trini@konsulko.com>
* Revert "stm32f4: fix serial output"Tom Rini2015-05-10-3/+0
| | | | | | | | | As per the author, we don't need this patch really since the other patch "stm32f4: fix serial output" superseded it. This reverts commit 85e5f5b7a7f8d889271f94791606cde62d81d53f. Signed-off-by: Tom Rini <trini@konsulko.com>
* serial: fdt: add device tree support for pl01xVikas Manocha2015-05-10-1/+29
| | | | | | | This patch adds device tree support for arm pl010/pl011 driver. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Acked-by: Simon Glass <sjg@chromium.org>
* stm32f4: add serial print portkunhuahuang2015-05-10-12/+59
| | | | | | | | | | | | Add the stm32F4 board's serial ports support. User can use it easily. The user only need to edit the number of the usart. The patch also fix the serial print out. Last, this version of patch fix the first patch checkpatch.pl error. Thanks to Kamil Lulko. Signed-off-by: kunhuahuang <huangkunhua@gmail.com>
* stm32f4: fix serial outputkunhuahuang2015-05-10-0/+4
| | | | | | | | | This patch fix the serial output. The source is from Kamil Lulko's "stm32f429-discovery board support" Thanks, Varcain. I learned a lot. Signed-off-by: kunhuahuang <huangkunhua@gmail.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2015-05-05-21/+173
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| * Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-04-29-1/+7
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| | * serial: zynq: Add support for slow emulation platformMichal Simek2015-04-29-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | On slow platforms not all baudrate setting is valid. Check it directly in the driver and setup maximum possible frequency. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | serial: ns16550: Remove hard-coded baud_divisor settingAxel Lin2015-04-28-1/+0
| |/ | | | | | | | | | | | | | | | | This was accidentally added by commit dd0b0122bacc "serial: ns16550: Add an option to specify the debug UART register shift". Remove it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Simon Glass <sjg@chromium.org>
| * Merge branch 'master' of git://git.denx.de/u-boot-dmTom Rini2015-04-23-16/+32
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| | * dm: Add a panic_str() function to reduce code sizeSimon Glass2015-04-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The printf() in panic() adds about 1.5KB of code size to SPL when compiled with Thumb-2. Provide a smaller version that does not support printf()-style arguments and use it in two commonly compiled places. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * serial: ns16550: Remove unnecessary init on UART setupSimon Glass2015-04-22-1/+0
| | | | | | | | | | | | | | | | | | | | | It is not necessary to write a zero baud rate to the device, and for some chips this will cause problems. Drop this code. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * dm: ns16550: Support non-byte register spacing with driver modelSimon Glass2015-04-22-4/+6
| | | | | | | | | | | | | | | | | | | | | Allow this driver to support boards where the register shift is not 0. This fixes some compiler warnings which appear in that case. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * serial: ns16550: Add an option to specify the debug UART register shiftSimon Glass2015-04-22-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | This UART permits different register spacing. To support the debug UART on devices which have a spacing other than 1 byte, allow the shift value to be specified. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | stm32f4: Add serial driverrev13@wp.pl2015-04-22-0/+120
| |/ | | | | | | | | Signed-off-by: Kamil Lulko <rev13@wp.pl> Reviewed-by: Tom Rini <trini@konsulko.com>
| * serial: pl01x: fix PL010 regressionLinus Walleij2015-04-21-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit aed2fbef5e9a0ab5a7cd01e742039a962f0b24ef "dm: serial: Tidy up the pl01x driver" caused a regression on (real hardware) PL010 by omitting to update the line control register when switching baudrate. Fix this by inlining the missing write to the baud control register. Also renaming the set_line_control() function to pl011_set_line_control() since this function is clearly PL011-specific, and it won't suffice to call that to set up line control. Tested on the Integrator/AP hardware. Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * common: Make sure arch-specific map_sysmem() is definedJoe Hershberger2015-04-18-0/+2
| | | | | | | | | | | | | | | | | | | | | | In the case where the arch defines a custom map_sysmem(), make sure that including just mapmem.h is sufficient to have these functions as they are when the arch does not override it. Also split the non-arch specific functions out of common.h Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: core: Add dev_get_uclass_priv() to access uclass private dataSimon Glass2015-04-16-2/+2
| | | | | | | | | | | | | | | | Add a convenience function to access the private data that a uclass stores for each of its devices. Convert over most existing uses for consistency and to provide an example for others. Signed-off-by: Simon Glass <sjg@chromium.org>
* | fix ARM DCC support for ARMv7 based cores (e.g. CortexA)Alexander Merkle2015-04-16-2/+2
|/ | | | Signed-off-by: Alexander Merkle <alexander.merkle@lauterbach.com>
* serial-arc: switch to DMAlexey Brodkin2015-04-03-32/+70
| | | | | | | | Now when all infrastructure in ARC is ready for it let's switch ARC UART to driver model. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Simon Glass <sjg@chromium.org>
* serial/serial_arc: set registers address during compilationAlexey Brodkin2015-04-03-2/+1
| | | | | | | | | | Being global variable with 0 value it falls into .bss area which we may only use after relocation to RAM. And right afetr relocation we zero .bss - effectively cleaing register address set for early console. Now with pre-set value "regs" variable is no longer in .bss and this way safely survives relocation. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* dm: serial: remove bogus include <ns16550.h>Masahiro Yamada2015-03-25-2/+0
| | | | | | | | | | | Serial-uclass should be generically implemented without depending a particular hardware. Fortunately, nothing in include/ns16550.h is referenced from drivers/serial/serial-uclass.c, so remove this bogus include. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: UniPhier: adjust device trees for business transferMasahiro Yamada2015-03-15-3/+4
| | | | | | | Panasonic's System LSI products, UniPhier SoC family, have been transferred to Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* serial: ns16550: Fix build error due to a typoAxel Lin2015-03-02-1/+1
| | | | | | | Fix trivial typo. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Axel Lin <axel.lin@ingics.com>
* Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2015-03-01-32/+32
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| * serial: UniPhier: move LCR register setting to probe functionMasahiro Yamada2015-03-01-9/+11
| | | | | | | | | | | | | | We do not have to set the LCR register every time we change the baud-rate. We just need to set it up once in the probe function. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * serial: UniPhier: use 32 bit register accessMasahiro Yamada2015-03-01-28/+26
| | | | | | | | | | | | | | | | For PH1-Pro4, the 8 bit write access to LCR register (offset = 0x11) is not working correctly. As a side effect, it also modifies MCR register (offset = 0x10) and results in unexpected behavior. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
generated by cgit v1.1 at 2024-12-26 22:27:04 +0000