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* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-14/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* ppc: Move CONFIG_QE to arch_global_dataSimon Glass2013-02-04-9/+10
| | | | | | Move the quantative easing fields into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move brg_clk to arch_global_dataSimon Glass2013-02-01-1/+1
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* mpc83xx: add support for mpc8309Gerlando Falauto2012-10-23-9/+12
| | | | | | | | | This processor, though very similar to other members of the PowerQUICC II Pro family (namely 8308, 8360 and 832x), provides yet another feature set than any supported sibling. Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* powerpc/85xx: clean up and document the QE/FMAN microcode macrosTimur Tabi2011-11-29-2/+2
| | | | | | | | | | | | | | | | | | | | Several macros are used to identify and locate the microcode binary image that U-boot needs to upload to the QE or Fman. Both the QE and the Fman use the QE Firmware binary format to package their respective microcode data, which is why the same macros are used for both. A given SOC will only have a QE or an Fman, so this is safe. Unfortunately, the current macro definition and usage has inconsistencies. For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address of NAND. There's no way to know by looking at a variable how it's supposed to be used. In the future, the code which uploads QE firmware and Fman firmware will be merged. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* cmd_usage(): simplify return code handlingWolfgang Denk2010-07-24-6/+3
| | | | | | | | | | | | | | | | Lots of code use this construct: cmd_usage(cmdtp); return 1; Change cmd_usage() let it return 1 - then we can replace all these ocurrances by return cmd_usage(cmdtp); This fixes a few places with incorrect return code handling, too. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Make sure that argv[] argument pointers are not modified.Wolfgang Denk2010-07-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hush shell dynamically allocates (and re-allocates) memory for the argument strings in the "char *argv[]" argument vector passed to commands. Any code that modifies these pointers will cause serious corruption of the malloc data structures and crash U-Boot, so make sure the compiler can check that no such modifications are being done by changing the code into "char * const argv[]". This modification is the result of debugging a strange crash caused after adding a new command, which used the following argument processing code which has been working perfectly fine in all Unix systems since version 6 - but not so in U-Boot: int main (int argc, char **argv) { while (--argc > 0 && **++argv == '-') { /* ====> */ while (*++*argv) { switch (**argv) { case 'd': debug++; break; ... default: usage (); } } } ... } The line marked "====>" will corrupt the malloc data structures and usually cause U-Boot to crash when the next command gets executed by the shell. With the modification, the compiler will prevent this with an error: increment of read-only location '*argv' N.B.: The code above can be trivially rewritten like this: while (--argc > 0 && **++argv == '-') { char *arg = *argv; while (*++arg) { switch (*arg) { ... Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* drivers/qe: Add more SNUM number for QEHaiying Wang2009-06-12-3/+12
| | | | | | | | | Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII- 1000 mode. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* drivers/qe: Change QE RISC ALLOCATION to support 4 RISCsHaiying Wang2009-06-12-3/+0
| | | | | | | | | Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and define MAX_QE_RISC for QE based silicons. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* General help message cleanupWolfgang Denk2009-06-12-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many of the help messages were not really helpful; for example, many commands that take no arguments would not print a correct synopsis line, but "No additional help available." which is not exactly wrong, but not helpful either. Commit ``Make "usage" messages more helpful.'' changed this partially. But it also became clear that lots of "Usage" and "Help" messages (fields "usage" and "help" in struct cmd_tbl_s respective) were actually redundant. This patch cleans this up - for example: Before: => help dtt dtt - Digital Thermometer and Thermostat Usage: dtt - Read temperature from digital thermometer and thermostat. After: => help dtt dtt - Read temperature from Digital Thermometer and Thermostat Usage: dtt Signed-off-by: Wolfgang Denk <wd@denx.de>
* Update CHANGELOG, coding style cleanup.Wolfgang Denk2009-04-05-5/+6
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* MPC85xx: Load and enable QE microcode patch in IRAMHaiying Wang2009-03-30-0/+9
| | | | | | | | For the silicon which doesn't have ROM support in QE, it always needs to load a pre-built ucode binary to IRAM so that QE can work. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com>
* Command usage cleanupPeter Tyser2009-01-28-1/+1
| | | | | | | | Remove command name from all command "usage" fields and update common/command.c to display "name - usage" instead of just "usage". Also remove newlines from command usage fields. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Standardize command usage messages with cmd_usage()Peter Tyser2009-01-28-2/+2
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* drivers/qe: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-08-13-3/+0
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* fix QE firmware uploading limitTimur Tabi2008-03-03-1/+1
| | | | | | | Fix a typo in qe_upload_firmware() that prevented uploading firmware on systems with more than one RISC core. Signed-off-by: Timur Tabi <timur@freescale.com>
* QE: fix compile warningDave Liu2008-01-14-1/+1
| | | | | | | | | qe.c: In function 'qe_upload_firmware': qe.c:390: warning: pointer targets in passing argument 2 uec.c: In function 'uec_initialize': uec.c:1236: warning: 'uec_info' may be used uninitialized Signed-off-by: Dave Liu <daveliu@freescale.com>
* Coding Style cleanup; update CHANGELOGWolfgang Denk2008-01-10-9/+9
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* 85xx: add ability to upload QE firmwareTimur Tabi2008-01-09-0/+219
| | | | | | | | | | | Define the layout of a binary blob that contains a QE firmware and instructions on how to upload it. Add function qe_upload_firmware() to parse the blob and perform the actual upload. Add command-line command "qe fw" to take a firmware blob in memory and upload it. Update ft_cpu_setup() on 85xx to create the 'firmware' device tree node if U-Boot has uploaded a firmware. Fully define 'struct rsp' in immap_qe.h to include the actual RISC Special Registers. Signed-off-by: Timur Tabi <timur@freescale.com>
* Fix cases where DECLARE_GLOBAL_DATA_PTR was not declared as globalWolfgang Denk2007-09-15-5/+2
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* mpc83xx: Fix the align bug of SDMA bufferDave Liu2007-08-10-1/+1
| | | | | | | | According to the latest user manual, the SDMA temporary buffer base address must be 4KB aligned. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc83xx: add QE ethernet supportDave Liu2006-11-03-0/+254
this patch adds support for the QUICC Engine based UCC gigabit ethernet device.