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Passing bars_num=0 to pciauto_setup_device should assign no bars.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Acked-by: Andy Fleming <afleming@freescale.com>
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PCI_CLASS_PROCESSOR_POWERPC.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
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The P2P bridge bus numbers programmed into the device are relative to
hose->first_busno.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
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- Make pciauto_{pre,post}scan_setup_bridge non-static
- Added physical address display in debug messages.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
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If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
core complains and IDE drivers fails to work. Also, assigning zero to a BAR
was illegal according to PCI 2.1 (the later revisions seem to have excluded the
sentence about "0" being considered an invalid address) -- so, use a reasonable
starting value of 0x1000 (that's what the most Linux archs are using).
Alternatively, one might have fixed the calls to pci_set_region() individually
(some code even seems to have taken care of this issue) but that would have
been a lot more work. :-)
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Stefan Roese <sr@denx.de>
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Conflicts:
include/ft_build.h
include/pci.h
Resolved, though.
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of the prefetch region to 0 Patch by Andy Fleming on 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
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During the pci scan process, Some devices return bar_reponse with the
highest bytes 0, such as the pci bridge in uli1575 return bar_response
with 0xffffff, So the bar_size should be manually set under 64K.
Signed-off-by: Jason Jin <jason.jin@freescale.com>
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If a host controller sets up a region as prefetchable and
a device's BAR denotes it as prefetchable, allocate the
BAR into the prefetch region.
If a BAR is prefetchable and no prefetchable region has
been setup by the controller we fall back to allocating
the BAR into the normally memory region.
Patch by Kumar Gala 11 Jan 2006
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o 440GX:
- Fix PCI Indirect access for type 1 config cycles with ppc440.
- Add phymode for 440 enet
- fix pci pre init
o XPedite1K:
- Change board_pre_init to board_early_init_f
- Add user flash to bus controller setup
- Fix pci pre init
- Fix is_pci_host to check GPIO for monarch bit
- Force xpedite1k to pci conventional mode (via #define option)
* Patch by Brad Kemp, 4 Feb 2004:
- handle the machine check that is generated during the PCI scans
on 82xx processors.
- define the registers used in the IMMR by the PCI subsystem.
* Patch by Pierre Aubert, 03 Feb 2004:
cpu/mpc5xxx/start.S: copy MBAR into SPR311
* Patch by Jeff Angielski, 03 Feb 2004:
Fix copy & paste error in cpu/mpc8260/pci.c
* Patch by Reinhard Meyer, 24 Jan 2004:
Fix typo in cpu/mpc5xxx/pci_mpc5200.c
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- Changed the incorrect FAT12BUFSIZE
- data_begin in fsdata can be negative. Changed it to be short.
* Code cleanup
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Allow bzip2 compression for small memory footprint boards
* Patch by Brad Kemp, 21 Jan 2004:
Add support for CFI flash driver for both the Intel and the AMD
command sets.
* Patch by Travis Sawyer, 20 Jan 2004:
Fix pci bridge auto enumeration of sibling p2p bridges.
* Patch by Tolunay Orkun, 12 Jan 2004:
Add some delays as needed for Intel LXT971A PHY support
* Patches by Stephan Linz, 09 Jan 2004:
- avoid warning: unused variable `piop' in board/altera/common/sevenseg.c
- make DK1C20 board configuration related to ASMI conform to
documentation
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allow selection of clock frequency as "make" target
* Implement memory autosizing code for IceCube boards
* Configure network port on INCA-IP for autonegotiation
* Fix overflow problem in network timeout code
* Patch by Richard Woodruff, 8 Aug 2003:
Allow crc32 to be used at address 0x000 (crc32_no_comp, too).
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- remove trailing white space, trailing empty lines, C++ comments, etc.
- split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
* Patches by Kenneth Johansson, 25 Jun 2003:
- major rework of command structure
(work done mostly by Michal Cendrowski and Joakim Kristiansen)
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- minimal setup for CardBus bridges
- add EEPROM read/write support in the CS8900 driver
- add support for the builtin I2C controller in the Samsung s3c24x0 chips
- add support for MPL's VCMA9 (Samsung s3c2410 based) board
* Patch by Steven Scholz, 04 Feb 2003:
add support for RTC DS1307
* Patch by Reinhard Meyer, 5 Feb 2003:
fix PLPRCR/SCCR init sequence on 8xx to allow for
changes of EBDF by software
* Patch by Vladimir Gurevich, 07 Feb 2003:
"API-compatibility patch" for 4xx I2C driver
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Add support for Motorola MPC8266ADS board
* Patch by Kyle Harris, 19 Feb 2003:
patches for the Intel lubbock board:
memsetup.S - general cleanup (based on Robert's csb226 code)
flash.c - overhaul, actually works now
lubbock.c - fix init funcs to return proper value
* Patch by Kenneth Johansson, 26 Feb 2003:
- Fixed off by one in RFTA calculation.
- No need to abort when LDF is lower than we can program it's only
minimum timing so clamp it to what we can do.
- Takes function pointer to function for reading the spd_nvram. Usefull
for faking data or hardcode a module without the nvram.
- fix other user for above change
- fix some comments.
* Patches by Brian Waite, 26 Feb 2003:
- fix port for evb64260 board
- fix PCI for evb64260 board
- fix PCI scan
* Patch by Reinhard Meyer, 1 Mar 2003:
Add support for EMK TOP860 Module
* Patch by Yuli Barcohen, 02 Mar 2003:
Add SPD EEPROM support for MPC8260ADS board
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Add code for AmigaOne board
(preliminary merge to U-Boot, still WIP)
* Patch by Jon Diekema, 12 Nov 2002:
- Adding URL for IEEE OUI lookup
- Making the autoboot #defines dependent on CONFIG_AUTOBOOT_KEYED
being defined.
- In the CONFIG_EXTRA_ENV_SETTINGS #define, the root-on-initrd and
root-on-nfs macros are designed to switch how the default boot
method gets defined.
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