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* pcie/layerscape: fix bug in bus number computation when setting msi-mapBogdan Purcareata2016-06-03-3/+6
| | | | | | | | | | | | | | | When multiple PCI cards are present in an ls2080a board, the second card does not get its msi-map set up properly due to a bug in computing the bus number. The bus number returned by PCI_BDF() is not the actual PCI bus number, but instead represents a global u-boot PCI bus number. A given bus number is relative to hose->first_busno, so that has to be subtracted from the PCI device id. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Acked-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* pci: Drop CONFIG_SYS_SCSI_SCAN_BUS_REVERSESimon Glass2016-05-17-4/+0
| | | | | | | This option is not used by any board. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: tegra: fix DM conversion issues on Tegra20Stephen Warren2016-05-04-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra20's PCIe controller has a couple of quirks. There are workarounds in the driver for these, but they don't work after the DM conversion: 1) The PCI_CLASS value is wrong in HW. This is worked around in pci_tegra_read_config() by patching up the value read from that register. Pre-DM, the PCIe core always read this via a 16-bit access to the 16-bit offset 0xa. With DM, 32-bit accesses are used, so we need to check for offset 0x8 instead. Mask the offset value back to 32-bit alignment to make this work in all cases. 2) Accessing devices other than dev 1 causes a data abort. Pre-DM, this was worked around in pci_skip_dev(), which the PCIe core code called during enumeration while iterating over a bus. The DM PCIe core doesn't use this function. Instead, enhance tegra_pcie_conf_address() to validate the bdf being accessed, and refuse to access invalid devices. Since pci_skip_dev() isn't used, delete it. I've also validated that both these WARs are only needed for Tegra20, by testing on Tegra30/Cardhu and Tegra124/Jetson TKx. So, compile them in conditionally. Fixes: e81ca88451cf ("dm: tegra: pci: Convert tegra boards to driver model for PCI") Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* pci: Device scanning range fixYoshinori Sato2016-04-25-1/+1
| | | | | | | | The terminal condition in the area where a PCI device is scanned is wrong, and 1f.7 isn't scanned. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci/layerscape: set LUT and msi-map for discovered PCI devicesStuart Yoder2016-03-21-0/+147
| | | | | | | | | | | | | | | | | | msi-map properties are used to tell an OS how PCI requester IDs are mapped to ARM SMMU stream IDs. for all PCI devices discovered in a system: -allocate a LUT (look-up-table) entry in that PCI controller -allocate a stream ID for the device -program and enable a LUT entry (maps PCI requester id to stream ID) -set the msi-map property on the controller reflecting the LUT mapping basic bus scanning loop/logic was taken from drivers/pci/pci.c pci_hose_scan_bus(). Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls2080a: remove obsolete stream ID partitioning supportStuart Yoder2016-03-21-70/+0
| | | | | | | | | | Remove stream ID partitioning support that has been made obsolete by upstream device tree bindings that specify how representing how PCI requester IDs are mapped to MSI specifiers and SMMU stream IDs. Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* pci: Correct a few comments and nitsSimon Glass2016-03-17-1/+0
| | | | | | | | Two comments are missing a parameter and there is an extra blank line. Also two of the region access macros are misnamed. Correct these problems. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: Add functions to update PCI configuration registersSimon Glass2016-03-17-0/+57
| | | | | | | | | It is common to read a config register value, clear and set some bits, then write back the updated value. Add functions to do this in one step, for convenience. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Break out the common region display codeSimon Glass2016-03-14-34/+17
| | | | | | | | Each region is displayed in almost the same way. Break out this common code into its own function. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* dm: Use uclass_first_device_err() where it is usefulSimon Glass2016-03-14-3/+1
| | | | | | Use this new function in places where it simplifies the code. Signed-off-by: Simon Glass <sjg@chromium.org>
* pci: Fix compiler warnings in dm_pciauto_setup_device()Bin Meng2016-02-26-1/+1
| | | | | | | | | | | | Fix the following compiler warnings when DEBUG is on. warning: 'bar_res' may be used uninitialized in this function. drivers/pci/pci_auto.c:101:21: if (!enum_only && pciauto_region_allocate(bar_res, bar_size, ^ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* pci_rom: fix may be used uninitialized warningAndreas Bießmann2016-02-24-1/+1
| | | | | | | | | | | | | | | | Building pci_rom.c with my toolchain complains about may be used uninitialized rom varaible: ---8<--- +drivers/pci/pci_rom.c:269:25: note: 'rom' was declared here w+drivers/pci/pci_rom.c: In function 'dm_pci_run_vga_bios': w+drivers/pci/pci_rom.c:154:14: warning: 'rom' may be used uninitialized in this function [-Wmaybe-uninitialized] --->8--- Fix this as done in 55616b86c745fcac5a791268ab8e7cba36965c0f the ram variable. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Anatolij Gustschin <agust@denx.de>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-01-29-0/+15
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| * Implement "pci enum" command for CONFIG_DM_PCIStephen Warren2016-01-28-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With CONFIG_DM_PCI enabled, PCI buses are not enumerated at boot, as they are without that config option enabled. No command exists to enumerate the PCI buses. Hence, unless some board-specific code causes PCI enumeration, PCI-based Ethernet devices are not detected, and network access is not available. This patch implements "pci enum" in the CONFIG_DM_PCI case, thus giving a mechanism whereby PCI can be enumerated. do_pci()'s handling of case 'e' is moved into a single location before the dev variable is assigned, in order to skip calculation of dev. The enum sub-command doesn't need the dev value, and skipping its calculation avoids an irrelevant error being printed. Using a command to initialize PCI like this has a disadvantage relative to enumerating PCI at boot. In particular, Ethernet devices are not probed during PCI enumeration, but only when used. This defers setting variables such as ethact, ethaddr, etc. until the first network-related command is executed. Hopefully this will not cause further issues. Perhaps in the long term, we need a "net start/enum" command too? Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-01-28-1/+5
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| * tegra: Report errors from PCI initSimon Glass2016-01-28-1/+5
| | | | | | | | | | | | | | This function can fail, so be sure to report any errors that occur. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* | dm: pci: Convert bios_emu to use the driver model PCI APISimon Glass2016-01-24-3/+3
| | | | | | | | | | | | | | | | At present this BIOS emulator uses a bus/device/function number. Change it to use a device if CONFIG_DM_PCI is enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: pci: Avoid using pci_bus_to_hose() in the uclassSimon Glass2016-01-24-7/+7
| | | | | | | | | | | | | | | | | | This function is only available for compatibility with old code. Avoid using it in the uclass. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: pci: Add a function to write a BARSimon Glass2016-01-24-0/+8
| | | | | | | | | | | | | | | | Add a driver-model version of the pci_write_bar32 function so that this is supported in the new API. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: pci: Move pci_bus_to_hose() to compatibilitySimon Glass2016-01-24-15/+28
| | | | | | | | | | | | | | | | This function should not be used by driver-model code, so move it to the compatibility portion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | pci_rom.c: Fix may be used uninitialized warningTom Rini2016-01-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With gcc-5.x we get: drivers/pci/pci_rom.c: In function 'dm_pci_run_vga_bios': drivers/pci/pci_rom.c:352:3: warning: 'ram' may be used uninitialized in this function [-Wmaybe-uninitialized] While unconvinced that this can happen in practice (if we malloc we set alloced to true, it will be false otherwise), silence the compiler. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: pci: Avoid a memory leak when allocating the ROMSimon Glass2016-01-15-12/+33
| | | | | | | | | | | | | | | | | | | | Adjust pci_rom_load() to return an indication of whether it allocated memory or not. Adjust the caller to free it. This fixes a memory leak when PCI_VGA_RAM_IMAGE_START is not used. Reported-by: Coverity (CID: 134194) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | dm: pci: Add a 'fall through' commentSimon Glass2016-01-15-0/+1
| | | | | | | | | | | | | | | | | | For this class it is intended to set up the PCI device, so add a comment to indicate this. This avoids a coverity warning. Reported-by: Coverity (CID: 134194) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* | drivers/pci/pci_mvebu: Fix for boards with X4 lanesPhil Sutter2016-01-14-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Armada XP has support for X4 lanes, boards specify this in their serdes_cfg. During PEX init in high_speed_env_lib.c, the configuration is stored in GEN_PURP_RES_2_REG. When enumerating PEX, subsequent interfaces of an X4 lane must be skipped. Otherwise the enumeration hangs up the board. The way this is implemented here is not exactly beautiful, but it mimics how Marvell's BSP does it. Alternatively we could get the information using board_serdes_cfg_get(), but that won't lead to clean code, either. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | drivers/pci: Fix for debug builds without CONFIG_PCI_ENUM_ONLYPhil Sutter2016-01-14-1/+1
|/ | | | | | | | | | The debug printing references bar_res, which exists only if CONFIG_PCI_ENUM_ONLY is not defined. Therefore move it into the ifdef'd area. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* pci: Tidy up comments in pci_bind_bus_devices()Simon Glass2016-01-12-3/+1
| | | | | | | | | The current comments are confusing. We don't actually bind a generic device when the device tree has no information. We try to scan available PCI drivers. Update the comments to reflect this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Switch to DM API for PCI address mappingSimon Glass2016-01-12-1/+1
| | | | | | | | We should use the new address mapping functions unless we are in compatibility mode. Disable the old functions by default. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Add driver model API functions for address mappingSimon Glass2016-01-12-0/+136
| | | | | | | | At present the PCI address map functions use the old API. Add new functions for this so that drivers can be converted. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Drop the old version of pci_find_class()Simon Glass2016-01-12-42/+42
| | | | | | | | Move this function into the compatibility file so that it is not available by default. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Drop the old version of pci_find_device/s()Simon Glass2016-01-12-0/+2
| | | | | | | | Move these functions into the compatibility file so that they are not available by default. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: x86: pci: Adjust bios_run_on_x86() to use the DM PCI APISimon Glass2016-01-12-2/+2
| | | | | | | | This function should take a struct udevice rather than pci_dev_t. Update it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: video: Convert video and pci_rom to use DM PCI APISimon Glass2016-01-12-28/+26
| | | | | | | | | | Adjust these files to use the driver-model PCI API instead of the legacy functions. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Add a function to read a PCI BARSimon Glass2016-01-12-0/+13
| | | | | | | Add a driver-model function for reading the PCI BAR from a device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Add a driver-model version of pci_find_class()Simon Glass2016-01-12-0/+20
| | | | | | | | | Add a function which scans the driver model device information rather than scanning the PCI bus again. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Add a driver-model version of pci_find_device()Simon Glass2016-01-12-0/+39
| | | | | | | | | Add a function which scans the driver model device information rather than scanning the PCI bus again. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Use driver model PCI API in auto-configSimon Glass2016-01-12-62/+444
| | | | | | | | | | | | | At present we are using legacy functions even in the auto-configuration code used by driver model. Add a new pci_auto.c version which uses the correct API. Create a new pci_internal.h header to hold functions that are used within the PCI subsystem, but are not exported to other drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Add a dm_ prefix to pci_bus_find_bdf()Simon Glass2016-01-12-1/+1
| | | | | | | | | | | | Most driver model PCI functions have a dm_ prefix. At some point, when the old code is converted to driver model and the old functions are removed, we will drop that prefix. For consistency, we should use the dm_ prefix for all driver model functions. Update pci_bus_find_bdf() accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Add a dm_ prefix to pci_get_bdf()Simon Glass2016-01-12-5/+6
| | | | | | | | | | | | Most driver model PCI functions have a dm_ prefix. At some point, when the old code is converted to driver model and the old functions are removed, we will drop that prefix. For consistency, we should use the dm_ prefix for all driver model functions. Update pci_get_bdf() accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Mark legacy files as suchSimon Glass2016-01-12-4/+10
| | | | | | | | We don't want people changing the legacy PCI files while migration is in progress. Update the file headers to indicate that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: layerscape: Adjust the return value when ls_pcie_addr_valid() failsBin Meng2016-01-08-1/+1
| | | | | | | | | When trying to access non-existent/unsupported PCI devices in ls_pcie_read_config(), when ls_pcie_addr_valid() fails it returns error code and fills in the result with 0xffffffff manually. But it really should return zero to upper layer codes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* pci: imx: Adjust the return value when imx_pcie_addr_valid() failsBin Meng2016-01-08-1/+1
| | | | | | | | | | | When trying to access non-existent/unsupported PCI devices in imx_pcie_read_config(), when imx_pcie_addr_valid() fails it returns error code and fills in the result with 0xffffffff manually. But it really should return zero to upper layer codes. Reported-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
* x86: Remove HAVE_ACPI_RESUMEBin Meng2015-12-09-8/+0
| | | | | | | | | These are currently dead codes. Until we have complete ACPI support, we don't know if it works or not. Remove to avoid confusion. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* dm: pci: Disable PCI compatibility functions by defaultSimon Glass2015-12-01-1/+11
| | | | | | | | | We eventually need to drop the compatibility functions for driver model. As a first step, create a configuration option to enable them and hide them when the option is disabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Move common auto-config functions to a common fileSimon Glass2015-12-01-117/+129
| | | | | | | | Some functions will be used by driver model and legacy PCI code. To avoid duplication, put these in a separate, shared file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: pci: Rename pci_auto.c to pci_auto_old.cSimon Glass2015-12-01-1/+1
| | | | | | | | This file should not be used with driver model as it has lots of legacy/ compatibility functions. Rename it to make this clear. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: tegra: pci: Convert tegra boards to driver model for PCISimon Glass2015-12-01-322/+155
| | | | | | | | | Adjust the Tegra PCI driver to support driver model and move all boards over at the same time. This can make use of some generic driver model code, such as the range-decoding logic. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* dm: pci: Add a function to find the regions for a PCI busSimon Glass2015-12-01-0/+30
| | | | | | | | | This function looks up the controller and returns a pointer to each region type. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
* dm: pci: Add a function to get the controller for a busSimon Glass2015-12-01-0/+8
| | | | | | | | | A PCI bus may be a bridge device where the controller is the bridge's parent. Add a function to return the controller device, given a PCI device. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
* dm: pci: Add functions to emulate 8- and 16-bit accessSimon Glass2015-12-01-0/+39
| | | | | | | | | Provide a few functions to support using 32-bit access to emulate 8- and 16-bit access. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
* dm: pci: Support decoding ranges with duplicate entriesSimon Glass2015-12-01-3/+10
| | | | | | | | | | | | | | | | | | At present we add a new resource entry for every range entry. But some range entries refer to configuration regions. To make this work, avoid adding two regions of the same type. The later ranges will overwrite the earlier (configuration) ones. There does not seem to be a way to distinguish the configuration ranges other than by ordering (as per the device tree binding). We could perhaps instead just store one region of each type in a simple array. Once we are sure that we don't need to support multiple regions, we could change this. It would be easier to do it when all drivers are converted to use driver model for PCI. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
generated by cgit v1.1 at 2024-11-05 16:07:47 +0000