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* | | | net: emaclite: Move emaclite to KconfigMichal Simek2016-01-27-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add PHYLIB and MII dependencies and enable it by default for Microblaze. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: emaclite: Let core to handle received packetMichal Simek2016-01-27-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Pass pointer to core to handle packet. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | net: emaclite: Rename start and stop functionsMichal Simek2016-01-27-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | Rename start and stop functions to align with DM functions names. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | net: emaclite: Move driver to DMMichal Simek2016-01-27-68/+91
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move driver to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: emaclite: Use indirect access in emaclite_recvMichal Simek2016-01-27-52/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When IP is configured with pong buffers, IP is receiving packets to ping and then to pong buffer and than ping again. The original logic in the driver remains there that when ping buffer is free, pong buffer is checked too and return if both are free. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | net: emaclite: Use indirect reg access in sendMichal Simek2016-01-27-30/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The original logic in the driver was exchanging buffers which are used for sending packet and tx_ping and tx_pong buffers were exchanged all the time to ensure that IP has enough time to send the packet out. Based on this "feature" send function was using nextbuffertouse variable to save which buffer should be used. Before this algorithm was called driver checked that there is free buffer available. This checking remains in the driver but driver tries to use tx_ping first if available. If not, tx_pong buffer is used instead. To reach this code the original condition is met that at least one of the buffer should be available. Testing doesn't show any performance drop when this patch is applied. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: emaclite: Remove XEL_TSR_XMIT_ACTIVE_MASK flagMichal Simek2016-01-27-13/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This flag is not documented anywhere in the latest documentation that's why this patch removes it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: emaclite: Fix logic around available TX buffersMichal Simek2016-01-27-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify logic how to find out if there is free TX buffer. Both buffers are checked all the time that's why logic around order can be removed. Also add check when only one buffer is available. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: emaclite: Use indirect register access for TX resetMichal Simek2016-01-27-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move to use indirect register access when timeout expires for resetting TX buffers. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: emaclite: Use indirect register access for rx_ping/pongMichal Simek2016-01-27-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | Do initialization via indirect register access. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | net: emaclite: Use indirect register access for tx_ping/pongMichal Simek2016-01-27-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Do initialization via indirect register access. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: emaclite: Convert MDIO to use register offsetMichal Simek2016-01-27-36/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use u-boot coding style how to setup and access MDIO bus. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: emaclite: Add MDIO support to driverMichal Simek2016-01-27-0/+238
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MDIO support before move to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: emaclite: Remove ancient OF probe functionMichal Simek2016-01-27-30/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Prepare for DM move. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: Add axi emac to KconfigMichal Simek2016-01-27-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also add dependency on PHYLIB and MII which is required. Clean PHYLIB dependency from the driver too. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: axi_emac: Rename start, stop, write_hwaddr functionsMichal Simek2016-01-27-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename few functions to fit to the new name convention used by DM. Suggested-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | net: axi_emac: Split recv from free_pktMichal Simek2016-01-27-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Call net_process_received_packet() by core. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: axi_emac: Enable access to MDIO in probeMichal Simek2016-01-27-3/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Detect phy when driver probes. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: axi_emac: Move driver to DMMichal Simek2016-01-27-68/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Move driver to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: axi_emac: Pass private structure where possibleMichal Simek2016-01-27-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | Use axidma_priv instead of ethdevice in preparation of the DM move. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | net: axi_emac: Pass private structure to phyread/phywriteMichal Simek2016-01-27-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Prepare for move to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: axi_emac: Put iobase to private structureMichal Simek2016-01-27-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Saving iobase directly to private structure helps with moving to DM. There is an option to load iobase from pdata but it is additional load. Pointer to private structure is available all the time. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: axi_emac: Pass directly pointer to register spaceMichal Simek2016-01-27-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify mdio_wait function by passing regs directly. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: axi_emac: Show phy address instead of register contentMichal Simek2016-01-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix debug message. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | | net: axi_emac: Fix parentheses around operand !Michal Simek2016-01-27-4/+4
| |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix these compilation warning by proper grouping: In function 'axi_dma_init': drivers/net/xilinx_axi_emac.c:391:7: warning: suggest parentheses around operand of '!' or change '&' to '&&' or '!' to '~' [-Wparentheses] if (!(in_be32(&priv->dmatx->control) | ^ In function 'axiemac_send': drivers/net/xilinx_axi_emac.c:501:21: warning: suggest parentheses around operand of '!' or change '&' to '&&' or '!' to '~' [-Wparentheses] while (timeout && (!in_be32(&priv->dmatx->status) & Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: eepro100: Fix build warningsBin Meng2016-01-25-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When building katmai, it reports quite a lot warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] Fix this by casting the dev->iobase with u_long. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | bug.h: move BUILD_BUG_* defines to include/linux/bug.hMasahiro Yamada2016-01-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BUILD_BUG_* macros have been defined in several headers. It would be nice to collect them in include/linux/bug.h like Linux. This commit is cherry-picking useful macros from include/linux/bug.h of Linux 4.4. I did not import BUILD_BUG_ON_MSG() because it would not work if it is used with include/common.h in U-Boot. I'd like to postpone it until the root cause (the "error()" macro in include/common.h causes the name conflict with "__attribute__((error()))") is fixed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | net: zynq_gem: Use shared wait_for_bitMateusz Kulikowski2016-01-25-33/+2
|/ / | | | | | | | | Use existing library function to poll bit(s). Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
* | net: pcnet: refactor mapping of virtual addresses to physical onesDaniel Schwierzeck2016-01-16-7/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci_virt_to_mem() uses virt_to_phys() to get the physical address. But pci_virt_to_mem() is also called with uncached addresses which is wrong according to the documentation of virt_to_phys(). Refactor the PCI_TO_MEM() macro to optionally map an uncached address back to a cached one before calling pci_virt_to_mem(). Currently pcnet works because virt_to_phys() is incorrectly implemented on MIPS. With the upcoming asm header file update for MIPS, the virt_to_phys() implementation will be fixed. Thus this patch is needed to keep pcnet working on MIPS Malta board. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | Fix GCC format-security errors and convert sprintfs.Ben Whitten2016-01-14-25/+25
| | | | | | | | | | | | | | | | | | | | | | With format-security errors turned on, GCC picks up the use of sprintf with a format parameter not being a string literal. Simple uses of sprintf are also converted to use strcpy. Signed-off-by: Ben Whitten <ben.whitten@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-01-14-98/+132
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
| * | net: mvneta: Convert to driver modelStefan Roese2016-01-14-98/+132
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update this driver to support driver model. As all MVEBU boards using this driver are converted with this patch, the non-driver-model code can be removed completely. This is also the reason why this patch is quite big and includes a) the driver change and b) the platform change. As its not git-bisect save otherwise. With this conversion, some parameters are now extracted from the DT instread of using the config header defines. The supported properties right now are: PHY-mode ("phy-mode") and PHY-address ("reg"). The base addresses for the ethernet controllers can be removed from the header files as well. Please note that this patch also removes the E1000 network driver from some MVEBU config headers. This is necessary, as with DM_ETH configured and the e1000 driver enabled, the PCI driver also needs to support DM. But the MVEBU PCI(e) driver still needs to get ported to DM. When this is done, the E1000 driver can be enabled again. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org>
* | net: lpc32xx: fix ignored MDIO busy wait status on readVladimir Zapolskiy2016-01-13-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The change fixes PHY write operation, which incorrectly waits for released busy state before issuing a write operation, this breaks sequential write/read operation logic, because read operation starts immediately on request and it completes, when busy state is gone. Instead of adding the second preceding busy state check to read function, do busy state release check after issuing a write operation, this method of operation is also recommended by the LPC32xx User's Manual, see MII Mgmt Indicators Register notes: For PHY Write if scan is not used: 1. Write 0 to MCMD 2. Write PHY address and register address to MADR 3. Write data to MWTD 4. Wait for busy bit to be cleared in MIND Reported-by: Alexandre Messier <amessier@tycoint.com> Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Alexandre Messier <amessier@tycoint.com>
* | block: pass block dev not num to read/write/erase()Stephen Warren2016-01-13-2/+4
| | | | | | | | | | | | | | | | | | | | | | This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge git://git.denx.de/u-boot-netTom Rini2016-01-13-112/+5
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| * net: e1000: Mark _disable_wr() and _write_status() as __maybe_unusedBin Meng2015-12-21-5/+4
| | | | | | | | | | | | | | | | | | Per the comments, e1000_spi_eeprom_disable_wr() and e1000_spi_eeprom_write_status() have been tested. Remove the #if 0, #endif and mark them as __maybe_unused. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: e1000: Remove CONFIG_MVBC_1GBin Meng2015-12-21-2/+0
| | | | | | | | | | | | | | CONFIG_MVBC_1G is not referenced anywhere, hence remove it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: e1000: Remove dead codes wrapped by #if 0Bin Meng2015-12-21-105/+1
| | | | | | | | | | | | | | Remove those dead codes wrapped by #if 0 and #endif. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | dm: net: Convert rtl8169 to use DM PCI APISimon Glass2016-01-12-19/+66
| | | | | | | | | | | | | | | | Update this driver to use the proper driver-model PCI API functions. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | dm: pci: Add a dm_ prefix to pci_get_bdf()Simon Glass2016-01-12-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | Most driver model PCI functions have a dm_ prefix. At some point, when the old code is converted to driver model and the old functions are removed, we will drop that prefix. For consistency, we should use the dm_ prefix for all driver model functions. Update pci_get_bdf() accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-08-1/+1
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| * | phy: atheros: Use ar8035_config for AR8031Fabio Estevam2016-01-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 08ad9b068afb88 (" ar8031: modify the config func of ar8031 to ar8021_config") selected 'ar8021_config' as the configuration function for AR8031. The correct would be to use 'ar8035_config' instead as AR8031/AR8035 have the same programming model and even share the same phy driver in the linux kernel: drivers/net/phy/at803x.c. Tested on a mx6qsabresd and wandboard, which now can work without any PHY setup code in the board files. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | | net: Fix delay in net_retry testJoe Hershberger2016-01-07-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduced in 45b4773 (net/arp: account for ARP delay, avoid duplicate packets on timeout) Check the arp timeout and adjust the timeout start time before the call to eth_recv() so that the sandbox driver has the opportunity to adjust the sandbox timer after the new start time has been recorded. Also, change the adjustment amount by 11 seconds instead of exactly the 10 seconds that the ping timout is expecting since the timeout check is looking for the time elapsed to be greater than but not equal to the specified delay. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefan Brüns <stefan.bruens@rwth-aachen.de> Acked-by: Simon Glass <sjg@chromium.org>
* | net: e1000: use correct helper to do endianness conversionMiao Yan2016-01-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | In struct e1000_rx_desc, field 'length' is declared as uint16_t, so use le16_to_cpu() to do endianness conversion. Also drop conversion on 'status' which is declared as uint8_t. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-03-3/+17
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| * | net: fec_mxc: unregister mdio bus on probe errorMåns Rullgård2016-01-03-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | If fecmxc_initialize_multi() fails, it frees but does not unregister the mdio bus, causing subsequent uses of the "mii" command to crash. Fix this by adding mdio_unregister() calls where needed. Signed-off-by: Mans Rullgard <mans@mansr.com> Reviewed-by: Eric Nelson <eric@nelint.com>
| * | net: fec_mxc: configure MDIO hold timeMåns Rullgård2016-01-03-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the host clock frequency is higher than 100 MHz, the MDIO hold time needs to be increased from its current setting of one cycle in order to meet the specified minium of 10 ns. Writing an appropriate value to the HOLDTIME field of the MII_SPEED register achieves this. Comment copied from Linux kernel. Signed-off-by: Mans Rullgard <mans@mansr.com> Reviewed-by: Eric Nelson <eric@nelint.com>
* | | net: designware: Zap trailing backslashMarek Vasut2015-12-22-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Trailing backslashes are necessary only in macros, not in the actual code, so remove them. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
* | | net: eth_designware: select PHYLIB in KconfigThomas Chou2015-12-22-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Select PHYLIB in drivers/net/Kconfig. And remove CONFIG_PHYLIB from legacy board header files. This fixed the warnings when both ALTERA_TSE and ETH_DESIGNWARE are selected. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reported-by: Pavel Machek <pavel@denx.de> Acked-by: Chin Liang See <clsee@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Tested-by: Pavel Machek <pavel@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | net: phy: micrel: Configure KSZ9021/KSZ9031 skew from OFMarek Vasut2015-12-20-1/+145
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add code to process the KSZ9021/KSZ9031 OF props if they are present and configure skew registers based on the information from the OF. This code is only enabled if the DM support for ethernet is also enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> V2: - Implement struct ksz90x1_reg_field to describe the skew register fields more accurately. - Fix RXDV/TXEN skew register default value and offset.
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