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* net: altera_tse: add mSG-DMA supportThomas Chou2015-11-12-0/+191
| | | | | | | | | | | The Modular Scatter-Gather DMA core is a new DMA core to work with the Altera Triple-Speed Ethernet MegaCore. It replaces the legacy Scatter-Gather Direct Memory Access (SG-DMA) controller core. Please find details on the "Embedded Peripherals IP User Guide" of Altera. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* net: altera_tse: add priv ops to prepare msgdma supportThomas Chou2015-11-12-25/+81
| | | | | | | | Add priv ops to prepare msgdma support. These ops are dma type specific. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* net: altera_tse: wait sgdma in altera_tse_recvThomas Chou2015-11-12-1/+1
| | | | | | | | Move the sgdma wait from free_pkt to recv. This is the proper place to wait recv sgdma done. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* net: altera_tse: factor out stop mac funcThomas Chou2015-11-12-15/+21
| | | | | | | Factor out the stop mac function to prepare msgdma support. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
* net: altera_tse: get numbers of fdt address and size cellsThomas Chou2015-11-06-6/+8
| | | | | | | | | Get numbers of fdt address and size cells in altera_tse_probe(), thereby remove the assumption of one address cell and one size cell. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: altera_tse: use BIT macroThomas Chou2015-11-06-15/+15
| | | | | | | | | | | | | | Replace numerical bit shift with BIT macro in altera_tse :%s/(1 << nr)/BIT(nr)/g where nr = 0, 1, 2 .... 31 Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Chin Liang See <clsee@altera.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: altera_tse: remove the useless parenthesisThomas Chou2015-11-06-15/+15
| | | | | | | | | Remove the useless parenthesis. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Chin Liang See <clsee@altera.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: altera_tse: fix packed and aligned attributeThomas Chou2015-11-06-1/+1
| | | | | | | | | | | | | | | | | | Fix packed and aligned attribute warnings. WARNING: __packed is preferred over __attribute__((packed)) #14: FILE: drivers/net/altera_tse.h:14: +#define __packed_1_ __attribute__ ((packed, aligned(1))) WARNING: __aligned(size) is preferred over __attribute__((aligned(size))) #14: FILE: drivers/net/altera_tse.h:14: +#define __packed_1_ __attribute__ ((packed, aligned(1))) Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Chin Liang See <clsee@altera.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: altera_tse: use data type u32 for regs and descThomas Chou2015-11-06-60/+60
| | | | | | | | | | Use data type u32/u16/u8 for regs and desc, as it is more portable. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Chin Liang See <clsee@altera.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: altera_tse: remove unused macro and regs defThomas Chou2015-11-06-101/+3
| | | | | | | | | Remove unused macro and regs def. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Chin Liang See <clsee@altera.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* video: Drop DEV_FLAGS_SYSTEM flagBin Meng2015-11-05-1/+1
| | | | | | DEV_FLAGS_SYSTEM does not have any actual meaning, hence drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-10-30-110/+283
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| * armv8/ls1043a: Add Fman supportShaohui Xie2015-10-29-2/+128
| | | | | | | | | | | | | | | | Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/fsl_lsch3: Change arch to fsl-layerscapeMingkai Hu2015-10-29-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net/fm: Add QSGMII PCS initShaohui Xie2015-10-29-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | QSGMII PCS needed to be programmed same as SGMII PCS, and there are four ports in QSGMII PCS, port 0, 1, 2, 3, all the four ports shared port 0's MDIO controller, so when programming port 0, we continue to program other three ports. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net: Move some header files to include/Shaohui Xie2015-10-29-6/+6
| | | | | | | | | | | | | | | | | | | | The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM and PPC, move it out of ppc to include/, and change the path in drivers accordingly. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net: fm: bug fix when CONFIG_PHYLIB not definedShaohui Xie2015-10-29-1/+7
| | | | | | | | | | | | | | | | codes related to phylib operations should be wrapped by CONFIG_PHYLIB. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net/fm: Make the return value logic consistent with conventionHou Zhiqiang2015-10-29-24/+36
| | | | | | | | | | | | | | | | | | | | In convention, the '0' is a normal return value indicating there isn't an error. While some functions of FMan IM driver treat '0' as an error return value. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net/fm: Add support for 64-bit platformsHou Zhiqiang2015-10-29-33/+60
| | | | | | | | | | | | | | | | | | | | | | | | The FMan IM driver is developed for 32-bit platfroms and isn't friendly to 64-bit platforms, so do the minimal refactor: 1. Refine the MURAM management and access. 2. Correct the initialization and operations for QDs and BDs. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * net/fm: Fix the endian issue to support both endianness platformsHou Zhiqiang2015-10-29-38/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Frame Manager(FMan) is a big-endian peripheral, so the registers, internal MURAM and BDs, which are allocated in main memory and used to communication between core and FMan, should be accessed in big-endian. The big-endian platforms can access them directly as the code implemented so far, while for the little-endian platforms it need to swap the byte-order. Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * driver: net: ldpaa_eth: Set MAC address during interface openPrabhakar Kushwaha2015-10-29-12/+3
| | | | | | | | | | | | | | | | | | | | Currently ldpaa ethernet driver rely on DPL file to statically configure mac address for the DPNIs. It is not a correct approach. Add support setting MAC address from env variable or Random MAC address. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | net: pch_gbe: Add driver remove supportBin Meng2015-10-29-0/+12
| | | | | | | | | | | | | | | | | | | | In pch_gbe_probe(), some additional resources are allocated (eg: mdio, phy). We should free these in the driver remove phase. Add pch_gbe_remove() to clean it up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: designware: Add driver remove supportBin Meng2015-10-29-0/+12
| | | | | | | | | | | | | | | | | | In designware_eth_probe(), some additional resources are allocated (eg: mdio, phy). We should free these in the driver remove phase. Add designware_eth_remove() to clean it up. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | net: phy: Test previous phydev->dev against new mac devBin Meng2015-10-29-1/+1
| | | | | | | | | | | | | | | | | | | | In phy_connect_dev(), if the phy device has an accociated mac device before, a warning message will be printed. But we should test the old device against the new one, if they are actually the same one, don't print the warning message. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: phy: Change to print all phys that are not foundBin Meng2015-10-29-1/+8
| | | | | | | | | | | | | | | | | | | | | | In get_phy_device_by_mask(), when no phy is found, currently we only print a message to show the first phy address that is not found. But this is not always the case as multiple phys can be specified by phy_mask. Change to print all phys that are not found, and to reduce the console boot log, change to use 'debug' instead of 'printf'. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: phy: Don't create phy device when there is no phyBin Meng2015-10-29-1/+2
| | | | | | | | | | | | | | | | In get_phy_device_by_mask(), when no phy is found, we should not create any phy device. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: phy: micrel: disable NAND-tree for KSZ8051Sylvain Rochet2015-10-29-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND-tree is used to check wiring between MAC and PHY using NAND gates on the PHY side, hence the name. NAND-tree initial status is latched at reset by probing the IRQ pin. However some devices are sharing the PHY IRQ pin with other peripherals such as Atmel SAMA5D[34]x-EK boards when using the optional TM7000 display module, therefore they are switching the PHY in NAND-tree test mode depending on the current IRQ line status at reset. This patch ensure PHY is not in NAND-tree test mode only for the Micrel KSZ8051 PHY used by Atmel. There are other Micrel PHY affected but I doubt they are used on such weird hardware design. Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: rtl8169: Build warning fixes for 64-bitStephen Warren2015-10-29-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | Casting from dev->priv to pci_dev_t changes the value's size on a 64-bit system. This causes the compiler to complain about casting a pointer to an integer of a different (smaller) size. To avoid this, cast to an integer of matching size first, then perform an int->int cast to perform the size change. This signals explicitly that we do want to change the size, and avoids the compiler warning. This is legitimate since we know the pointer actually stores a small integer, not a pointer value. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: phy: micrel: add support for KSZ8021RNL & KSZ8031RNLSylvain Lemieux2015-10-29-0/+11
|/ | | | | | | This patch adds support for Micrel KSZ8021RNL & KSZ8031RNL. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: convert altera_tse to driver model and phylibThomas Chou2015-10-23-1047/+382
| | | | | | | | Convert altera_tse to driver model and phylib. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* driver: net: keystone_net: removing unused codeMugunthan V N2015-10-22-10/+0
| | | | | | | | remove unused code as the same is achieved when configuring sgmii and link status is verifed. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* driver: net: keystone_net: add support for rgmii phyVitaly Andrianov2015-10-22-1/+43
| | | | | | | | | In K2G, Ethernet doesn't support SGMII instead it support RGMII, adding support to the driver to connect to RGMII phy. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* driver: net: keystone_net: fix phy mode configurationMugunthan V N2015-10-22-2/+2
| | | | | | | | | | Phy mode is a board property and it can be different between multiple board and ports, so it should not be hardcoded in driver to one specific mode. So adding a field in eth_priv_t structure to pass phy mode to driver. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* drivers: net: cpsw: convert driver to adopt device driver modelMugunthan V N2015-10-22-1/+244
| | | | | | | adopt cpsw driver to device driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* drivers: net: cpsw: prepare driver for device model migrationMugunthan V N2015-10-22-44/+89
| | | | | | | prepare driver for device model migration Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* net: fix netconsole when CONFIG_DM_ETH is setBernhard Nortmann2015-09-29-3/+11
| | | | | | | | This patch uses the eth_is_active() function to work around issues that prevented compilation with the newer driver model. Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: phy: on phy device create do not initialize link to 1Mugunthan V N2015-09-29-1/+1
| | | | | | | | | | | | | | | | Currently when phy device is created the link variable is initialized to 1 which denoted phy link is already up. On a power reset there is no issue as phy status register link status will not be set, so phy auto negotiate will be started. But when a cpu reset is issued (ex: dra72x-evm) phy's link status bit is already set which leads to assume that link is already setup in genphy_update_link() initial check which results in ehternet not working. So do not assume that link is already up and on phy device create set link to zero. This is verified on dra72x-evm. Reported-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* drivers/net/vsc9953: Add GPL-2.0+ SPDX-License-IdentifierCodrin Ciubotariu2015-09-21-1/+1
| | | | | | Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/net/vsc9953: Add commands for VLAN ingress filteringCodrin Ciubotariu2015-09-21-0/+86
| | | | | | | | | | | | | | | | The command: ethsw [port <port_no>] ingress filtering { [help] | show | enable | disable } - enable/disable VLAN ingress filtering on port can be used to enable/disable/show VLAN ingress filtering on a port. This command has also been added to the ethsw generic parser from common/cmd_ethsw.c Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/net/vsc9953: Add command for shared/private VLAN learningCodrin Ciubotariu2015-09-21-0/+95
| | | | | | | | | | | | | | | | The command: ethsw vlan fdb { [help] | show | shared | private } - make VLAN learning shared or private" configures the FDB to share the FDB entries learned on multiple VLANs or to keep them separated. By default, the FBD uses private VLAN learning. This command has also been added to the ethsw generic parser from common/cmd_ethsw.c Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/net/vsc9953: Add VLAN commands for VSC9953Codrin Ciubotariu2015-09-21-0/+478
| | | | | | | | | | | | | | | | | | | | | | | The new added commands can be used to configure VLANs for a port on both ingress and egress. The new commands are: ethsw [port <port_no>] pvid { [help] | show | <pvid> } - set/show PVID (ingress and egress VLAN tagging) for a port; ethsw [port <port_no>] vlan { [help] | show | add <vid> | del <vid> } - add a VLAN to a port (VLAN members); ethsw [port <port_no>] untagged { [help] | show | all | none | pvid } - set egress tagging mod for a port" ethsw [port <port_no>] egress tag { [help] | show | pvid | classified } - Configure VID source for egress tag. Tag's VID could be the frame's classified VID or the PVID of the port These commands have also been added to the ethsw generic parser from common/cmd_ethsw.c Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/net/vsc9953: Add commands to manipulate the FDB for VSC9953Codrin Ciubotariu2015-09-21-0/+472
| | | | | | | | | | | | | | | | | The new command: ethsw [port <port_no>] [vlan <vid>] fdb { [help] | show | flush | { add | del } <mac> } Can be used to add and delete FDB entries. Also, the command can be used to show entries from the FDB tables. When used with [port <port_no>] and [vlan <vid>], only the matching the FDB entries can be seen or flushed. The command has also been added to the generic ethsw parser from cmd_ethsw.c. Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/net/vsc9953: Add commands to enable/disable HW learningCodrin Ciubotariu2015-09-21-0/+141
| | | | | | | | | | | | | | The command: ethsw [port <port_no>] learning { [help] | show | auto | disable } can be used to enable/disable HW learning on a port. This patch also adds this command to the generic ethsw parser from cmd_ethsw. Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/net/vsc9953: Add command to show/clear port countersCodrin Ciubotariu2015-09-21-0/+256
| | | | | | | | | | | | | | The new added command: ethsw [port <port_no>] statistics { [help] | [clear] } will print counters like the number of Rx/Tx frames, number of Rx/Tx bytes, number of Rx/Tx unicast frames, etc. This patch also adds this commnd in the genereric ethsw parser from cmd_ethsw.c Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/net/vsc9953: Use the generic Ethernet Switch parserCodrin Ciubotariu2015-09-21-184/+165
| | | | | | | | | | | | This patch replaces the parser used by VSC9953 L2 Switch driver with the generic one. Also, the config macro that enables the VSC9953 commands has been replaced in all the platforms that use this driver with the config macro that corresponds to the generic parser. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/net/vsc9953: Add default configuration for VSC9953 L2 SwitchCodrin Ciubotariu2015-09-21-0/+253
| | | | | | | | | | | | | | | | | | At startup, the default configuration should be: - enable HW learning on all ports (HW default); - all ports are VLAN aware; - all ports are members of VLAN 1; - all ports have Port-based VLAN 1; - on all ports, the switch is allowed to remove maximum one VLAN tag, - on egress, the switch should add a VLAN tag if the frame is classified to a different VLAN than the port's Port-based VLAN; Signed-off-by: Johnson Leung <johnson.leung@freescale.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/net/vsc9953: Fix bug when enabling a portCodrin Ciubotariu2015-09-21-2/+2
| | | | | | | | | | | | | When a port is enabled at init time, the initializing function touches more bits than necessary to enable a port (also touches reserved bits and default bit values). This patch fixes this issue by changing the value of the define used to enable the port and assures that no other bits are changes by replacing out_le32() with setbits_le32(). Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/net/vsc9953: Cleanup patchCodrin Ciubotariu2015-09-21-71/+73
| | | | | | | | | | | | This patch groups some macros defined for registers and replaces some magic numbers from vsc9953 with macros. Also, "port" and "port_nr" words are replaced with "port_no", puts each variable declaration on a line and removes unnecessary tabs. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers/net/vsc9953: Remove 'CONFIG_' from macros' nameCodrin Ciubotariu2015-09-21-19/+19
| | | | | | Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
* net: designware: Add support to PCI designware devicesBin Meng2015-09-16-0/+42
| | | | | | | | The Designware ethernet controller is also seen on PCI bus, e.g. on Intel Quark SoC. Add this support in the DM version driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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