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* net: remove unused CONFIG_AT91_LEGACYAndreas Bießmann2013-11-13-9/+0
| | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Merge branch 'iu-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-11-09-1/+30
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile board/compulab/cm_t35/Makefile board/corscience/tricorder/Makefile board/ppcag/bg0900/Makefile drivers/bootcount/Makefile include/configs/omap4_common.h include/configs/pdnb3.h Makefile conflicts are due to additions/removals of object files on the ARM branch vs KBuild introduction on the main branch. Resolution consists in adjusting the list of object files in the main branch version. This also applies to two files which are not listed as conflicting but had to be modified: board/compulab/common/Makefile board/udoo/Makefile include/configs/omap4_common.h conflicts are due to the OMAP4 conversion to ti_armv7_common.h on the ARM side, and CONFIG_SYS_HZ removal on the main side. Resolution is to convert as this icludes removal of CONFIG_SYS_HZ. include/configs/pdnb3.h is due to a removal on ARM side. Trivial resolution is to remove the file. Note: 'git show' will also list two files just because they are new: include/configs/am335x_igep0033.h include/configs/omap3_igep00x0.h
| * net: macb: get DMA bus width from design config registerBo Shen2013-11-04-1/+30
| | | | | | | | | | | | | | Get DMA bus width from design config register Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | netconsole loses 2nd character of inputSuriyan Ramasami2013-11-08-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Netconsole loses the second character when used as input by either setenv stdin nc or setenv stdin serial,nc if using CONSOLE_CONSOLE_MUX Before a nc_send_packet() to echo the input, a check is done to see if nc_ether is valid. If its not, it waits for an arp request and then sends the packet (which contains the first character of line to be displayed as output). As part of reaping the arp request, the second character is consumed. We protect this by making the call to NetLoop(NETCONS) between input_recursion. Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | cosmetic: remove empty lines at the top of fileMasahiro Yamada2013-11-08-2/+0
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | drivers: net: convert makefiles to Kbuild styleMasahiro Yamada2013-10-31-184/+97
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | net/fman: add a fm_enable_port functionValentin Longchamp2013-10-24-0/+51
| | | | | | | | | | | | | | | | | | | | This can be useful if one wants to disable an interface in u-boot because u-boot should not manage it but then later reenable it for FDT fixing or if the kernel uses this interface. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> [York Sun: fix conflict in fm_eth.h] Acked-by: York Sun <yorksun@freescale.com>
* | powerpc/t1040qds: Add T1040QDS boardPrabhakar Kushwaha2013-10-16-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040QDS is a high-performance computing evaluation, development and test platform supporting the T1040 QorIQ Power Architecture™ processor. T1040QDS board Overview ----------------------- - Four e5500 cores, each with a private 256 KB L2 cache - 256 KB shared L3 CoreNet platform cache (CPC) - Interconnect CoreNet platform - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support - Data Path Acceleration Architecture (DPAA) incorporating acceleration for the following functions: - Packet parsing, classification, and distribution - Queue management for scheduling, packet sequencing, and congestion management - Cryptography Acceleration - RegEx Pattern Matching Acceleration - IEEE Std 1588 support - Hardware buffer management for buffer allocation and deallocation - Ethernet interfaces - Integrated 8-port Gigabit Ethernet switch - Four 1 Gbps Ethernet controllers - SERDES Connections, 8 lanes supporting: — PCI Express: supporting Gen 1 and Gen 2; — SGMII — QSGMII — SATA 2.0 — Aurora debug with dedicated connectors - DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and Interleaving -IFC/Local Bus - NAND flash: 8-bit, async, up to 2GB. - NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB - GASIC: Simple (minimal) target within Qixis FPGA - PromJET rapid memory download support - Ethernet - Two on-board RGMII 10/100/1G ethernet ports. - PHY #0 remains powered up during deep-sleep - QIXIS System Logic FPGA - Clocks - System and DDR clock (SYSCLK, “DDRCLK”) - SERDES clocks - Power Supplies - Video - DIU supports video at up to 1280x1024x32bpp - USB - Supports two USB 2.0 ports with integrated PHYs — Two type A ports with 5V@1.5A per port. — Second port can be converted to OTG mini-AB - SDHC - SDHC port connects directly to an adapter card slot, featuring: - Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC — Supporting eMMC memory devices - SPI - On-board support of 3 different devices and sizes - Other IO - Two Serial ports - ProfiBus port - Four I2C ports Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> [York Sun: fix conflict in boards.cfg] Acked-by-by: York Sun <yorksun@freescale.com>
* | SGMII:fix PHY addresses for QSGMII Riser Card working in SGMII modeZhao Qiang2013-10-16-0/+45
|/ | | | | | | | | | | | | | | | | | | | | Fix PHY addresses for QSGMII Riser Card working in SGMII mode on board P3041/P5020/P4080/P5040/B4860. QSGMII Riser Card can work in SGMII mode, but having the different PHY addresses. So the following steps should be done: 1. Confirm whether QSGMII Riser Card is used. 2. If yes, set the proper PHY address. Generally, the function is_qsgmii_riser_card() is for step 1, and set_sgmii_phy() for step 2. However, there are still some special situations, take P5040 and B4860 as examples, the PHY addresses need to be changed when serdes protocol is changed, so it is necessary to confirm the protocol before setting PHY addresses. Signed-off-by: Zhao Qiang <B45475@freescale.com>
* Coding Style cleanup: replace leading SPACEs by TABsWolfgang Denk2013-10-14-2/+2
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Drop changes for PEP 4 following python tools] Signed-off-by: Tom Rini <trini@ti.com>
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-14-4/+4
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-10-02-5/+13
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| * Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-10-02-4/+4
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| | * net: fec_mxc: Fix timeouts during tftp transferFabio Estevam2013-09-20-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Performing tftp transfers on mx28 results in random timeouts. Hector Palacios and Robert Hodaszi analyzed the root cause being related to the wrong alignment of the 'buff' buffer inside fec_recv(). Benoît Thébaudeau provided an excellent analysis of the alignment bug that is present on older versions, such as GCC 4.5.4: http://marc.info/?l=u-boot&m=137942904906131&w=2 Use ALLOC_CACHE_ALIGN_BUFFER() to avoid alignment issues from older GCC versions. Reported-by: Hector Palacios <hector.palacios@digi.com> Tested-by: Oliver Metz <oliver@freetz.org> Tested-by: Hector Palacios <hector.palacios@digi.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Tested-by: Marek Vasut <marex@denx.de>
| | * net: fec_mxc: Add support for mx6 solo-liteFabio Estevam2013-09-20-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Similarly as mx25 and mx53, mx6solo-lite needs to setup the MII gasket for RMII mode. Add support for mx6solo-lite. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | net, phy, cpsw: fix NULL pointer deferenceHeiko Schocher2013-09-20-1/+9
| |/ | | | | | | | | | | | | | | | | | | | | if phy_connect() did not find a phy, phydev is NULL and following code in cpsw_phy_init() crashes. Fix this. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
* | SPDX: fix IBM-pibs license identifierWolfgang Denk2013-09-20-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The SPDX License List version 1.19 now contains an official entry for the IBM-pibs license. However, instead of our suggestion "ibm-pibs", the SPDX License List uses "IBM-pibs", with the following rationale: "The reason being that all other SPDX License List short identifiers tend towards using capital letters unless spelling a word. I'd prefer to be consistent to this end". Change the license IDs to use the official name. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Cosmetic: Fix a number of typos, no functional changes.Robert P. J. Day2013-09-20-1/+1
|/ | | | | | | Fix various misspellings of things like "environment", "kernel", "default" and "volatile", and throw in a couple grammar fixes. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-05-0/+2
|\ | | | | | | | | | | | | | | Conflicts: drivers/serial/serial.c The conflict above was a trivial case of adding one init function in each branch, and manually resolved in merge.
| * fec_mxc: set ethaddr if fuses burned and not previously setEric Nelson2013-08-21-0/+2
| | | | | | | | | | | | | | | | | | Without this change, the following message is generated: Warning: FEC using MAC address from net device See doc/README.enetaddr for details. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* | Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-04-3/+9
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| * | net: macb: fix the following building warningBo Shen2013-08-22-3/+9
| |/ | | | | | | | | | | | | | | | | | | | | | | fix the following building warning ---8>--- macb.c: In function 'macb_init': macb.c:400:14: warning: 'phydev' may be used uninitialized in this function macb.c:377:21: note: 'phydev' was declared here ---<8--- Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | powerpc/t4240: add QSGMII interface supportShaohui Xie2013-08-20-2/+43
| | | | | | | | | | | | | | | | | | | | Also some fix for QSGMII. 1. fix QSGMII configure of Serdes2. 2. fix PHY address of QSGMII MAC9 & MAC10 for each FMAN. 3. fix dtb for QSGMII interface. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
* | SPDX-License-Identifier: convert BSD-3-Clause filesWolfgang Denk2013-08-19-3579/+144
| | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini Don't remove some copyrights by accident] Signed-off-by: Tom Rini <trini@ti.com>
* | SPDX-License-Identifier: convert PIBS licensed filesWolfgang Denk2013-08-19-44/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adapts the files that were derived from PIBS (PowerPC Initialization and Boot Software) codeto using SPDX License Identifiers. So far, SPDX has not assigned an official License ID for the PIBS license yet, so this should be considered preliminary. Note that the following files contained incorrect license information: arch/powerpc/cpu/ppc4xx/4xx_uart.c arch/powerpc/cpu/ppc4xx/start.S arch/powerpc/include/asm/ppc440.h These files included, in addition to the GPL-2.0 / ibm-pibs dual license as inherited from PIBS, a GPL-2.0+ license header which was obviously incorrect. This has been removed. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Wolfgang Denk <wd@denx.de> Conflicts: Licenses/README Acked-by: Stefan Roese <sr@denx.de>
* | net: ftmac110: Update tx/rx descriptor formatKuo-Jung Su2013-08-19-74/+82
| | | | | | | | | | | | | | | | 1. Reformat tx/rx descriptor as an uniform struct. 2. Replace uint32_t[2] with uint64_t for descriptor control. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Joe Hershberger <joe.hershberger@gmail.com>
* | net: ftmac110: struct ftmac110_regs __iomem * -> struct ftmac110_regs *Kuo-Jung Su2013-08-19-5/+5
| | | | | | | | | | Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Joe Hershberger <joe.hershberger@gmail.com>
* | net: ftmac110: Update license statementKuo-Jung Su2013-08-19-2/+2
| | | | | | | | | | Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Joe Hershberger <joe.hershberger@gmail.com>
* | net: phy/realtek: Add support for RTL8211DN and RTL8211E phy modulesBhupesh Sharma2013-08-19-26/+51
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for Realtek PHY modules RTL8211DN and RTL8211E (variants: RTL8211E-VB-CG, RTL8211E-VL-CG, RTL8211EG-VB-CG), which can be found on Freescale's T1040RDB boards. To make the driver more generic across 8211 family, a generic name 8211x is added for macros and function names. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
* | net: Use ARRAY_SIZE at appropriate placesAxel Lin2013-08-19-17/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use ARRAY_SIZE instead of having similar implementation in each drivers. The NUMELEMS defined in drivers/net/npe/include/IxOsalTypes.h is not used at all, so this patch removes it instead of converting it to use ARRAY_SIZE. Signed-off-by: Axel Lin <axel.lin@ingics.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Marek Vasut <marex@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: TsiChungLiew <Tsi-Chung.Liew@freescale.com> Cc: Wolfgang Denk <wd@denx.de> Cc: York Sun <yorksun@freescale.com>
* | phy: smsc: LAN8710/8720 are not Gbit PHYsFabio Estevam2013-08-19-1/+1
| | | | | | | | | | | | | | | | LAN8710/8720 are 10/100 Mbps PHYs, so fix the '.features' field. Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | Merge branch 'master' of git://88.191.163.10/u-boot-armTom Rini2013-08-18-6/+9
|\ \ | |/ | | | | | | | | | | | | | | | | Fixup an easy conflict over adding the clk_get prototype and USB_OTG defines for am33xx having moved. Conflicts: arch/arm/include/asm/arch-am33xx/hardware.h Signed-off-by: Tom Rini <trini@ti.com>
| * net, phy, cpsw: fix gigabit register accessHeiko Schocher2013-07-30-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | accessing a lan9303 switch with the cpsw driver results in wrong speed detection, as the switch sets the BMSR_ERCAP in BMSR register, and follow read of the MII_STAT1000 register fails, as the switch does not support it. Current code did not check, if a phy_read() fails ... fix this. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
| * drivers: net: cpsw: Enable statistics for all portMugunthan V N2013-07-26-0/+1
| | | | | | | | | | | | Enable hardware statistics for all ports, enabling only to host port is useless Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * drivers: net: cpsw: remove hard coding bd ram for cpswMugunthan V N2013-07-26-3/+1
| | | | | | | | | | | | | | BD ram address may vary in various SOC, so removing the hardcoding and passing the same information through platform data Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
| * Merge branch 'u-boot/master' into u-boot-arm/masterAlbert ARIBAUD2013-07-25-1502/+110
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| * | net: calxedaxgmac: enable rx cut-thruRob Herring2013-07-25-1/+1
| | | | | | | | | | | | | | | | | | | | | There is no reason to wait for the entire frame to start DMA on receive, so enable rx cut-thru for better performance. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | | drivers/fm: Fix compiling error if FW location is not definedYork Sun2013-08-09-0/+2
| |/ |/| | | | | | | | | | | FMAN firmware can be in NOR flash, NAND flash, SPI flash, MMC or even remote. In case none of them is defined, set it to null. Signed-off-by: York Sun <yorksun@freescale.com>
* | net: pcnet: use pci_virt_to_mem to obtain buffer addressesGabor Juhos2013-07-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The pcnet driver uses the pci_phys_to_mem function to get the memory address of the DMA buffers. This This assumes an 1:1 mapping between the PCI and physical memory which is not true on all platforms. On MIPS platform U-Boot is running within a mapped memory region, and the pci_phys_to_mem macro can't be used to obtain the memory address of the buffers. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* | Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-1501/+109
|/ | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* net: phy: Set SUPPORTED_1000baseX_Half flag in ESTATUS_1000_XHALF caseFabio Estevam2013-07-19-1/+1
| | | | | | | | | | | | | Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the checking for ESTATUS_1000_XHALF, but it incorrectly sets the SUPPORTED_1000baseX_Full flag in this case. Set the SUPPORTED_1000baseX_Half flag instead. Acked-by: Charles Coldwell <coldwell@gmail.com> Reviewed-By: Sascha Silbe <t-uboot@infra-silbe.de> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* phy: fix 10/100Mbps operation on 1Gbps-capable linksSascha Silbe2013-07-19-1/+9
| | | | | | | | | | | | | | | | | de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a check for the extended status register in order to support 1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since Extended Status only indicates what the PHY (i.e. the local side) is capable of, this broke communication with non-1Gbps peers. Only check the extended status if the 1000BASE-T registers are actually missing so we don't end up setting speed to 1Gbps even though the previous test (for the combination of local and peer support for 1Gbps) already indicated we can't do 1Gbps with the current peer. Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-07-12-1/+22
|\ | | | | | | | | | | | | | | | | | | Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and serial. Conflicts: arch/arm/dts/exynos5250.dtsi Signed-off-by: Tom Rini <trini@ti.com>
| * Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-07-12-1/+22
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| | * net: fec: Avoid MX28 bus sync issueMarek Vasut2013-07-12-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MX28 multi-layer AHB bus can be too slow and trigger the FEC DMA too early, before all the data hit the DRAM. This patch ensures the data are written in the RAM before the DMA starts. Please see the comment in the patch for full details. This patch was produced with an amazing help from Albert Aribaud, who pointed out it can possibly be such a bus synchronisation issue. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
| | * net: fec: Remove bogus flush_dcache_range() callMarek Vasut2013-07-12-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove incorrectly called and duplicate flush_dcache_range() call from fec_mxc driver. The call is not needed, since the caches are already flushed in fec_tbd_init(), moreover the second argument should be the ending address, not size. Signed-off-by: Marek Vasut <marex@denx.de> Reported-by: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@ti.com>
* | | phylib: add atheros ar803x phyHeiko Schocher2013-06-24-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | add atheros ar803x phy, used on the upcoming siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Joe Hershberger <joe.hershberger@gmail.com>
* | | phylib: add natsemi dp83630 phyHeiko Schocher2013-06-24-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | add natsemi dp83630 phy, used on the upcoming siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Joe Hershberger <joe.hershberger@gmail.com>
* | | net: update FTGMAC100 for MMU/D-cache supportKuo-Jung Su2013-06-24-21/+49
| | | | | | | | | | | | | | | | | | Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Joe Hershberger <joe.hershberger@gmail.com> CC: Tom Rini <trini@ti.com>
* | | net: add Faraday FTMAC110 10/100Mbps ethernet supportKuo-Jung Su2013-06-24-0/+651
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Faraday FTMAC110 10/100Mbps supports half-word data transfer for Linux. However it has a weird DMA alignment issue: (1) Tx DMA Buffer Address: 1 bytes aligned: Invalid 2 bytes aligned: O.K 4 bytes aligned: O.K (2) Rx DMA Buffer Address: 1 bytes aligned: Invalid 2 bytes aligned: O.K 4 bytes aligned: Invalid!!! Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com>
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