summaryrefslogtreecommitdiff
path: root/drivers/net
Commit message (Collapse)AuthorAgeLines
* net: dc2114x: check for apropriate commandLinus Walleij2011-10-22-3/+5
| | | | | | | | | The code had two paths depending on whether the card was to be accessed from plain memory or the IO region. However the error path checks whether IO region was obtained - twice. Fix up the error path according to the probable intention. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* ftgmac100: reset fix when supports wake on lanMacpaul Lin2011-10-22-2/+2
| | | | | | | | | | | | | | | | | | | | | This patch move the reset function from initialization to driver register procedure. Some embedded system supports wake on lan nowadays. On this kind of system, the ftgmac100 will be still supplied power after the system has been shut-down by Linux. Hence the register used by linux won't be clear when the system has been powered-off. The origin ftgmac100 driver in u-boot will only register driver and functions to network stack and won't reset the ftgmac100 hardware if the network won't be used during boot-up. This will lead ftgmac100 continue receiving packets and then might corrupt linux kernel when booting up. So we reorder the hardware reset function earlier to force the hardware to be reset whether it will be used or not. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)Timur Tabi2011-10-20-1/+1
| | | | | | | | The work-around for P4080 erratum SERDES9 says that the SERDES receiver lanes should be reset after the XAUI starts tranmitting alignment signals. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fm: Don't allow disabling of FM1-DTSEC1Kumar Gala2011-10-18-0/+20
| | | | | | | | The MDIO controller to talk to external PHYs is on FM1-DTSEC1 so don't allow disabling. If we disable it we end up powering the block down in the SoC and thus can't communicate to any external PHYs. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fm-eth: Don't mark the MAC we use for MDIO as disabled in device treeKumar Gala2011-10-18-2/+8
| | | | | | | | FM1-DTSEC1's MAC was being marked as disabled if the port was not configured based on the SoC configuration. However we utilize the MAC interface for MDIO and thus should NOT mark it disabled. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* DM9000:Add a byte swap macro for dm9000 io operation.Jason Jin2011-10-17-1/+9
| | | | | | | | | | | | | commit a45dde2293c816138e53c26eca6fd0322583f9a6 changed the dm9000 direct register access to standard IO. This should work on the ColdFire platform as there are corresponding macros for the LE devices. But the hardware settings on some ColdFire boards had swapped the byte order which make the original macros such as out_le16 cannot work. To avoid changing the common io access code on ColdFire platform, the DM9000_BYTE_SWAPPED define was added to make the dm9000 use __raw* IO access on some ColdFire boards. Signed-off-by: Jason Jin <Jason.jin@freescale.com>
* net: axi_ethernet: Add driver to u-bootMichal Simek2011-10-15-0/+665
| | | | | | | | | | Add axi_ethernet driver for little-endian Microblaze. RX/TX BDs and rxframe buffer are shared among all axi_ethernet MACs. Only one MAC can work in one time. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Mike Frysinger <vapier@gentoo.org>
* net: emaclite: Fix coding styleMichal Simek2011-10-15-30/+27
| | | | | | Coding style should follow linux coding style. Signed-off-by: Michal Simek <monstr@monstr.eu>
* net: emaclite: Use PKTSIZE directlyMichal Simek2011-10-15-6/+4
| | | | | | Do not setup additional ENET_MAX_MTU macro. Signed-off-by: Michal Simek <monstr@monstr.eu>
* net: emaclite: Setup RX/TX ping pong for every instanceMichal Simek2011-10-15-55/+68
| | | | | | | Setup RX/TX ping-pong buffer for every emaclite IP separately. The next patch move initialization directly to board code. Signed-off-by: Michal Simek <monstr@monstr.eu>
* phylib: wait for TN2020 to achieve SERDES lane alignment at startupTimur Tabi2011-10-13-0/+33
| | | | | | | | | | Before the Teranetics TN2020 PHY can be used, the SERDES lanes need to be aligned, so wait for lane alignment before completing the startup sequence. Note that this process can take up to three seconds. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p3060: remove all references to RCW bits EC1_EXT, EC2_EXT, and EC3Timur Tabi2011-10-13-17/+0
| | | | | | | | The EC1_EXT, EC2_EXT, and EC3 bits in the RCW don't officially exist on the P3060 and should always be set to zero. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: fix null pointer dereference when init the SGMII TBI PHYTimur Tabi2011-10-09-2/+3
| | | | | | | | | | | | | | | Function dtsec_configure_serdes() needs to know where the TBI PHY registers are in order to configure SGMII for proper SerDes operation. During SGMII initialzation, fm_eth_init_mac() passing NULL for 'phyregs' when it called init_dtsec(), because it was believed that phyregs was not used. In fact, it is used by dtsec_configure_serdes() to configure the TBI PHY registers. We also need to define the PHY registers in struct fm_mdio. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* phylib: Work around bug in Teranetics PHYAndy Fleming2011-10-09-1/+20
| | | | | | | | | | | The Teranetics PHY does not properly report the link state for fiber connections. The new PHY code actually checked the link, and so the FM driver would refuse to talk over a linkless PHY. But the link may actually be up, so now we always report it as up for fiber connections on the tn2020. Signed-off-by: Andy Fleming <afleming@freescale.com>
* drivers/net/smc91111.c: fix warning: variable ... set but not usedWolfgang Denk2011-10-09-8/+0
| | | | | | | | | Fix: smc91111.c: In function 'smc_phy_configure': smc91111.c:1194:6: warning: variable 'failed' set but not used [-Wunused-but-set-variable] smc91111.c:1190:7: warning: variable 'phyaddr' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de>
* netconsole: support packets longer than 512 bytesMichael Walle2011-10-09-4/+7
| | | | | | | | Esp. while printing the environment the output is usually longer than 512 bytes. Instead of cutting the message, send multiple 512 bytes packets. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Mike Frysinger <vapier@gentoo.org>
* net: drop !NET_MULTI codeMike Frysinger2011-10-05-11/+2
| | | | | | | | | | | This is long over due. All but two net drivers have been converted, but those have now been dropped. The only thing left to do is actually delete all references to NET_MULTI and code that is compiled when that is not defined. So here we scrub the core code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* net: drop !NET_MULTI ns7520 driverMike Frysinger2011-10-05-851/+0
| | | | | | | This driver was never converted to NET_MULTI, and no board uses it. So punt it and be done. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* net: drop !NET_MULTI bcm570x/tigon3 driversMike Frysinger2011-10-05-12876/+0
| | | | | | | | | | | These drivers have never been converted to NET_MULTI, and they are only used by one board (BMW). So drop the drivers until someone feels like rewriting them for NET_MULTI support. Rather than punting the BMW board completely, just disable net support in its board config. Seems to build fine without it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-10-04-0/+2349
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for setting up RAID engine liodns on P5020 powerpc/85xx: Refactor some defines out of corenet_ds.h fm-eth: Add ability for board code to disable a port powerpc/mpc8548: Add workaround for erratum NMG_LBC103 powerpc/mpc8548: Add workaround for erratum NMG_DDR120 powerpc/mpc85xxcds: Fix PCI speed powerpc/mpc8548cds: Fix booting message powerpc/p4080: Add support for secure boot flow powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards powerpc/p2041rdb: remove watch dog related codes powerpc/p2041rdb: updated description of cpld command powerpc/p2041rdb: add more ddr frequencies support powerpc/p2041rdb: set sysclk according to status of physical switch SW1 powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver powerpc/mpc8xxx: Add DDR2 to unified DDR driver powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en powerpc/85xx: Refactor P2041RDB to use common p_corenet files powerpc/85xx: refactor common P-Series CoreNet files for FSL boards powerpc/85xx: Enable CMD_REGINFO on corenet boards powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries powerpc/85xx: Fix USB protocol definitions for P1020RDB powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM powerpc/mpc8xxx: Move DDR RCW overriding to common code powerpc/mpc8xxx: Extend CWL table powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 powerpc/85xx: Cleanup extern in corenet_ds board code powerpc/p2041rdb: Add ethernet support on P2041RDB board powerpc/85xx: Add networking support to P1023RDS powerpc/hydra: Add ethernet support on P5020/P3041 DS boards powerpc/85xx: Add FMan ethernet support to P4080DS powerpc/85xx: Add support for FMan ethernet in Independent mode powerpc/mpc8548cds: Cleanup mpc8548cds.c powerpc/mp: add support for discontiguous cores powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries fdt: Add new fdt_create_phandle helper fdt: Rename fdt_create_phandle to fdt_set_phandle powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010) powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC) fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010) powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB nand: Freescale Integrated Flash Controller NAND support powerpc/85xx: Add basic support for P1010RDB powerpc/85xx: Add support for new P102x/P2020 RDB style boards powerpc/85xx: relocate CCSR before creating the initial RAM area powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
| * powerpc/p3060: Add SoC related support for P3060 platformShengzhou Liu2011-10-03-0/+110
| | | | | | | | | | | | | | | | | | | | | | Add P3060 SoC specific information:cores setup, LIODN setup, etc The P3060 SoC combines six e500mc Power Architecture processor cores with high-performance datapath acceleration architecture(DPAA), CoreNet fabric infrastructure, as well as network and peripheral interfaces. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fm-eth: Add ability for board code to disable a portKumar Gala2011-10-03-0/+27
| | | | | | | | | | | | | | | | | | | | The SoC configuration may have more ports enabled than a given board actually can utilize. Add a routinue that allows the board code to disable a port that it knows isn't being used. fm_disable_port() needs to be called before cpu_eth_init(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add support for FMan ethernet in Independent modeKumar Gala2011-09-29-0/+2212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration architecture) is the ethernet contoller block. Normally it is utilized via Queue Manager (Qman) and Buffer Manager (Bman). However for boot usage the FMan supports a mode similar to QE or CPM ethernet collers called Independent mode. Additionally the FMan block supports multiple 1g and 10g interfaces as a single entity in the system rather than each controller being managed uniquely. This means we have to initialize all of Fman regardless of the number of interfaces we utilize. Different SoCs support different combinations of the number of FMan as well as the number of 1g & 10g interfaces support per Fman. We add support for the following SoCs: * P1023 - 1 Fman, 2x1g * P4080 - 2 Fman, each Fman has 4x1g and 1x10g * P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Dai Haruki <dai.haruki@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | net: emaclite: Use dynamic allocationMichal Simek2011-10-03-16/+25
| | | | | | | | | | | | | | Every emaclite instance use own setting. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | net: emaclite: Remove baseaddress from xemacliteMichal Simek2011-10-03-21/+21
| | | | | | | | | | | | Use dev->iobase instead of baseaddress. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | net: emaclite: Use calloc instead of mallocMichal Simek2011-10-03-2/+1
| | | | | | | | | | | | | | Simplify driver logic and clear eth_device structure in one command. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | net: emaclite: Remove deviceid propertyMichal Simek2011-10-03-1/+0
| | | | | | | | | | | | Cleanup structure. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | net: emaclite: Change driver name and add addressMichal Simek2011-10-03-1/+1
| | | | | | | | | | | | | | | | | | Current xilinx emaclite use net multi registration but doesn't support several emaclites interfaces. Changing driver name with adding address to name is the first step how to distiguish several drivers. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | FEC: Move imx_get_mac_from_fuse() definition to fec_mxc.hMarek Vasut2011-09-30-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Squish "got MAC from fuse" message, make it debug()Marek Vasut2011-09-30-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Add timeout for chip resetMarek Vasut2011-09-30-4/+21
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Allow registering MII postconfiguration callbackMarek Vasut2011-09-30-1/+14
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Allow multiple FECesMarek Vasut2011-09-30-30/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows user to register multiple FEC controllers. To preserve compatibility with older boards, the mxcfec_register() call is still in place. To use multiple controllers, new macro is in place, the mxcfec_register_multi(), which takes more arguments. The syntax is: mxcfec_register_multi(bd, FEC ID, FEC PHY ID on the MII bus, base address); To disable the fecmxc_register() compatibility stuff, define the macro CONFIG_FEC_MXC_MULTI. This will remove the requirement for defining IMX_FEC_BASE and CONFIG_FEC_MXC_PHYADDR. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Abstract access to fec->eth in MII operationsMarek Vasut2011-09-30-8/+10
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Allow selection of MII mode via CONFIG_FEC_XCV_TYPEMarek Vasut2011-09-30-1/+5
| | | | | | | | | | | | | | | | | | | | The default is MII100, which was hardcoded previously in the driver. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Add RMII mode supportMarek Vasut2011-09-30-1/+5
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Kill mode select FIXME'sMarek Vasut2011-09-30-12/+14
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Use defined constant instead of magic numberMarek Vasut2011-09-30-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Use proper accessor to read register in debug callMarek Vasut2011-09-30-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | net, davinci_emac: let the EMAC detect the PHYsHeiko Schocher2011-09-30-0/+3
| | | | | | | | | | | | | | | | | | | | | | Once the MDIO state machine has been initialized and enabled, it starts polling all 32 PHY addresses on the MDIO bus, looking for an active PHY. Add a 5 ms delay, so all PHYs are for sure detected. This problem was detected on the cmc board with a KSZ8864 switch. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | net, davinci_emac: make less verbose - turn printf() into debug()Heiko Schocher2011-09-30-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PHY driver was too verbose and corrupted the boot message display like this: ... Net: Ethernet PHY: KSZ8873 @ 0x02 DaVinci-EMAC ... Turn printf() into debug() so we get the expected output again: ... Net: DaVinci-EMAC ... Signed-off-by: Heiko Schocher <hs@denx.de> cc: Paulraj Sandeep <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | net, davinci_emac: add KSZ8864 switchHeiko Schocher2011-09-30-0/+7
| | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | net: Adds Fast Ethernet Controller driver for Armada100Ajay Bhargav2011-09-30-0/+969
|/ | | | | | | | This patch adds support for Fast Ethernet Controller driver for Armada100 series. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* Revert "phylib: remove a couple of redundant code lines"Wolfgang Denk2011-09-28-2/+5
| | | | | | | | | | | | | | | | | | | | | | This reverts commit 041c542219af7f31c372d89b4c7c6f4c8064a8ce. The lines removed by this commit weren't redundant. The logic is (and probably should be better commented): Find the intersection of the advertised capabilities of both sides of the link (lpa). From that intersection, find the highest capability we can run at (that will be the negotiated link). Now imagine that the intersection (lpa) is (LPA_100HALF | LPA_10FULL). The code will now set phydev->speed to 100, and phydev->duplex to 1, but this link does not support 100FULL. Kudos to Andy Fleming <afleming@gmail.com> for binging this to attention and for the explanation. Signed-off-by: Wolfgang Denk <wd@denx.de>
* KS8695: convert KS8695 eth driver to CONFIG_MULTI_ETHGreg Ungerer2011-09-10-14/+28
| | | | | | | Trivial conversion of the ks8695eth driver to a CONFIG_MULTI_ETH type driver. Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
* phylib: remove a couple of redundant code linesVladimir Zapolskiy2011-09-10-5/+2
| | | | | | | | This change slightly improves readability of the phydev speed/duplex assignment logic. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Detlev Zundel <dzu@denx.de>
* phylib: reset mii bus only if reset handler is registeredVladimir Zapolskiy2011-09-10-1/+2
| | | | | | | | This change allows to cope with a mii bus device registered using miiphy_register(), which doesn't assign a default reset handler. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Detlev Zundel <dzu@denx.de>
* smc911x: Fix build warningsWolfgang Denk2011-09-09-2/+2
| | | | | | | | | | | | Commit 6af1d41 "smc911x MII made available" was missing a few "const" qualifiers. Fix the resulting in build warnings: smc911x.c: In function 'smc911x_initialize': smc911x.c:297: warning: passing argument 2 of 'miiphy_register' from incompatible pointer type smc911x.c:297: warning: passing argument 3 of 'miiphy_register' from incompatible pointer type Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Helmut Raiger <helmut.raiger@hale.at>
* smc911x MII made availableHelmut Raiger2011-09-07-6/+30
| | | | | | | The driver already had the MII functions, but they have not been registered using miiphy_register(). Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
* da850: fix the channel number for EMAC teardown initNagabhushana Netagunte2011-09-04-2/+2
| | | | | | | | | | TX and RX channel numbers programmed as '1' during EMAC teardown initialization is wrong. This patch fixes the same by setting channel number to '0' which is used by U-boot. Signed-off-by: Sugumar Natarajan <sugumar@ti.com> Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
generated by cgit v1.1 at 2024-07-08 18:04:26 +0000