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* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-10-04-0/+2349
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for setting up RAID engine liodns on P5020 powerpc/85xx: Refactor some defines out of corenet_ds.h fm-eth: Add ability for board code to disable a port powerpc/mpc8548: Add workaround for erratum NMG_LBC103 powerpc/mpc8548: Add workaround for erratum NMG_DDR120 powerpc/mpc85xxcds: Fix PCI speed powerpc/mpc8548cds: Fix booting message powerpc/p4080: Add support for secure boot flow powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards powerpc/p2041rdb: remove watch dog related codes powerpc/p2041rdb: updated description of cpld command powerpc/p2041rdb: add more ddr frequencies support powerpc/p2041rdb: set sysclk according to status of physical switch SW1 powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver powerpc/mpc8xxx: Add DDR2 to unified DDR driver powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en powerpc/85xx: Refactor P2041RDB to use common p_corenet files powerpc/85xx: refactor common P-Series CoreNet files for FSL boards powerpc/85xx: Enable CMD_REGINFO on corenet boards powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries powerpc/85xx: Fix USB protocol definitions for P1020RDB powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM powerpc/mpc8xxx: Move DDR RCW overriding to common code powerpc/mpc8xxx: Extend CWL table powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 powerpc/85xx: Cleanup extern in corenet_ds board code powerpc/p2041rdb: Add ethernet support on P2041RDB board powerpc/85xx: Add networking support to P1023RDS powerpc/hydra: Add ethernet support on P5020/P3041 DS boards powerpc/85xx: Add FMan ethernet support to P4080DS powerpc/85xx: Add support for FMan ethernet in Independent mode powerpc/mpc8548cds: Cleanup mpc8548cds.c powerpc/mp: add support for discontiguous cores powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries fdt: Add new fdt_create_phandle helper fdt: Rename fdt_create_phandle to fdt_set_phandle powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010) powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC) fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010) powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB nand: Freescale Integrated Flash Controller NAND support powerpc/85xx: Add basic support for P1010RDB powerpc/85xx: Add support for new P102x/P2020 RDB style boards powerpc/85xx: relocate CCSR before creating the initial RAM area powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
| * powerpc/p3060: Add SoC related support for P3060 platformShengzhou Liu2011-10-03-0/+110
| | | | | | | | | | | | | | | | | | | | | | Add P3060 SoC specific information:cores setup, LIODN setup, etc The P3060 SoC combines six e500mc Power Architecture processor cores with high-performance datapath acceleration architecture(DPAA), CoreNet fabric infrastructure, as well as network and peripheral interfaces. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * fm-eth: Add ability for board code to disable a portKumar Gala2011-10-03-0/+27
| | | | | | | | | | | | | | | | | | | | The SoC configuration may have more ports enabled than a given board actually can utilize. Add a routinue that allows the board code to disable a port that it knows isn't being used. fm_disable_port() needs to be called before cpu_eth_init(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add support for FMan ethernet in Independent modeKumar Gala2011-09-29-0/+2212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration architecture) is the ethernet contoller block. Normally it is utilized via Queue Manager (Qman) and Buffer Manager (Bman). However for boot usage the FMan supports a mode similar to QE or CPM ethernet collers called Independent mode. Additionally the FMan block supports multiple 1g and 10g interfaces as a single entity in the system rather than each controller being managed uniquely. This means we have to initialize all of Fman regardless of the number of interfaces we utilize. Different SoCs support different combinations of the number of FMan as well as the number of 1g & 10g interfaces support per Fman. We add support for the following SoCs: * P1023 - 1 Fman, 2x1g * P4080 - 2 Fman, each Fman has 4x1g and 1x10g * P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Dai Haruki <dai.haruki@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com> Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | net: emaclite: Use dynamic allocationMichal Simek2011-10-03-16/+25
| | | | | | | | | | | | | | Every emaclite instance use own setting. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | net: emaclite: Remove baseaddress from xemacliteMichal Simek2011-10-03-21/+21
| | | | | | | | | | | | Use dev->iobase instead of baseaddress. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | net: emaclite: Use calloc instead of mallocMichal Simek2011-10-03-2/+1
| | | | | | | | | | | | | | Simplify driver logic and clear eth_device structure in one command. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | net: emaclite: Remove deviceid propertyMichal Simek2011-10-03-1/+0
| | | | | | | | | | | | Cleanup structure. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | net: emaclite: Change driver name and add addressMichal Simek2011-10-03-1/+1
| | | | | | | | | | | | | | | | | | Current xilinx emaclite use net multi registration but doesn't support several emaclites interfaces. Changing driver name with adding address to name is the first step how to distiguish several drivers. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | FEC: Move imx_get_mac_from_fuse() definition to fec_mxc.hMarek Vasut2011-09-30-0/+2
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Squish "got MAC from fuse" message, make it debug()Marek Vasut2011-09-30-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Add timeout for chip resetMarek Vasut2011-09-30-4/+21
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Allow registering MII postconfiguration callbackMarek Vasut2011-09-30-1/+14
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Allow multiple FECesMarek Vasut2011-09-30-30/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allows user to register multiple FEC controllers. To preserve compatibility with older boards, the mxcfec_register() call is still in place. To use multiple controllers, new macro is in place, the mxcfec_register_multi(), which takes more arguments. The syntax is: mxcfec_register_multi(bd, FEC ID, FEC PHY ID on the MII bus, base address); To disable the fecmxc_register() compatibility stuff, define the macro CONFIG_FEC_MXC_MULTI. This will remove the requirement for defining IMX_FEC_BASE and CONFIG_FEC_MXC_PHYADDR. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Abstract access to fec->eth in MII operationsMarek Vasut2011-09-30-8/+10
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Allow selection of MII mode via CONFIG_FEC_XCV_TYPEMarek Vasut2011-09-30-1/+5
| | | | | | | | | | | | | | | | | | | | The default is MII100, which was hardcoded previously in the driver. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Add RMII mode supportMarek Vasut2011-09-30-1/+5
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Kill mode select FIXME'sMarek Vasut2011-09-30-12/+14
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Use defined constant instead of magic numberMarek Vasut2011-09-30-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | FEC: Use proper accessor to read register in debug callMarek Vasut2011-09-30-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | net, davinci_emac: let the EMAC detect the PHYsHeiko Schocher2011-09-30-0/+3
| | | | | | | | | | | | | | | | | | | | | | Once the MDIO state machine has been initialized and enabled, it starts polling all 32 PHY addresses on the MDIO bus, looking for an active PHY. Add a 5 ms delay, so all PHYs are for sure detected. This problem was detected on the cmc board with a KSZ8864 switch. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | net, davinci_emac: make less verbose - turn printf() into debug()Heiko Schocher2011-09-30-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PHY driver was too verbose and corrupted the boot message display like this: ... Net: Ethernet PHY: KSZ8873 @ 0x02 DaVinci-EMAC ... Turn printf() into debug() so we get the expected output again: ... Net: DaVinci-EMAC ... Signed-off-by: Heiko Schocher <hs@denx.de> cc: Paulraj Sandeep <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | net, davinci_emac: add KSZ8864 switchHeiko Schocher2011-09-30-0/+7
| | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | net: Adds Fast Ethernet Controller driver for Armada100Ajay Bhargav2011-09-30-0/+969
|/ | | | | | | | This patch adds support for Fast Ethernet Controller driver for Armada100 series. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* Revert "phylib: remove a couple of redundant code lines"Wolfgang Denk2011-09-28-2/+5
| | | | | | | | | | | | | | | | | | | | | | This reverts commit 041c542219af7f31c372d89b4c7c6f4c8064a8ce. The lines removed by this commit weren't redundant. The logic is (and probably should be better commented): Find the intersection of the advertised capabilities of both sides of the link (lpa). From that intersection, find the highest capability we can run at (that will be the negotiated link). Now imagine that the intersection (lpa) is (LPA_100HALF | LPA_10FULL). The code will now set phydev->speed to 100, and phydev->duplex to 1, but this link does not support 100FULL. Kudos to Andy Fleming <afleming@gmail.com> for binging this to attention and for the explanation. Signed-off-by: Wolfgang Denk <wd@denx.de>
* KS8695: convert KS8695 eth driver to CONFIG_MULTI_ETHGreg Ungerer2011-09-10-14/+28
| | | | | | | Trivial conversion of the ks8695eth driver to a CONFIG_MULTI_ETH type driver. Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
* phylib: remove a couple of redundant code linesVladimir Zapolskiy2011-09-10-5/+2
| | | | | | | | This change slightly improves readability of the phydev speed/duplex assignment logic. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Detlev Zundel <dzu@denx.de>
* phylib: reset mii bus only if reset handler is registeredVladimir Zapolskiy2011-09-10-1/+2
| | | | | | | | This change allows to cope with a mii bus device registered using miiphy_register(), which doesn't assign a default reset handler. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Detlev Zundel <dzu@denx.de>
* smc911x: Fix build warningsWolfgang Denk2011-09-09-2/+2
| | | | | | | | | | | | Commit 6af1d41 "smc911x MII made available" was missing a few "const" qualifiers. Fix the resulting in build warnings: smc911x.c: In function 'smc911x_initialize': smc911x.c:297: warning: passing argument 2 of 'miiphy_register' from incompatible pointer type smc911x.c:297: warning: passing argument 3 of 'miiphy_register' from incompatible pointer type Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Helmut Raiger <helmut.raiger@hale.at>
* smc911x MII made availableHelmut Raiger2011-09-07-6/+30
| | | | | | | The driver already had the MII functions, but they have not been registered using miiphy_register(). Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
* da850: fix the channel number for EMAC teardown initNagabhushana Netagunte2011-09-04-2/+2
| | | | | | | | | | TX and RX channel numbers programmed as '1' during EMAC teardown initialization is wrong. This patch fixes the same by setting channel number to '0' which is used by U-boot. Signed-off-by: Sugumar Natarajan <sugumar@ti.com> Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* phy.c: make less verbose - turn printf() into debug()Wolfgang Denk2011-08-31-1/+1
| | | | | | | | | | | | | | | | | | | | The PHY driver was too verbose and corrupted the boot message display like this: ... Net: TSEC0 connected to Marvell 88E1111S TSEC1 connected to Marvell 88E1111S TSEC0, TSEC1 ... Turn printf() into debug() so we het the expected output again: ... Net: TSEC0, TSEC1 ... Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Kumar Gala <galak@kernel.crashing.org>
* Add Ethernet hardware MAC address framework to usbnetSimon Glass2011-08-08-1/+1
| | | | | | | | | | | | Built-in Ethernet adapters support setting the mac address by means of a ethaddr environment variable for each interface (ethaddr, eth1addr, eth2addr). This adds similar support to the USB network side, using the names usbethaddr, usbeth1addr, etc. They are kept separate since we don't want a USB device taking the MAC address of a built-in device or vice versa. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Eric Bénard <eric@eukrea.com>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2011-08-02-7/+7
|\ | | | | | | | | * 'master' of git://git.denx.de/u-boot-ppc4xx: net/4xx: Install interrupt handler after driver registration
| * net/4xx: Install interrupt handler after driver registrationStefan Roese2011-07-28-7/+7
| | | | | | | | | | | | | | | | | | | | Only install der 4xx-EMAC interrupt handlers *after* the core network driver is registered. This problem was noticed on the APM Taishan 440GX board, where the board hung upon bootup after displaying "Net:". Signed-off-by: Stefan Roese <sr@denx.de>
* | cleanup: Fix typos and misspellings in various files.Mike Williams2011-07-28-4/+4
|/ | | | | | | | | | | Recieve/Receive recieve/receive Interupt/Interrupt interupt/interrupt Addres/Address addres/address Signed-off-by: Mike Williams <mike@mikebwilliams.com>
* net: Add SMSC89128 supportPhil Edworthy2011-07-27-0/+2
| | | | | Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* phylib: Detect link on 10G devices correctlyAndy Fleming2011-07-27-2/+6
| | | | | | | | | | | | | | | | gen10g_startup() had 2 bugs: 1) It had a boolean logic error in checking the MMD mask, and always checked all of them. 2) It checked devices which don't actually report link state, which meant that it would never believe the link was fully up. Fix the boolean logic, and then mask the MMD mask so only link-reporting devices are checked. Signed-off-by: Andy Fleming <afleming@freescale.com> Reported-by: Ed Swarthout <Ed.Swarthout@freescale.com>
* net: designware: fix uninitialized phy_addr usageMike Frysinger2011-07-25-0/+2
| | | | | | | | | | | | When CONFIG_DW_SEARCH_PHY is disabled, the local phy_addr variable never gets initialized which causes random behavior at runtime and a gcc warning. So set it by default to the stored phy address. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Vipin Kumar <vipin.kumar@st.com> Fix commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
* net: designware: fix unused warning when CONFIG_DW_AUTONEG is enabledMike Frysinger2011-07-25-1/+3
| | | | | | | | The ctrl variable is only used when autoneg support is disabled, so only declare it under those conditions to avoid an unused variable warning. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Reviewed-by: Vipin Kumar <vipin.kumar@st.com>
* Timer: Fix misuse of ARM *timer_masked() functions outside arch/armGraeme Russ2011-07-16-8/+10
| | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* macb: fix compile warningandreas.devel@googlemail.com2011-06-21-2/+3
| | | | | | | | | | | This patch fixes following compile warning: ---8<--- macb.c: In function 'macb_write_hwaddr': macb.c:525:2: warning: dereferencing type-punned pointer will break strict-aliasing rules --->8--- Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
* at91_emac: fix compile warningandreas.devel@googlemail.com2011-06-21-5/+7
| | | | | | | | | | | This patch removes the warning ---8<--- at91_emac.c: In function 'at91emac_write_hwaddr': at91_emac.c:487:2: warning: dereferencing type-punned pointer will break strict-aliasing rules --->8--- Signed-off-by: Andreas Bießmann <andreas.devel@gmail.com>
* update arm/at91rm9200 work with rework rework110202Jens Scharsig2011-06-21-16/+16
| | | | | | | | | | | * convert at91rm9200ek and eb_cpux9k2 board to ATMEL_xxx name scheme * Fix: timer.c compile error io.h not found with arm/at91rm9200 * update arm920t/at91 to ATMEL_xxx name scheme * update arm920t/at91 soc lib * update at91_emac driver Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Tested-by: Andreas Bießmann <andreas.devel@gmail.com>
* mvgbe: enable configurability of PORT_SERIAL_CONTROL_VALUEValentin Longchamp2011-05-31-0/+2
| | | | | | | | | | | | This allows this configuration to be defined differently for some boards that request it. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Holger Brunck <holger.brunck@keymile.com> cc: Heiko Schocher <hs@denx.de> cc: Wolfgang Denk <wd@denx.de> cc: Detlev Zundel <dzu@denx.de> cc: Prafulla Wadaskar <prafulla@marvell.com>
* Minor coding style cleanup.Wolfgang Denk2011-05-19-2/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* ATMEL: fix related common atmel driver filesReinhard Meyer2011-05-18-6/+8
| | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* net: xilinx emaclite: Fix return valuesMichal Simek2011-05-12-7/+7
| | | | | | Fix return values for initialize/init/recv/send functions Signed-off-by: Michal Simek <monstr@monstr.eu>
* NET: pass source IP address to packet handlersLuca Ceresoli2011-05-12-2/+3
| | | | | | | | | | This is needed for the upcoming TFTP server implementation. This also simplifies PingHandler() and fixes rxhand_f documentation. Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
* tsec: Convert tsec to use PHY LibAndy Fleming2011-04-20-1505/+219
| | | | | | | | | | | | | This converts tsec to use the new PHY Lib. All of the old PHY support is ripped out. The old MDIO driver is split off, and placed in fsl_mdio.c. The initialization is modified to initialize the MDIO driver as well. The powerpc config file is modified to configure PHYLIB if TSEC_ENET is configured. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
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