summaryrefslogtreecommitdiff
path: root/drivers/net/phy
Commit message (Collapse)AuthorAgeLines
* Revert "phylib: remove a couple of redundant code lines"Wolfgang Denk2011-09-28-2/+5
| | | | | | | | | | | | | | | | | | | | | | This reverts commit 041c542219af7f31c372d89b4c7c6f4c8064a8ce. The lines removed by this commit weren't redundant. The logic is (and probably should be better commented): Find the intersection of the advertised capabilities of both sides of the link (lpa). From that intersection, find the highest capability we can run at (that will be the negotiated link). Now imagine that the intersection (lpa) is (LPA_100HALF | LPA_10FULL). The code will now set phydev->speed to 100, and phydev->duplex to 1, but this link does not support 100FULL. Kudos to Andy Fleming <afleming@gmail.com> for binging this to attention and for the explanation. Signed-off-by: Wolfgang Denk <wd@denx.de>
* phylib: remove a couple of redundant code linesVladimir Zapolskiy2011-09-10-5/+2
| | | | | | | | This change slightly improves readability of the phydev speed/duplex assignment logic. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Detlev Zundel <dzu@denx.de>
* phylib: reset mii bus only if reset handler is registeredVladimir Zapolskiy2011-09-10-1/+2
| | | | | | | | This change allows to cope with a mii bus device registered using miiphy_register(), which doesn't assign a default reset handler. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Detlev Zundel <dzu@denx.de>
* phy.c: make less verbose - turn printf() into debug()Wolfgang Denk2011-08-31-1/+1
| | | | | | | | | | | | | | | | | | | | The PHY driver was too verbose and corrupted the boot message display like this: ... Net: TSEC0 connected to Marvell 88E1111S TSEC1 connected to Marvell 88E1111S TSEC0, TSEC1 ... Turn printf() into debug() so we het the expected output again: ... Net: TSEC0, TSEC1 ... Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Kumar Gala <galak@kernel.crashing.org>
* phylib: Detect link on 10G devices correctlyAndy Fleming2011-07-27-2/+6
| | | | | | | | | | | | | | | | gen10g_startup() had 2 bugs: 1) It had a boolean logic error in checking the MMD mask, and always checked all of them. 2) It checked devices which don't actually report link state, which meant that it would never believe the link was fully up. Fix the boolean logic, and then mask the MMD mask so only link-reporting devices are checked. Signed-off-by: Andy Fleming <afleming@freescale.com> Reported-by: Ed Swarthout <Ed.Swarthout@freescale.com>
* Minor coding style cleanup.Wolfgang Denk2011-05-19-1/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* phylib: Add a bunch of PHY drivers from tsecAndy Fleming2011-04-20-0/+1500
| | | | | | | | | | | | | | | | The tsec driver had a bunch of PHY drivers already written. This converts them all into PHY Lib drivers, and serves as the first set of PHY drivers for PHY Lib. While doing that, cleaned up a number of magic numbers (though not all of them, as PHY vendors like to keep their numbers as magical as possible). Also, noticed that almost all of the vitesse/cicada PHYs had the same config/parse/startup functions, so those have been collapsed into one. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
* Create PHY Lib for U-BootAndy Fleming2011-04-20-0/+831
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extends the mii_dev structure to participate in a full-blown MDIO and PHY driver scheme. The mii_dev structure and miiphy calls are modified in such a way to allow the original mii command and miiphy infrastructure to work as before, but also to support a new set of APIs which allow (among other things) sharing of PHY driver code and 10G support The mii command will continue to support normal PHY management functions (Clause 22 of 802.3), but will not be changed to support 10G (Clause 45). The basic design is similar to PHY Lib from Linux, but simplified for U-Boot's network and driver infrastructure. We now have MDIO drivers and PHY drivers An MDIO driver provides: read write reset A PHY driver provides: (optionally): probe config - initial setup, starting of auto-negotiation startup - waiting for AN, and reading link state shutdown - any cleanup needed The ethernet drivers interact with the PHY Lib using these functions: phy_connect() phy_config() phy_startup() phy_shutdown() Each PHY driver can be configured separately, or all at once using config_phylib_all_drivers.h (added in the patch which adds the drivers) We also provide generic drivers for Clause 22 (10/100/1000), and Clause 45 (10G) PHYs. We also implement phy_reset(), and call it in phy_connect(). Because phy_reset() is essentially the same as miiphy_reset, but: a) must support 10G PHYs, and b) should use the phylib primitives, we implement miiphy_reset, using phy_reset(), but only when CONFIG_PHYLIB is set. Otherwise, we just use the old version. In this way, we save on compile size, even if we don't manage to save code size. Pulled ethtool.h and mdio.h from: git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6 782d640afd15af7a1faf01cfe566ca4ac511319d With many, many deletions so as to enable compilation under u-boot Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
* miiphy: convert to linux/mii.hMike Frysinger2011-01-09-1/+1
| | | | | | | | The include/miiphy.h header duplicates a lot of things from linux/mii.h. So punt all the things that overlap to keep the API simple and to make merging between U-Boot and Linux simpler. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Switch from archive libraries to partial linkingSebastien Carlier2010-11-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, weak symbols were not overridden by non-weak symbols found in archive libraries when linking with recent versions of binutils. As stated in the System V ABI, "the link editor does not extract archive members to resolve undefined weak symbols". This commit changes all Makefiles to use partial linking (ld -r) instead of creating library archives, which forces all symbols to participate in linking, allowing non-weak symbols to override weak symbols as intended. This approach is also used by Linux, from which the gmake function cmd_link_o_target (defined in config.mk and used in all Makefiles) is inspired. The name of each former library archive is preserved except for extensions which change from ".a" to ".o". This commit updates references accordingly where needed, in particular in some linker scripts. This commit reveals board configurations that exclude some features but include source files that depend these disabled features in the build, resulting in undefined symbols. Known such cases include: - disabling CMD_NET but not CMD_NFS; - enabling CONFIG_OF_LIBFDT but not CONFIG_QE. Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
* Replace CONFIG_RELOC_FIXUP_WORKS by CONFIG_NEEDS_MANUAL_RELOCWolfgang Denk2010-10-29-1/+1
| | | | | | | | | | | By now, the majority of architectures have working relocation support, so the few remaining architectures have become exceptions. To make this more obvious, we make working relocation now the default case, and flag the remaining cases with CONFIG_NEEDS_MANUAL_RELOC. Signed-off-by: Wolfgang Denk <wd@denx.de> Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* Fix compile warnings for const correctnessBen Warren2010-08-09-3/+3
| | | | | | | | | | | Commit 6e37b1a3a25004d3df5867de49fff6b3fc9c4f04 modifies several net calls to take a (const char *) parameter instead of (char *), but in some cases the modified functions call other functions taking (char *). The end result is warnings about discarding the const qualifier. This patch fixes these other function signatures. Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Coding Style cleanup; update CHANGELOG, prepare -rc1v2009.11-rc1Wolfgang Denk2009-10-28-4/+4
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* drivers/net/phy/miiphybb.c: fix warning: no newline at end of fileWolfgang Denk2009-10-27-1/+1
| | | | | | | | Add missing newline. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Luigi Mantellini <luigi.mantellini@idf-hit.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* Rewrite the miiphybb (Bit-banged MII bus driver) in order to support an ↵Luigi 'Comio' Mantellini2009-10-10-104/+242
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arbitrary number of mii buses. This feature is useful when your board uses different mii buses for different phys and all (or a part) of these buses are implemented via bit-banging mode. The driver requires that the following macros should be defined into the board configuration file: CONFIG_BITBANGMII - Enable the miiphybb driver CONFIG_BITBANGMII_MULTI - Enable the multi bus support If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs to define at least the following macros: MII_INIT - Generic code to enable the MII bus (optional) MDIO_DECLARE - Declaration needed to access to the MDIO pin (optional) MDIO_ACTIVE - Activate the MDIO pin as out pin MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin MDIO_READ - Read the MDIO pin MDIO(v) - Write v on the MDIO pin MDC_DECLARE - Declaration needed to access to the MDC pin (optional) MDC(v) - Write v on the MDC pin The previous macros make the driver compatible with the previous version (that didn't support the multi-bus). When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill the bb_miiphy_buses[] array with a record for each required bus and declare the bb_miiphy_buses_num variable with the number of mii buses. The record (struct bb_miiphy_bus) has the following fields/callbacks (see miiphy.h for details): char name[] - The symbolic name that must be equal to the MII bus registered name int (*init)() - Initialization function called at startup time (just before the Ethernet initialization) int (*mdio_active)() - Activate the MDIO pin as output int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin int (*set_mdio)() - Write the MDIO pin int (*get_mdio)() - Read the MDIO pin int (*set_mdc)() - Write the MDC pin int (*delay)() - Delay function void *priv - Private data used by board specific code The board code will look like: struct bb_miiphy_bus bb_miiphy_buses[] = { { .name = miibus#1, .init = b1_init, .mdio_active = b1_mdio_active, ... }, { .name = miibus#2, .init = b2_init, .mdio_active = b2_mdio_active, ... }, ... int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) / sizeof(bb_miiphy_buses[0]); Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* net: phy: mv88e61xx.c : fixed build warningPrafulla Wadaskar2009-10-04-2/+2
| | | | | | | | | | | | | following build warning was observed mv88e61xx.c: In function ‘mv88e61xx_busychk’: mv88e61xx.c:208: warning: dereferencing type-punned pointer will break strict-aliasing rules This patch fixes the same Patch tested for rd6281a board build Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* net: phy: bugfixes: mv88E61xx compiler warnings fixedPrafulla Wadaskar2009-08-10-9/+14
| | | | | | | | | | 1. mv88E61xx driver compiler warnings fixed 2. idstr if-else statements changed to switch() construct and added default case too. This fixed idstr may be uninitialized warning Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* net: phy: bugfixes: mv88E61xx multichip addressing supportPrafulla Wadaskar2009-07-22-10/+10
| | | | | | | | | | | | | | | | | | With these fixes, this driver works properly for multi chip addressging mode Bugfixes: 1. Build error fixed for function mv88e61xx_busychk_multic-fixed 2. PHY dev address error detection- fixed 3. wrong busy bit was refered in function mv88e61xx_busychk -fixed 4. invalid data read ptr was refered for RD_PHY in case of multichip addressing mode -fixed The Multichip Address mode is tested with RD6281A board having MV88E6165 switch on it Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* MIIPHYBB: Return 0xFFFF if the PHY is not asserting TA.Richard Retanubun2009-07-22-0/+7
| | | | | | | | | | | | This patch sets the returned value to 0xFFFF if the PHY does not exist and does not assert Transfer Acknowledge. A NULL check for the value pointer is also added for buffer overflow protection. Without this patch 'mii info' will show 'phantom' devices because the value will be not be initialized and return with some random value. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Marvell MV88E61XX Switch Driver supportPrafulla Wadaskar2009-06-15-0/+476
| | | | | | | | | | | | | | | | | | | | | | Chips supported:- 1. 88E6161 6 port gbe swtich with 5 integrated PHYs 2. 88E6165 6 port gbe swtich with 5 integrated PHYs 2. 88E6132 3 port gbe swtich with 2 integrated PHYs Platform specific configuration supported for:- default or router port vlan configuration led_init configuration mdip/n polarity reversal configuration Note: This driver is supported and tested against kirkwood egiga interface Contributors: Yotam Admon <yotam@marvell.com> Michael Blostein <michaelbl@marvell.com Reviewed by: Ronen Shitrit <rshitrit@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-3/+3
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* miiphyutil: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-08-29-1/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* miiphybb: move to drivers/net/phyJean-Christophe PLAGNIOL-VILLARD2008-08-29-0/+281
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>