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path: root/drivers/net/phy/marvell.c
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* net: phy: marvell: Add a missing errno.h headerSimon Glass2016-07-27-0/+1
| | | | | | This corrects a build error on zynqmp. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: phy: marvell: Do not reset 88e1310 after autonegNathan Rossi2016-06-21-4/+1
| | | | | | | | | | | | | | | | | Commit a058052c "net: phy: do not read configuration register on reset", changes the behaviour of the phy_reset function such that the state of the BMCR register is not preserved during reset. Change the config function for the m88e1310 so that it does not do a reset after configuring auto-negotiation. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Stefan Roese <sr@denx.de> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Stefan Roese <sr@denx.de>
* phy: marvell: Do not reset phy after negotiationMichal Simek2016-05-24-5/+1
| | | | | | | | | | | | The patch "net: phy: do not read configuration register on reset" (sha1: a058052c358c3ecf5f394ff37def6a45eb26768c) was causing regression on zynq zc702 board where Marwell 88e1118 phy was resetted after negotiation was setup. Phy reset is done pretty early in phy_connect_dev() and doens't need to be called again in phy code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* net: phy: Handle phy_startup() error codes properlyMichal Simek2016-05-24-10/+19
| | | | | | | Propagate error code from genphy_update_link() to phy startup(). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* phy: Return correct error code when timeout happensMichal Simek2016-05-24-2/+2
| | | | | | | Return -ETIMEDOUT if timeout happens. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* net: phy: marvell: Fix problem with phy_reset() clearing BMCRStefan Roese2016-02-18-2/+1
| | | | | | | | | | | | | | | | | | | | | | | With commit a058052c [net: phy: do not read configuration register on reset], phy_reset() will clear the BMCR register. Resulting in bit 12 being cleared (A/N enable). This leads to autonegotiation link problems, at least on the Marvell Armada ClearFog board. I suspect that other boards using this driver will be affected as well. At the of m88e1111s_config(), phy_reset() is called. This is not needed for the PHY to load the changed configuration, as phy_reset() is called a few lines before already. So lets call genphy_restart_aneg() here instead to start the AN correctly. Tested on clearfog. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Agner <stefan@agner.ch> Cc: Hao Zhang <hzhang@ti.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Andy Fleming <afleming@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: phy: marvell: Call phy_reset() where possibleStefan Roese2016-02-18-21/+2
| | | | | | | | | | | | | Instead of coding the soft PHY reset function multiple times in marvell.c, lets call the common phy_reset() function from phy.c. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Agner <stefan@agner.ch> Cc: Hao Zhang <hzhang@ti.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Andy Fleming <afleming@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: Add support for Marvell 88E1510 PHYClemens Gruber2015-08-11-0/+30
| | | | | | | | | | | Support the 88E1510 PHY which is very similar to the 88E1518. I also set the INTn output and configured the LEDs. Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Hao Zhang <hzhang@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: Improve 88E151x PHY initializationClemens Gruber2015-08-11-14/+23
| | | | | | | | | | | - The EEE fixup magic should also be enabled for RGMII - Improved comments Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Hao Zhang <hzhang@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: phy: marvell: add errata w/a for 88E151* chipsHao Zhang2014-11-06-1/+52
| | | | | | | | | | | As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/88E1514 Rev A0, Errata Section 3.1 Marvell PHY has an errata which requires that certain registers get written in order to restart autonegotiation. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> Reviewed-by: Stefan Roese <sr@denx.de>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-15/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* NET: phy: add 88E1310 PHY initializationSebastian Hesselbarth2013-06-24-0/+48
| | | | | | This adds PHY initialization for Marvell Alaska 88E1310 PHY. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
* net: phy: Define Marvell 88e1518 phyMichal Simek2013-04-30-0/+11
| | | | | | | | This phy is used on zedboard (xilinx zynq platform). Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* phy: Add support for Marvell 88E1118RMichal Simek2012-12-15-0/+11
| | | | | | | | | Marvell 88E1118R has different uid then 88E1118. Signed-off-by: Michal Simek <monstr@monstr.eu> CC: Andy Fleming <afleming@freescale.com> CC: Zang Roy-R61911 <tie-fei.zang@freescale.com> CC: Kumar Gala <galak@kernel.crashing.org>
* Phy/Marvell: Rewrite the MV88E1111 phy config function based on kernel codeZang Roy-R619112011-12-05-6/+107
| | | | | | | | | | The original m88e1111s_config() does not do the SGMII mode initialization and is buggy. Rewrite the function according to 3.0.6 kernel function m88e1111_config_init() in drivers/net/phy/marvell.c Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com> Cc: Kumar Gala <galak@kernel.crashing.org>
* phylib: Add a bunch of PHY drivers from tsecAndy Fleming2011-04-20-0/+367
The tsec driver had a bunch of PHY drivers already written. This converts them all into PHY Lib drivers, and serves as the first set of PHY drivers for PHY Lib. While doing that, cleaned up a number of magic numbers (though not all of them, as PHY vendors like to keep their numbers as magical as possible). Also, noticed that almost all of the vitesse/cicada PHYs had the same config/parse/startup functions, so those have been collapsed into one. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
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