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* net: e1000: Fix the build with driver model and SPI EEPROMAlban Bedel2016-08-15-29/+30
| | | | | | | | | When adding support for the driver model the SPI EEPROM feature had been ignored. Fix the build with both CONFIG_DM_ETH and CONFIG_E1000_SPI enabled. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: e1000: Mark _disable_wr() and _write_status() as __maybe_unusedBin Meng2015-12-21-5/+4
| | | | | | | | | Per the comments, e1000_spi_eeprom_disable_wr() and e1000_spi_eeprom_write_status() have been tested. Remove the #if 0, #endif and mark them as __maybe_unused. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Move console definitions into a new console.h fileSimon Glass2015-11-19-0/+1
| | | | | | | | The console includes a global variable and several functions that are only used by a small subset of U-Boot files. Before adding more functions, move the definitions into their own header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* net: e1000: Move #include of common.h to the C filesSimon Glass2015-08-21-0/+1
| | | | | | | | | | | We cannot currently include any header files in the C files since common.h needs to be included first, and it is in the header file. Move it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Apalis T30 2GB on Apalis Evaluation Board
* Consolidate bool typeYork Sun2013-04-01-17/+17
| | | | | | | | | | | | | 'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99. All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0. Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files. Signed-off-by: York Sun <yorksun@freescale.com>
* drivers/net/e1000_spi.c: Fix build warningsAnatolij Gustschin2011-12-20-2/+3
| | | | | | | | | | | | | Fix: e1000_spi.c: In function 'spi_free_slave': e1000_spi.c:115: warning: unused variable 'hw' e1000_spi.c: In function 'do_e1000_spi': e1000_spi.c:472: warning: 'checksum' may be used uninitialized in this function e1000_spi.c:472: note: 'checksum' was declared here Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Kyle Moffett <Kyle.D.Moffett@boeing.com> Acked-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
* e1000: Allow direct access to the E1000 SPI EEPROM deviceKyle Moffett2011-10-28-0/+576
As a part of the manufacturing process for some of our custom hardware, we are programming the EEPROMs attached to our Intel 82571EB controllers from software using U-Boot and Linux. This code provides several conditionally-compiled features to assist in our manufacturing process: CONFIG_CMD_E1000: This is a basic "e1000" command which allows querying the controller and (if other config options are set) performing EEPROM programming. In particular, with CONFIG_E1000_SPI this allows you to display a hex-dump of the EEPROM, copy to/from main memory, and verify/update the software checksum. CONFIG_E1000_SPI_GENERIC: Build a generic SPI driver providing the standard U-Boot SPI driver interface. This allows commands such as "sspi" to access the bus attached to the E1000 controller. Additionally, some E1000 chipsets can support user data in a reserved space in the E1000 EEPROM which could be used for U-Boot environment storage. CONFIG_E1000_SPI: The core SPI access code used by the above interfaces. For example, the following commands allow you to program the EEPROM from a USB device (assumes CONFIG_E1000_SPI and CONFIG_CMD_E1000 are enabled): usb start fatload usb 0 $loadaddr 82571EB_No_Mgmt_Discrete-LOM.bin e1000 0 spi program $loadaddr 0 1024 e1000 0 spi checksum update Please keep in mind that the Intel-provided .eep files are organized as 16-bit words. When converting them to binary form for programming you must byteswap each 16-bit word so that it is in little-endian form. This means that when reading and writing words to the SPI EEPROM, the bit ordering for each word looks like this on the wire: Time >>> ------------------------------------------------------------------ ... [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8], ... ------------------------------------------------------------------ (MSB is 15, LSB is 0). Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Ben Warren <biggerbadderben@gmail.com>