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path: root/drivers/net/cpsw.c
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* Merge git://git.denx.de/u-boot-dmTom Rini2016-08-12-1/+2
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| * fdt: allow fdtdec_get_addr_size_*() to translate addressesStephen Warren2016-08-12-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some code may want to read reg values from DT, but from nodes that aren't associated with DM devices, so using dev_get_addr_index() isn't appropriate. In this case, fdtdec_get_addr_size_*() are the functions to use. However, "translation" (via the chain of ranges properties in parent nodes) may still be desirable. Add a function parameter to request that, and implement it. Update all call sites to default to the original behaviour. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Squashed in build fix from Stephen: Signed-off-by: Simon Glass <sjg@chromium.org>
* | drivers: net: cpsw: always flush cache of size aligned to PKTALIGNLokesh Vutla2016-08-12-1/+1
|/ | | | | | | | | | | cpsw tries to flush dcache which is not in the range of PKTALIGN. Because of this the following warning comes while flushing: CACHE: Misaligned operation at range [dffecec0, dffed016] Fix it by flushing cache of size aligned to PKTALIGN. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* net: cpsw: Add support to drive gpios for ethernet to be functionalVignesh R2016-08-08-0/+12
| | | | | | | | | | | On DRA72 EVM, cpsw slaves may be muxed with other modules. This selection is controlled by a pcf gpio line. Add support for cpsw driver to acquire mode-gpios and select the appropriate slave using gpio APIs. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
* drivers: net: cpsw: Add reading of DT phy-handle nodeDan Murphy2016-05-24-2/+21
| | | | | | | | | | | | | Add the ability to read the phy-handle node of the cpsw slave. Upon reading this handle the phy-id can be stored based on the reg node in the DT. The phy-handle also needs to be stored and passed to the phy to access any phy data that is available. Signed-off-by: Dan Murphy <dmurphy@ti.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* drivers: net: cpsw: add support for reading mac address from efuseMugunthan V N2016-05-24-16/+8
| | | | | | | | | | | | | Different TI platforms has to read with different combination to get the mac address from efuse. So add support to read mac address based on machine/device compatibles. The code is taken from Linux drivers/net/ethernet/ti/cpsw-common.c done by Tony Lindgren. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* drivers: net: cpsw: fix get mdio base and gmii_sel reg from DTMugunthan V N2016-05-24-4/+20
| | | | | | | | | | | | Since dra7x platforms address bus is define as 64 bits to support LAPE, fdtdec_get_addr() returns a invalid address for mdio based and gmii_sel register address. Fixing this by using fdtdec_get_addr_size_auto_noparent() which will derive address cell and size cell from its parent. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* drivers: net: cpsw: fix cpsw dp parse when num slaves as 1Mugunthan V N2016-05-24-4/+2
| | | | | | | | | | | On some boards number of slaves can be 1 when only one port ethernet is pinned out. So do not break when slave_index and num slaves check fails, instead continue to parse the next child. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Fix GCC format-security errors and convert sprintfs.Ben Whitten2016-01-14-1/+1
| | | | | | | | | | | With format-security errors turned on, GCC picks up the use of sprintf with a format parameter not being a string literal. Simple uses of sprintf are also converted to use strcpy. Signed-off-by: Ben Whitten <ben.whitten@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* drivers: net: cpsw: convert driver to adopt device driver modelMugunthan V N2015-10-22-1/+244
| | | | | | | adopt cpsw driver to device driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* drivers: net: cpsw: prepare driver for device model migrationMugunthan V N2015-10-22-44/+89
| | | | | | | prepare driver for device model migration Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* net: cosmetic: Fix var naming net <-> eth driversJoe Hershberger2015-04-18-2/+2
| | | | | | | | | | | | | | | Update the naming convention used in the network stack functions and variables that Ethernet drivers use to interact with it. This cleans up the temporary hacks that were added to this interface along with the DM support. This patch has a few remaining checkpatch.pl failures that would be out of the scope of this patch to fix (drivers that are in gross violation of checkpatch.pl). Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* net: cosmetic: Name ethaddr variables consistentlyJoe Hershberger2015-04-18-6/+7
| | | | | | | | Use "_ethaddr" at the end of variables and drop CamelCase. Make constant values actually 'const'. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* net: cpsw: am335x: Drop constant link checking from rx/tx path'sStefan Roese2014-08-28-18/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We noticed on the DXR2 platform (AM335x with a SMSC LAN9303 switch connected to the CPSW MAC) that the network performance in U-Boot is quite poor. Only when the transfer is started without a cable connected, and the cable is plugged after the first timeout "T" occured, an increased in performance can be seen. Debugging has revealed, that the cpsw driver has constant link checking builtin into the rx and tx functions. This results in the bad performance and seems to be unnecessary. The link has already been checked in the init function, before the transfer is started. This usually is sufficient. BTW: I have seen no other network driver in U-Boot so far, that constantly checks for link in the rx / tx functions. The performance numbers on the DXR2 board are: 0.56 MiB/s cpsw_check_link() in rx and tx path 0.87 MiB/s cpsw_check_link() only in tx path 1.0 MiB/s cpsw_check_link() only in rx path 2.7 MiB/s no cpsw_check_link() in rx and tx path So with this patch the network performance on DXR2 increases from 0.56 to 2.7 MiB/s (nearly 5 times as fast). Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Samuel Egli <samuel.egli@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Cc: Vladimir Koutny <vladimir.koutny@streamunlimited.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com>
* drivers: net: cpsw: add support for using second port as ethernetMugunthan V N2014-07-25-3/+5
| | | | | | | Add support for using the second slave port of cpsw to be used as primary ethernet. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* drivers: net: cpsw: init phy with gigabit featuresIlya Ledvich2014-03-12-5/+1
| | | | | | | | CPSW ia a gigabit device. Use the PHY_GBIT_FEATURES macro to determine phy supported features. Tested on cm_t335. Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
* drivers: net: cpsw: add support to have phy address from cpsw platform dataMugunthan V N2014-03-04-2/+2
| | | | | | | | | | | | Some platforms like AM437x have different EVMs with different phy addresses, so this patch adds support for passing phy address via cpsw plaform data. Also renamed phy_id to phy_addr so better understanding of the code. Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> [trini: Update BuR am335x_igep0033 pcm051_rev3 pcm051_rev1 cm_t335 pengwyn boards] Signed-off-by: Tom Rini <trini@ti.com>
* am335x: cpsw: optimize cpsw_recv to increase network performanceVladimir Koutny2013-12-04-1/+1
| | | | | | | | | | | | In 48ec5291, only TX path was optimized; this does the same also for RX path. This results in huge increase of TFTP throughput on custom am3352 board (from 312KiB/s to 1.8MiB/s) and eliminates occasional transfer timeouts. Signed-off-by: Vladimir Koutny <vladimir.koutny@streamunlimited.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com>
* net, phy, cpsw: fix NULL pointer deferenceHeiko Schocher2013-09-20-1/+9
| | | | | | | | | | | if phy_connect() did not find a phy, phydev is NULL and following code in cpsw_phy_init() crashes. Fix this. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
* net, phy, cpsw: fix gigabit register accessHeiko Schocher2013-07-30-1/+1
| | | | | | | | | | | | | accessing a lan9303 switch with the cpsw driver results in wrong speed detection, as the switch sets the BMSR_ERCAP in BMSR register, and follow read of the MII_STAT1000 register fails, as the switch does not support it. Current code did not check, if a phy_read() fails ... fix this. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* drivers: net: cpsw: Enable statistics for all portMugunthan V N2013-07-26-0/+1
| | | | | | Enable hardware statistics for all ports, enabling only to host port is useless Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* drivers: net: cpsw: remove hard coding bd ram for cpswMugunthan V N2013-07-26-3/+1
| | | | | | | BD ram address may vary in various SOC, so removing the hardcoding and passing the same information through platform data Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* cpsw: add support for TI814x slave_regs differencesMatt Porter2013-05-10-0/+6
| | | | | | | | TI814x's version 1 CPSW has a different slave_regs layout. Add support for the differing registers. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* am33xx: Add required includes to some omap/am33xx codeTom Rini2013-03-24-0/+1
| | | | | | | | | | | | | - In arch/arm/cpu/armv7/omap-common/timer.c, drivers/mtd/nand/omap_gpmc.c and drivers/net/cpsw.c add #include files that the driver needs but had been relying on <config.h> to bring in. - In arch/arm/cpu/armv7/omap-common/lowlevel_init.S add <config.h> - In am335x_evm.h and pcm051.h don't globally include <asm/arch/hardware.h> and <asm/arch/cpu.h> but just <asm/arch/omap.h> as that is the only include which defines things the config uses. Cc: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com>
* am335x: cpsw: optimize cpsw_send to increase network performanceMugunthan V N2013-03-11-2/+18
| | | | | | | | | | Before submitting packets to cpdma, phy status is updated on every packet which leads to delay in packet send intern reduces the Ethernet performance. Checking mdio status for each packet will reduce timetaken to send a packet and there by increasing the Ethernet performance. With this the performance is increased from 208KiB/s to 375KiB/s on EVMsk Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* am335x: cpsw: make phy address configurableYegor Yefremov2012-12-10-1/+4
| | | | Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
* cpsw: add driver for cpsw ethernet deviceCyril Chemparathy2012-09-01-0/+991
CPSW is an on-chip ethernet switch that is found on various SoCs from Texas Instruments. This patch adds a simple driver (based on the Linux driver) for this hardware module. This patch also adds support to clean and flush dcache during packet send and receive. Changes by Sandhya: Added support to clean and flush dcache during packet send/receive and added timeouts. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com> [Ilya: Cleaned cache handling, some style cleanup, some small fixes, use of internal RAM for descriptors] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
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