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path: root/drivers/net/cpsw.c
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* net, phy, cpsw: fix gigabit register accessHeiko Schocher2013-07-30-1/+1
| | | | | | | | | | | | | accessing a lan9303 switch with the cpsw driver results in wrong speed detection, as the switch sets the BMSR_ERCAP in BMSR register, and follow read of the MII_STAT1000 register fails, as the switch does not support it. Current code did not check, if a phy_read() fails ... fix this. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* drivers: net: cpsw: Enable statistics for all portMugunthan V N2013-07-26-0/+1
| | | | | | Enable hardware statistics for all ports, enabling only to host port is useless Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* drivers: net: cpsw: remove hard coding bd ram for cpswMugunthan V N2013-07-26-3/+1
| | | | | | | BD ram address may vary in various SOC, so removing the hardcoding and passing the same information through platform data Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* cpsw: add support for TI814x slave_regs differencesMatt Porter2013-05-10-0/+6
| | | | | | | | TI814x's version 1 CPSW has a different slave_regs layout. Add support for the differing registers. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* am33xx: Add required includes to some omap/am33xx codeTom Rini2013-03-24-0/+1
| | | | | | | | | | | | | - In arch/arm/cpu/armv7/omap-common/timer.c, drivers/mtd/nand/omap_gpmc.c and drivers/net/cpsw.c add #include files that the driver needs but had been relying on <config.h> to bring in. - In arch/arm/cpu/armv7/omap-common/lowlevel_init.S add <config.h> - In am335x_evm.h and pcm051.h don't globally include <asm/arch/hardware.h> and <asm/arch/cpu.h> but just <asm/arch/omap.h> as that is the only include which defines things the config uses. Cc: Lars Poeschel <poeschel@lemonage.de> Signed-off-by: Tom Rini <trini@ti.com>
* am335x: cpsw: optimize cpsw_send to increase network performanceMugunthan V N2013-03-11-2/+18
| | | | | | | | | | Before submitting packets to cpdma, phy status is updated on every packet which leads to delay in packet send intern reduces the Ethernet performance. Checking mdio status for each packet will reduce timetaken to send a packet and there by increasing the Ethernet performance. With this the performance is increased from 208KiB/s to 375KiB/s on EVMsk Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* am335x: cpsw: make phy address configurableYegor Yefremov2012-12-10-1/+4
| | | | Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
* cpsw: add driver for cpsw ethernet deviceCyril Chemparathy2012-09-01-0/+991
CPSW is an on-chip ethernet switch that is found on various SoCs from Texas Instruments. This patch adds a simple driver (based on the Linux driver) for this hardware module. This patch also adds support to clean and flush dcache during packet send and receive. Changes by Sandhya: Added support to clean and flush dcache during packet send/receive and added timeouts. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com> [Ilya: Cleaned cache handling, some style cleanup, some small fixes, use of internal RAM for descriptors] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>