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| * spl: nand: sunxi: rework status polling loopBoris Brezillon2016-06-19-16/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | check_value_xxx() helpers are using a 1ms delay between each test, which can be quite long for some operations (like a page read on an SLC NAND). Since we don't have anything to do but to poll this register, reduce the delay between each test to 1us. While we're at it, rename the max_number_of_retries parameters and the MAX_RETRIES macro into timeout_us and DEFAULT_TIMEOUT_US to reflect that we're actually waiting a given amount of time and not only a number of retries. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * spl: nand: sunxi: stop guessing the redundant u-boot offsetBoris Brezillon2016-06-19-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND value instead of trying to guess where the redundant u-boot image is based on simple (and most of the time erroneous) heuristics. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> # Conflicts: # drivers/mtd/nand/sunxi_nand_spl.c
| * spl: nand: support redundant u-boot imageBoris Brezillon2016-06-19-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On modern NAND it's more than recommended to have a backup copy of the u-boot binary to recover from corruption: bitflips are quite common on MLC NANDs, and the read-disturbance will corrupt your u-boot partitition more quickly than what you would see on an SLC NAND. Add an extra Kconfig option to specify the offset of the redundant u-boot image. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> [scottwood: added ifdef to fix build break] Signed-off-by: Scott Wood <oss@buserror.net>
| * spl: nand: rework SYS_NAND_U_BOOT_OFFS Kconfig option dependencyBoris Brezillon2016-06-19-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | The SYS_NAND_U_BOOT_OFFS is quite generic, but the Kconfig entry is forced to explicitly depend on platforms that are not already defining it in their include/configs/<board>.h header. Add the SYS_NAND_U_BOOT_LOCATIONS option, make the SYS_NAND_U_BOOT_OFFS depends on it, remove the dependency on NAND_SUNXI and make it dependent on SPL selection. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * spl: nand: sunxi: remove support for so-called 'syndrome' modeBoris Brezillon2016-06-19-42/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sunxi SPL NAND controller driver supports use 'BootROM'-like configs, that is, configs where the ECC bytes and real data are interleaved in the page instead of putting ECC bytes in the OOB area. Doing that has several drawbacks: - since you're interleaving data and ECC bytes you can't use the whole page otherwise you might override the bad block marker with non-FF bytes. - to solve the bad block marker problem, the ROM code supports partially using the page, but this introduces a huge penalty both in term of read speed and NAND memory usage. While this is fine for rather small binaries(like the SPL one which is at maximum 24KB large), it becomes non-negligible for the bootloader image (several hundred of KB). - auto-detection of the page size is not reliable (this is in my opinion the biggest problem). If you get the page size wrong, you'll end up reading data at a different offset than what was specified by the caller and the reading may succeed (if valid data were written at this address). For all those reasons I think it's wiser to completely remove support for 'syndrome' configs. If we ever need to support it again, then I'd recommend specifying all the config parameters through Kconfig options. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-06-13-2/+3
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| * | at91: nand: Set up the ECC strength correctlyAndre Renaud2016-06-12-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This needs to be set to avoid a fatal error when ECC is used. Signed-off-by: Andre Renaud <andre@designa-electronics.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
| * | at91: Correct NAND ECC register accessAndre Renaud2016-06-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This uses the wrote base register value. Fix it. Signed-off-by: Andre Renaud <andre@designa-electronics.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-06-12-1/+1
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| * | mtd: nand: mxs: use simpler runtime cpu dection macrosPeng Fan2016-05-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Scott Wood <oss@buserror.net>
* | | mtd: nand: omap: allow to switch to BCH16Heiko Schocher2016-06-09-0/+4
| | | | | | | | | | | | | | | | | | | | | support in omap_nand_switch_ecc() also an eccstrength from 16. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | nand: add nand mtd concat supportHeiko Schocher2016-06-09-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | add for nand devices mtd concat support. Generic MTD concat support is already ported to mainline, and used in the cfi_mtd driver. This patch adds it similiar for nand devices. Signed-off-by: Heiko Schocher <hs@denx.de>
* | | Merge git://git.denx.de/u-boot-nand-flashTom Rini2016-06-04-2247/+876
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| * | nand: fix nand torture to use changed mtd apiMax Krummenacher2016-06-03-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mtd subsystem deprecated and renamed the direct use of the mtd_info struct's functionpointers. Instead the corresponding mtd_xxx function should be used. See also: https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=3c3c10bba1e4ccb75b41442e45c1a072f6cded19 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
| * | mtd: nand: Sync with Linux v4.6Scott Wood2016-06-03-171/+298
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updates the NAND code to match Linux v4.6. The previous sync was from Linux v4.1 in commit d3963721d93fafa. Note that none of the individual NAND drivers tracked Linux closely enough to be synced themselves, other than manually applying a few cross-tree changes. Signed-off-by: Scott Wood <oss@buserror.net> Tested-by: Heiko Schocher <hs@denx.de>
| * | mtd: nand: Add page argument to write_page() etc.Scott Wood2016-06-03-46/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | This change is part of the Linux 4.6 sync. It is being done before the main sync patch in order to make it easier to address the issue across all NAND drivers (many/most of which do not closely track their Linux counterparts) separately from other merge issues. Signed-off-by: Scott Wood <oss@buserror.net>
| * | mtd: nand: Add+use mtd_to/from_nand and nand_get/set_controller_dataScott Wood2016-06-03-307/+298
| | | | | | | | | | | | | | | | | | | | | | | | | | | These functions are part of the Linux 4.6 sync. They are being added before the main sync patch in order to make it easier to address the issue across all NAND drivers (many/most of which do not closely track their Linux counterparts) separately from other merge issues. Signed-off-by: Scott Wood <oss@buserror.net>
| * | nand: Embed mtd_info in struct nand_chipScott Wood2016-06-03-165/+177
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_info[] is now an array of pointers, with the actual mtd_info instance embedded in struct nand_chip. This is in preparation for syncing the NAND code with Linux 4.6, which makes the same change to struct nand_chip. It's in a separate commit due to the large amount of changes required to accommodate the change to nand_info[]. Signed-off-by: Scott Wood <oss@buserror.net>
| * | mtd: nand: Remove nand_info_t typedefScott Wood2016-06-03-90/+90
| | | | | | | | | | | | | | | | | | | | | This typedef serves no purpose other than causing confusion with struct nand_chip. Signed-off-by: Scott Wood <oss@buserror.net>
| * | mtd: nand: Remove docg4 driver and palmtreo680 flashing toolScott Wood2016-06-03-1251/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ad4f54ea86b ("arm: Remove palmtreo680 board") removed the only user of the docg4 driver and the palmtreo680 image flashing tool. This patch removes them. Signed-off-by: Scott Wood <oss@buserror.net> Cc: Mike Dunn <mikedunn@newsguy.com> Cc: Simon Glass <sjg@chromium.org>
| * | mtd: nand: Remove jz4740 driverMarek Vasut2016-06-03-259/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is not used by anyone, remove it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Scott Wood <oss@buserror.net> Acked-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Scott Wood <oss@buserror.net>
| * | mtd: nand: arasan_nfc: Correct nand ecc initializationSiva Durga Prasad Paladugu2016-06-03-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct the nand ecc initialization code This fixes the issue of incorrect nand ecc init if no device is found in ecc_matrix then it endsup ecc init with junk initialization instead of the most suited one. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
* | | driver: mtd: spi: Adding support for QSPI flashPrabhakar Kushwaha2016-06-03-2/+4
|/ / | | | | | | | | | | | | | | | | | | | | Serial number, vendor id and page size are added for QSPI flash common on both LS1012AQDS and LS1012ARDB i.e. S25FS512SDSMFI011. Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | mtd: nand: am335x: spl: Fix copying of imageLokesh Vutla2016-05-27-1/+14
| | | | | | | | | | | | | | | | | | When offset is not aligned to page address, it is possible that extra offset will be read from nand. Adjust the image such that first byte of the image is at load address after the first page is read. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | spl: Support loading a FIT from SPILokesh Vutla2016-05-27-5/+32
| | | | | | | | | | | | | | | | Detect a FIT when loading from SPI and handle it using the new FIT SPL support. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-05-24-0/+77
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| * sf: Disable 4-KB erase command for SPANSION S25FS-S familyYuan Yao2016-05-18-0/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The S25FS-S family physical sectors may be configured as a hybrid combination of eight 4-kB parameter sectors at the top or bottom of the address space with all but one of the remaining sectors being uniform size. The default status of the flash is in this hybrid architecture. The parameter sectors and the uniform sectors have different erase commands. This patch disable the hybrid sector architecture then the flash will has uniform sector size and uniform erase command. This configuration is temporary, the flash will revert to hybrid architecture after power on reset. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * spi: fsl_qspi: Enable Spansion S25FS-S family flashesYuan Yao2016-05-18-0/+5
| | | | | | | | | | | | | | | | | | | | The flash type of LS2085AQDS QSPI is S25FS256S. It has special write any device register command and read any device register command. This patch enable support for those commands. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | drivers: mtd: add Microchip PIC32 internal non-CFI flash driver.Purna Chandra Mandal2016-05-21-0/+452
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PIC32 internal flash devices are parallel NOR flash divided into number of banks to allow erase-programming in one while fetch and execution continues on other. As the flash banks are memory mapped stored code can be executed directly from flash (XIP), also there is additional hardware logic to prefetch and cache contents to improve execution performance. These flash can also be used to store user data (like environment). Flash erase and programming are handled by on-chip NVM controller. Driver implemented driver model but MTD is not really support. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | SPL: Let spl_parse_image_header() return valueMarek Vasut2016-05-17-2/+8
|/ | | | | | | | | | | Allow the spl_parse_image_header() to return value. This is convenient for controlling the SPL boot flow if the loaded image is corrupted. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tom Rini <trini@konsulko.com>
* Fix spelling of "occurred".Vagrant Cascadian2016-05-02-2/+2
| | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* sf: fix timebase data type in _wait_ready()Stephen Warren2016-04-25-1/+2
| | | | | | | | | | | | | | get_timer() returns an unsigned 64-bit value, but is currently assigned to a signed 32-bit variable. Due to sign extension and data truncation, this causes the timeout loop in spi_flash_cmd_wait_ready() to immediately (and incorrectly) fire for about 50% of all time values, based on whether bit 31 is set. In sandbox at least, this causes the test to pass or fail based on system uptime, as opposed to time since the U-Boot binary was started. Fixes: 4efad20a1751 ("sf: Update status reg check in spi_flash_cmd_wait_ready") Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* mtd, ubi: set free_count to zero before walking through erase listHeiko Schocher2016-04-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | Set free_count to zero before walking through ai->erase list in wl_init(). As U-Boot has no workqueue/threads, it immediately calls erase_worker(), which increase for each erased block free_count. Without this patch, free_count gets after this initialized to zero in wl_init(), so the free_count variable always has the maybe wrong value 0. Detected this behaviour on the dxr2 board, where the UBI fastmap gets not written when attaching/dettaching on an empty NAND. It drops instead the error message: could not find any anchor PEB With this patch, fastmap gets written on dettach. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* mtd: cfi: Unlock current sector instead of sector 0 before buffered writeRouven Behr2016-04-13-1/+1
| | | | | | | | | Unlock current sector instead of sector 0 before buffered write. [Patch subject and commit text slightly reworded, Stefan] Signed-off-by: Rouven Behr <u-boot@behr-iss.de> Signed-off-by: Stefan Roese <sr@denx.de>
* stm32: stm32_flash: add memory barrier during flash writeVikas Manocha2016-04-11-0/+4
| | | | | | | | After writing data to flash space, next instruction is checking if flash controller is busy writing to the flash memory. Memory barrier is required here to avoid transaction re-ordering for data write and busy status check. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
* drivers: remove writes{b,w,l,q} and reads{b,w,l,q}.Purna Chandra Mandal2016-04-10-8/+0
| | | | | | | Definition of writes{bwlq}, reads{bwlq} are now added into arch specific asm/io.h. So removing them from driver to fix re-definition error Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
* kirkwood_nand: claim MPP pins on the flyChris Packham2016-04-06-0/+19
| | | | | | | | | | | Claim the MPP pins for the NAND flash controller only when it's actually being used. This allows the pins to be shared with the SPI interface which already supports an equivalent on-access MPP reconfiguration. Reviewed-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz> Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Scott Wood <oss@buserror.net> Signed-off-by: Stefan Roese <sr@denx.de>
* mtd: nand: denali: max_banks calculation changed in revision 5.1Graham Moore2016-04-01-1/+12
| | | | | | | | | | | | | | Read Denali hardware revision number and use it to calculate max_banks, The encoding of max_banks changed in Denali revision 5.1. [ Linux commit : 271707b1d817f5104e02b2bd1bab43f0c8759418 ] Signed-off-by: Graham Moore <grmoore@opensource.altera.com> [Brian: parentheses around macro arg] Signed-off-by: Brian Norris <computersforpeace@gmail.com> [Masahiro: import from Linux and adjust ioread32() to readl() ] Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* cfi_flash: return device into read array mode after reading statusVasily Khoruzhick2016-03-27-0/+2
| | | | | | | | Otherwise flash remains in read status mode and it's not possible to access data on flash. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Acked-by: Stefan Roese <sr@denx.de>
* stm32: stm32f4: move flash driver to mtd driver locationVikas Manocha2016-03-26-0/+175
| | | | | | | Same flash driver can be used by other stm32 families like stm32f7. Better place for this driver would be mtd driver location. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
* mtd: denali: fix warning when compiled for 64bit systemMasahiro Yamada2016-03-24-3/+3
| | | | | | | | | | The 64-bit compiler (ex. aarch64) emits "warning: cast from pointer to integer of different size". Make it work with 64bit DMA address while I am here. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* sf: Correct data types in stm_is_locked_sr()Marek Vasut2016-03-12-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | The stm_is_locked_sr() function is picked from Linux kernel. For reason unknown, the 64bit data types used by the function and present in Linux were replaced with 32bit unsigned ones, which causes trouble. The testcase performed was done using ST M25P80 chip. The command used was: => sf protect unlock 0 0x10000 The call chain starts in stm_unlock(), which calls stm_is_locked_sr() with negative ofs argument. This works fine in Linux, where the "ofs" is loff_t, which is signed long long, while this fails in U-Boot, where "ofs" is u32 (unsigned int). Because of this signedness problem, the expression past the return statement to be incorrectly evaluated to 1, which in turn propagates back to stm_unlock() and results in -EINVAL. The correction is very simple, just use the correctly sized data types with correct signedness in the function to make it work as intended. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
* spi: Correct two error return valuesSimon Glass2016-02-26-4/+2
| | | | | | | | | | | | | When an error number is provided we should use it, not change it. This fixes the SPI and SPI flash tests. One of these is long-standing. The other seems to have been introduced by commit 1e90d9fd (sf: Move read_id code to sf_ops). Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 1e90d9fd (sf: Move read_id code to sf_ops) Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Jagan Teki <jteki@openedev.com>
* sandbox: spi: Remove an incorrect free()Simon Glass2016-02-26-1/+0
| | | | | | | | | | | | | We must not free data that is managed by driver mode. Remove this line, which is a hangover from the pre-driver-model code. This fixes a problem where 'sf probe' crashes U-Boot if the backing file for the SPI flash cannot be found. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* sandbox: spi: Add more debugging to SPI emulationSimon Glass2016-02-26-3/+10
| | | | | | | | Add a little more debugging to help when things go wrong. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Jagan Teki <jteki@openedev.com>
* sf: spi_flash: use dma to copy data from mmap region if platform supportsMugunthan V N2016-02-23-0/+9
| | | | | | | | | | Add dma memcpy api to the default spi_flash_copy_mmap(), so that dma will be used to copy data when CONFIG_DMA is defined for the platform. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
* arasan: nfc: Add initial nand driver support for arasanSiva Durga Prasad Paladugu2016-02-12-0/+1155
| | | | | | | | | | | Added initial nand driver support for arasan nand flash controller.This supports nand erase,nand read, nand write This uses the hardware ECC for read and write operations ZynqMP uses this driver. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> [scottwood: Fix checkpatch warnings] Signed-off-by: Scott Wood <oss@buserror.net>
* zynqmp: nand: Add Nand driver support for zynqmpSiva Durga Prasad Paladugu2016-02-12-0/+7
| | | | | | | | | | Add nand driver support for zynqmp. The Nand controller used in ZynqMP is Arasan Nand Flash controller. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> [scottwood: Fix checkpatch warning] Signed-off-by: Scott Wood <oss@buserror.net>
* mtd: pxa3xx_nand: Don't alloc unneeded memoryKevin Smith2016-02-12-3/+3
| | | | | | | | | | | The allocation size is reduced from what was introduced from the Linux kernel, as U-boot uses the statically allocated nand_info instead of needing to dynamically allocate an mtd_info instance. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Scott Wood <scottwood@freescale.com>
* mtd: pxa3xx_nand: Correct offset calculationKevin Smith2016-02-12-2/+2
| | | | | | | | | | | Correct some pointer math in initialization. An offset was added to a struct-typed pointer instead of one casted to a byte-size, resulting in a much larger offset than intended. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Scott Wood <scottwood@freescale.com>
generated by cgit v1.1 at 2024-11-02 12:18:52 +0000