summaryrefslogtreecommitdiff
path: root/drivers/mtd
Commit message (Collapse)AuthorAgeLines
...
* | MTD: atmel_nand: support for software BCH ECCBo Shen2013-11-13-0/+4
|/ | | | | | Add possible to use software BCH ECC for atmel nand driver Signed-off-by: Bo Shen <voice.shen@gmail.com>
* Merge branch 'iu-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-11-09-0/+12
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile board/compulab/cm_t35/Makefile board/corscience/tricorder/Makefile board/ppcag/bg0900/Makefile drivers/bootcount/Makefile include/configs/omap4_common.h include/configs/pdnb3.h Makefile conflicts are due to additions/removals of object files on the ARM branch vs KBuild introduction on the main branch. Resolution consists in adjusting the list of object files in the main branch version. This also applies to two files which are not listed as conflicting but had to be modified: board/compulab/common/Makefile board/udoo/Makefile include/configs/omap4_common.h conflicts are due to the OMAP4 conversion to ti_armv7_common.h on the ARM side, and CONFIG_SYS_HZ removal on the main side. Resolution is to convert as this icludes removal of CONFIG_SYS_HZ. include/configs/pdnb3.h is due to a removal on ARM side. Trivial resolution is to remove the file. Note: 'git show' will also list two files just because they are new: include/configs/am335x_igep0033.h include/configs/omap3_igep00x0.h
| * nand, davinci: add special UBL ecc positionHeiko Schocher2013-11-01-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | enable the RBL/UBL ECC layout through CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC define see for more info: http://processors.wiki.ti.com/index.php/DM365_Nand_ECC_layout Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Scott Wood <scottwood@freescale.com>
* | drivers: mtd: convert makefiles to Kbuild styleMasahiro Yamada2013-10-31-174/+63
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | nand_util.c: Correct licensingTom Rini2013-10-31-1/+3
| | | | | | | | | | | | | | | | | | | | | | Prior to SPDX licensing this file was GPL-2.0 with Freescale granting rights for "or later" for their contributed code. We incorrectly moved this file to GPL-2.0+, so correct it to GPL-2.0. In addition we cannot easily denote in the file where or what code is "or later", so just set that aside for now and the file as a whole is GPL-2.0 regardless. Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Tom Rini <trini@ti.com>
* | mtd/fsl_elbc: take NAND_ECC_SOFT_BCH config option into accountValentin Longchamp2013-10-24-1/+5
|/ | | | | | | | NAND_ECC_SOFT was the only option available while the SOFT_BCH option may also be used. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Scott Wood <scottwood@freescale.com>
* sf: probe: Add missing Atmel at25df321 flashBo Shen2013-10-16-0/+1
| | | | | | | | | As the spi flash transfer to multiple parts, it is forgot to add Atmel AT25DF321 spi flash support, which broken several Atmel EK boards which this chip. So, add it Signed-off-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* sf: Add GPL-2.0+ SPDX-License-Identifier for missing onesJagannadha Sutradharudu Teki2013-10-16-4/+4
| | | | | | | | Added GPL-2.0+ SPDX-License-Identifier for missed sf source files. Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Bo Shen <voice.shen@atmel.com>
* sf: Minor cleanups.Jagannadha Sutradharudu Teki2013-10-16-6/+7
| | | | | | | | | - Add comments. - Renamed few macros. - Add tabs. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Bo Shen <voice.shen@atmel.com>
* sf_ops: Unify bank_sel calculation codeJagannadha Sutradharudu Teki2013-10-16-16/+20
| | | | | | | Unified the bank_sel calculation code for erase and write ops. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* Coding Style cleanup: remove trailing empty linesWolfgang Denk2013-10-14-2/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Coding Style cleanup: replace leading SPACEs by TABsWolfgang Denk2013-10-14-19/+19
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Drop changes for PEP 4 following python tools] Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2013-10-14-12/+35
|\
| * mtd: driver _read() returns max_bitflips; mtd_read() returns -EUCLEANPaul Burton2013-10-09-12/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux modified the MTD driver interface in commit edbc4540 (with the same name as this commit). The effect is that calls to mtd_read will not return -EUCLEAN if the number of ECC-corrected bit errors is below a certain threshold, which defaults to the strength of the ECC. This allows -EUCLEAN to stop indicating "some bits were corrected" and begin indicating "a large number of bits were corrected, the data held in this region of flash may be lost soon". UBI makes use of this and when -EUCLEAN is returned from mtd_read it will move data to another block of flash. Without adopting this interface change UBI on U-boot attempts to move data between blocks every time a single bit is corrected using the ECC, which is a very common occurance on some devices. For some devices where bit errors are common enough, UBI can get stuck constantly moving data around because each block it attempts to use has a single bit error. This condition is hit when wear_leveling_worker attempts to move data from one PEB to another in response to an -EUCLEAN/UBI_IO_BITFLIPS error. When this happens ubi_eba_copy_leb is called to perform the data copy, and after the data is written it is read back to check its validity. If that read returns UBI_IO_BITFLIPS (in response to an MTD -EUCLEAN) then ubi_eba_copy_leb returns 1 to wear_leveling worker, which then proceeds to schedule the destination PEB for erasure. This leads to erase_worker running on the PEB, and following a successful erase wear_leveling_worker is called which begins this whole cycle all over again. The end result is that (without UBI debug output enabled) the boot appears to simply hang whilst in reality U-boot busily works away at destroying a block of the NAND flash. Debug output from this situation: UBI DBG: ensure_wear_leveling: schedule scrubbing UBI DBG: wear_leveling_worker: scrub PEB 1027 to PEB 4083 UBI DBG: ubi_io_read_vid_hdr: read VID header from PEB 1027 UBI DBG: ubi_io_read: read 4096 bytes from PEB 1027:4096 UBI DBG: ubi_eba_copy_leb: copy LEB 0:0, PEB 1027 to PEB 4083 UBI DBG: ubi_eba_copy_leb: read 1040384 bytes of data UBI DBG: ubi_io_read: read 1040384 bytes from PEB 1027:8192 UBI: fixable bit-flip detected at PEB 1027 UBI DBG: ubi_io_write_vid_hdr: write VID header to PEB 4083 UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:4096 UBI DBG: ubi_io_read_vid_hdr: read VID header from PEB 4083 UBI DBG: ubi_io_read: read 4096 bytes from PEB 4083:4096 UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:8192 UBI DBG: ubi_io_read: read 4096 bytes from PEB 4083:8192 UBI: fixable bit-flip detected at PEB 4083 UBI DBG: schedule_erase: schedule erasure of PEB 4083, EC 55, torture 0 UBI DBG: erase_worker: erase PEB 4083 EC 55 UBI DBG: sync_erase: erase PEB 4083, old EC 55 UBI DBG: do_sync_erase: erase PEB 4083 UBI DBG: sync_erase: erased PEB 4083, new EC 56 UBI DBG: ubi_io_write_ec_hdr: write EC header to PEB 4083 UBI DBG: ubi_io_write: write 4096 bytes to PEB 4083:0 UBI DBG: ensure_wear_leveling: schedule scrubbing UBI DBG: wear_leveling_worker: scrub PEB 1027 to PEB 4083 ... This patch adopts the interface change as in Linux commit edbc4540 in order to avoid such situations. Given that none of the drivers under drivers/mtd return -EUCLEAN, this should only affect those using software ECC. I have tested that it works on a board which is currently out of tree, but which I hope to be able to begin upstreaming soon. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Acked-by: Stefan Roese <sr@denx.de>
* | sf: ramtron: Remove page_size printJagannadha Sutradharudu Teki2013-10-07-2/+1
| | | | | | | | | | | | | | There is no page_size for ramtron flashes, so just print the detected flash and it's size. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: Minor cleanupsJagannadha Sutradharudu Teki2013-10-07-10/+9
| | | | | | | | | | | | | | | | | | | | | | - Add spaces, tabs - Commenting. - Rearrange code. - Add static qualifier for missing func. - Remove memory_map from ramtron.c - Ramtron: spi_flash_internal.h -> sf_internal.h Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: Add memory mapped read supportPoddar, Sourav2013-10-07-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Qspi controller can have a memory mapped port which can be used for data read. Added support to enable memory mapped port read. This patch enables the following: - It enables exchange of memory map address between mtd and qspi through the introduction of "memory_map" flag. - Add support to communicate to the driver that memory mapped transfer is to be started through introduction of new flags like "SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END". This will enable the spi controller to do memory mapped configurations if required. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* | sf: probe: Add support for EN25S64Priyanka Jain2013-10-07-0/+1
| | | | | | | | | | | | | | Add support for EON EN25S64 SPI flash. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: Rename spi_flash filesJagannadha Sutradharudu Teki2013-10-07-4/+4
| | | | | | | | | | | | | | | | | | | | Renamed: spi_flash.c -> sf.c spi_flash_internal.h -> sf_internal.h spi_flash_ops.c -> sf_ops.c spi_flash_probe.c -> sf_probe.c Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: spi_flash cleanupsJagannadha Sutradharudu Teki2013-10-07-61/+82
| | | | | | | | | | | | | | | | | | | | | | More cleanups on spi_flash side: - Removed unneeded comments. - Rearranged macros in proper location. - Rearranged func declerations - Renamed few function names. - Added License headers. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for MX25L51235FJagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | Add support for Macronix MX25L51235F SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for MX25L25635FJagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | Add support for Macronix MX25L25635F SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: ops: Add static qualifier to spi_flash_cmd_bankaddr_writeJagannadha Sutradharudu Teki2013-10-07-6/+1
| | | | | | | | Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Print erase_size while printing flash detailsJagannadha Sutradharudu Teki2013-10-07-1/+2
| | | | | | | | | | | | Included erase_size while printing probed flash details. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Use print_size arg as page_sizeJagannadha Sutradharudu Teki2013-10-07-1/+1
| | | | | | | | | | | | | | Use flash->page_size arg in print_size() instead of flash->sector_size while printing detected flas part details. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for S25FL512S_256KJagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | Add support for Spansion S25FL512S_256K SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for S25FL256S_256KJagannadha Sutradharudu Teki2013-10-07-1/+2
| | | | | | | | | | | | Add support for Spansion S25FL256S_256K SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for EN25Q64Jagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | | | | | | | Add support for EON EN25Q64 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: Remove unneeded flash drivers filesJagannadha Sutradharudu Teki2013-10-07-1508/+0
| | | | | | | | | | | | | | Now the common probing is handled in spi_flash_probe.c hence removed the unneeded flash drivers. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: ramtron: Add support for separate flash driverJagannadha Sutradharudu Teki2013-10-07-283/+125
| | | | | | | | | | | | | | | | Compared to other spi flashes, ramtron has a different probing and implementation on flash ops, hence moved ramtron probe code into ramtron driver. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Simply the BAR configuration logicJagannadha Sutradharudu Teki2013-10-07-54/+20
| | | | | | | | Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for flag status pollingJagannadha Sutradharudu Teki2013-10-07-5/+11
| | | | | | | | | | | | | | | | From Micron, 512MB onwards, flash requires to poll flag status instead of read status- hence added E_FSR flag on spectific flash parts. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for erase sector selection flagJagannadha Sutradharudu Teki2013-10-07-83/+91
| | | | | | | | | | | | | | | | SECT_4K, SECT_32K and SECT_64K opeartions are performed to to specific flash by adding a SECT* flag on respective spi_flash_params.flag param. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support to clear flash BP# bitsJagannadha Sutradharudu Teki2013-10-07-0/+7
| | | | | | | | | | | | | | | | | | | | Few of the flashes(Atmel, Macronix and SST) require to clear BP# bits in flash power ups. So clear these BP# bits at probe time, so-that the flash is ready for user operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for SST_WPJagannadha Sutradharudu Teki2013-10-07-77/+181
| | | | | | | | | | | | | | | | | | | | Most of the SST flashes needs to write up using SST_WP, AAI Word Program, so added a flag param on spi_flash_params table. SST flashes, which supports SST_WP need to use a WP write sst_write_wp instead of common flash write. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Give proper spacing on flash table paramsJagannadha Sutradharudu Teki2013-10-07-77/+77
| | | | | | | | | | | | Given proper spacing between flash table params. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for AT45DB* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+9
| | | | | | | | | | | | | | | | | | | | Added AT45DB* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for SST25* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+12
| | | | | | | | | | | | | | | | | | | | | | Added SST25* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
* | sf: probe: Add support for S25FL* flash partsJagannadha Sutradharudu Teki2013-10-07-6/+25
| | | | | | | | | | | | | | | | | | | | Added S25FL* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for W25* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+32
| | | | | | | | | | | | | | | | | | | | Added W25* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for MX25L* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+9
| | | | | | | | | | | | | | | | | | | | Added MX25L* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for GD25* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+4
| | | | | | | | | | | | | | | | | | | | Added GD25* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for EN25Q* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+4
| | | | | | | | | | | | | | | | | | | | Added EN25Q* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add support for M25P* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+8
| | | | | | | | | | | | | | | | | | Added M25P* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: probe: Add new spi_flash_probe supportJagannadha Sutradharudu Teki2013-10-07-122/+385
| | | | | | | | | | | | | | | | | | | | | | Added new spi_flash_probe support, currently added N25Q* flash part attributes support. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | sf: Divide spi_flash into multiple partsJagannadha Sutradharudu Teki2013-10-07-567/+596
|/ | | | | | | | | | | | | | | | Divided the spi_flash framework into mutiple parts for - spi_flash.c: spi flash core file, interaction for spi/qspi driver to spi_flash framework. - spi_flash_ops.c spi flash preffered operations, erase,write and read. - spi_flash_probe.c spi flash probing, easy to extend probing functionality. This change will support to extend the functionality in a proper manner. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* mxs_nand: Fix ECC strength for NAND flash with OOB size of 224Elie De Brauwer2013-09-11-0/+3
| | | | | | | | | | | | | | | | | | | | On a board with an i.mx28 and a Micron MT29F4G08ABAEAH4, Linux says: NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron MT29F4G08ABAEAH4), 512MiB, page size: 4096, OOB size: 224) the ECC strength is 16. root@(none):/sys/devices/virtual/mtd/mtd0# for i in ecc_strength oobsize subpagesize; do echo $i = `cat $i`; done ecc_strength = 16 oobsize = 224 subpagesize = 4096 The ECC strength was not properly discovered by U-Boot causing the data written by Linux to return an -74 (EBADMSG) when read from U-Boot. This patch fixes mxs_nand_get_ecc_strength() to function in case of a NAND flash with page_data_size = 4096 and page_oob_size= 224. Signed-off-by: Elie De Brauwer <eliedebrauwer@gmail.com> Acked-by: Scott Wood <scottwood@freescale.com>
* mtd: atmel_nand: pmecc: fix bug fail to correct bit error in 1024-bytes sectorWu, Josh2013-09-04-1/+2
| | | | | | | | | | | | | | | | | The PMECC use BCH algorithm to correct error. In BCH algorithm, the primitive polynomial value is GF(2^13) for 512-bytes sector size. And it is GF(2^14) for 1024-bytes sector size. This patch will choose correct degree of the remainders (13 or 14) for different sector size. Tested in AT91SAM9X5-EK with MLC nand flash. More detail can be refered to section 5.4.1 of: AT91SAM ARM-based Embedded MPU Application Note <http://www.atmel.com/Images/doc11127.pdf> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-04-10/+188
|\
| * ARM: at91: atmel_nand: add code to check the ONFI parameter ECC requirementWu, Josh2013-08-22-2/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. if CONFIG_SYS_NAND_ONFI_DETECTION is defined, driver will check NAND flash's ecc minimum requirement in ONFI parameter. a) if CONFIG_PMECC_CAP, CONFIG_PMECC_SECTOR_SIZE are defined. then use it. Driver will display a WARNING if the values are different from ONFI parameters. b) if CONFIG_PMECC_CAP, CONFIG_PMECC_SECTOR_SIZE are not defined, then use the value from ONFI parameters. * If ONFI ECC parameters are in ONFI extended parameter page, since we are not support it, so assume the minimum ecc requirement is 2 bits in 512 bytes. * For non-ONFI support nand flash, also assume the minimum ecc requirement is 2 bits in 512 bytes. 2. if CONFIG_SYS_NAND_ONFI_DETECTION is not defined, just use CONFIG_PMECC_CAP and CONFIG_PMECC_SECTOR_SIZE. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
generated by cgit v1.1 at 2024-11-09 11:24:23 +0000