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* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-10-04-0/+851
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for setting up RAID engine liodns on P5020 powerpc/85xx: Refactor some defines out of corenet_ds.h fm-eth: Add ability for board code to disable a port powerpc/mpc8548: Add workaround for erratum NMG_LBC103 powerpc/mpc8548: Add workaround for erratum NMG_DDR120 powerpc/mpc85xxcds: Fix PCI speed powerpc/mpc8548cds: Fix booting message powerpc/p4080: Add support for secure boot flow powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards powerpc/p2041rdb: remove watch dog related codes powerpc/p2041rdb: updated description of cpld command powerpc/p2041rdb: add more ddr frequencies support powerpc/p2041rdb: set sysclk according to status of physical switch SW1 powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver powerpc/mpc8xxx: Add DDR2 to unified DDR driver powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en powerpc/85xx: Refactor P2041RDB to use common p_corenet files powerpc/85xx: refactor common P-Series CoreNet files for FSL boards powerpc/85xx: Enable CMD_REGINFO on corenet boards powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries powerpc/85xx: Fix USB protocol definitions for P1020RDB powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM powerpc/mpc8xxx: Move DDR RCW overriding to common code powerpc/mpc8xxx: Extend CWL table powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 powerpc/85xx: Cleanup extern in corenet_ds board code powerpc/p2041rdb: Add ethernet support on P2041RDB board powerpc/85xx: Add networking support to P1023RDS powerpc/hydra: Add ethernet support on P5020/P3041 DS boards powerpc/85xx: Add FMan ethernet support to P4080DS powerpc/85xx: Add support for FMan ethernet in Independent mode powerpc/mpc8548cds: Cleanup mpc8548cds.c powerpc/mp: add support for discontiguous cores powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries fdt: Add new fdt_create_phandle helper fdt: Rename fdt_create_phandle to fdt_set_phandle powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010) powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC) fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010) powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB nand: Freescale Integrated Flash Controller NAND support powerpc/85xx: Add basic support for P1010RDB powerpc/85xx: Add support for new P102x/P2020 RDB style boards powerpc/85xx: relocate CCSR before creating the initial RAM area powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
| * nand: Freescale Integrated Flash Controller NAND supportDipen Dudhat2011-09-29-0/+851
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add NAND support (including spl) on IFC, such as is found on the p1010. Note that using hardware ECC on IFC with small-page NAND (which is what comes on the p1010rdb reference board) means there will be insufficient OOB space for JFFS2, since IFC does not support 1-bit ECC. UBI should work, as it does not use OOB for anything but ECC. When hardware ECC is not enabled in CSOR, software ECC is now used. Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> [scottwood@freescale.com: ECC rework and misc fixes] Signed-off-by: Scott Wood <scottwood@freescale.com>
* | GCC4.6: Squash warning in vmt.cMarek Vasut2011-10-01-4/+7
| | | | | | | | | | | | | | | | | | vmt.c: In function ‘ubi_free_volume’: vmt.c:681:6: warning: variable ‘err’ set but not used [-Wunused-but-set-variable] Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | GCC4.6: Squash warning in nand_bbt.cMarek Vasut2011-10-01-4/+1
| | | | | | | | | | | | | | | | | | nand_bbt.c: In function ‘search_bbt’: nand_bbt.c:465:6: warning: variable ‘bits’ set but not used [-Wunused-but-set-variable] Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com>
* | Merge branch 'sf' of git://git.denx.de/u-boot-blackfinWolfgang Denk2011-10-01-0/+8
|\ \ | | | | | | | | | | | | | | | * 'sf' of git://git.denx.de/u-boot-blackfin: sf: eon: add support for EN25Q32B parts cmd_sf: add "update" subcommand to do smart SPI flash update
| * | sf: eon: add support for EN25Q32B partsShaohui Xie2011-09-29-0/+8
| |/ | | | | | | | | Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | spl: add NAND Library to new SPLSimon Schwarz2011-09-30-4/+282
|/ | | | | | | | Adds NAND library to SPL. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* sf: fix debug format string warningVadim Bendebury2011-09-21-1/+1
| | | | | | | | On some systems, we get a warning when %lu is used with size_t's, so use the correct format string. Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: winbond: Add support for the Winbond W25X40James Le Cuirot2011-09-05-0/+8
| | | | | The Winbond W25X40 is now being used in the IP02 (and possibly IP04). Tested and working on the actual device.
* sf: macronix: disable write protection when initializingSimon Guinot2011-08-02-0/+42
| | | | Signed-off-by: Simon Guinot <sguinot@lacie.com>
* sf: spansion: add support for S25FL129P_64KShaohui Xie2011-08-02-0/+9
| | | | | Signed-off-by: Shaohui Xie <b21989@freescale.com> Cc: Mike Frysinger <vapier@gentoo.org>
* mtd/spi/macronix.c: add MX25L4005 and MX25L8005Macpaul Lin2011-08-02-0/+16
| | | | | | | | | Add support of MX25L4005 and MX25L8005 according to the datasheet http://www.mct.net/download/macronix/mx25l8005.pdf This patch has been tested with MX25L4005 and MX25L8005 Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* sf: sst: support newer standardized flashesMike Frysinger2011-07-26-2/+20
| | | | | | | | | Newer SST flashes have dropped the Auto Address Increment (AAI) word programming (WP) modes in favor of the standard page programming mode that most flashes now support. So add a flags field to the different flashes to support both modes with new and old styles. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify write disable commandsMike Frysinger2011-07-26-1/+10
| | | | | | | | | Every spi flash uses the same write disable command, so unify this in the common code. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Fixed commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
* sf: eon/stmicro: inline useless ID definesMike Frysinger2011-07-26-20/+9
| | | | | | These defines are used in only one place, so just inline them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: kill off now-unused local stateMike Frysinger2011-07-26-123/+61
| | | | | | | | Now that the common spi_flash structure tracks all the info that these drivers need, kill off their local state indirection and use just what the common code provides. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify write funcsMike Frysinger2011-07-26-324/+76
| | | | | | | Once we add a new page_size field for write lengths, we can unify the write methods for most of the spi flash drivers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify write enable commandsMike Frysinger2011-07-26-8/+16
| | | | | | | Every spi flash uses the same write enable command, so unify this in the common code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Timer: Allow reset_timer() only for systems with low resolution timersGraeme Russ2011-07-26-0/+4
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* Timer: Fix misuse of ARM *timer_masked() functions outside arch/armGraeme Russ2011-07-16-2/+3
| | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* NAND: Add 16bit NAND support for the NDFCAlex Waterman2011-07-01-4/+29
| | | | | | | | | | | | | | | | | | | This patch adds support for 16 bit NAND devices attached to the NDFC on ppc4xx processors. Two config entries were added: CONFIG_SYS_NDFC_16 - Setting this tells the NDFC that a 16 bit device is attached. CONFIG_SYS_NDFC_EBC0_CFG - This is for the External Bus Controller configuration register. Also, a new ndfc_read_byte() function was added which does not first convert the data to little endian. The NAND SPL was also modified to do 16bit bad block testing when a 16 bit chip is being used. Signed-off-by: Alex Waterman <awaterman@dawning.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: drop trailing all-0xff pages if requestedBen Gardiner2011-07-01-3/+37
| | | | | | | | | | | | | | | | | | | | Add a flag to nand_read_skip_bad() such that if true, any trailing pages in an eraseblock whose contents are entirely 0xff will be dropped. The implementation is via a new drop_ffs() function which is based on the function of the same name from the ubiformat utility by Artem Bityutskiy. This is as-per the reccomendations of the UBI FAQ [1] [1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Artem Bityutskiy <dedekind1@gmail.com> Acked-by: Detlev Zundel <dzu@denx.de> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: treat WITH_YAFFS_OOB as a modeBen Gardiner2011-07-01-0/+3
| | | | | | | | | | | | | When specified in the flags argument of nand_write, WITH_YAFFS_OOB causes an operation which is mutually exclusive with the 'usual' way of writing. Add a check that client code does not specify WITH_YAFFS_OOB along with any other flags and add a comment indicating that the WITH_YAFFS_OOB flag should not be mixed with other flags. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: convert nand_write_skip_bad() to flagsBen Gardiner2011-07-01-4/+4
| | | | | | | | | | | | | | | | | | | | | | In a future commit the behaviour of nand_write_skip_bad() will be further extended. Convert the only flag currently passed to the nand_write_ skip_bad() function to a bitfield of only one allocated member. This should avoid an explosion of int's at the end of the parameter list or the ambiguous calls like nand_write_skip_bad(info, offset, len, buf, 0, 1, 1); nand_write_skip_bad(info, offset, len, buf, 0, 1, 0); Instead there will be: nand_write_skip_bad(info, offset, len, buf, WITH_YAFFS_OOB | WITH_OTHER); Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Acked-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_base: trivial: fix comment read/write commentBen Gardiner2011-07-01-1/+1
| | | | | | | | Replace an incorrect 'read' with 'write' in a comment. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Acked-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* cfi_flash: reverse geometry for newer STM partsMike Frysinger2011-06-29-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | For newer STM parts where CFI >= 1.1, there is a byte in the extended structure that declares the flash layout type (just like the AMD parts), so key off of that to find out when we need to reverse the geometry. This can be seen with M29W640 parts where U-Boot does: Bank # 1: CFI conformant FLASH (16 x 16) Size: 8 MB in 135 Sectors AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22ED Erase timeout: 8192 ms, write timeout: 1 ms Buffer write timeout: 1 ms, buffer size: 16 bytes Sector Start Addresses: 20000000 RO 20002000 RO 20004000 RO 20006000 RO 20008000 RO 2000A000 RO 2000C000 RO 2000E000 RO 20010000 RO 20020000 RO ... But Linux does: physmap platform flash device: 00800000 at 20000000 physmap-flash.0: Found 1 x16 devices at 0x0 in 16-bit bank. Manufacturer ID 0x000020 Chip ID 0x0022ed physmap-flash.0: Swapping erase regions for top-boot CFI table. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Stefan Roese <sr@denx.de>
* sf: kick watchdog when pollingPatrick Sestier2011-06-01-0/+3
| | | | | | | | The status polling can take a while, so make sure we kick the watchdog after each successful poll. Signed-off-by: Patrick Sestier <psestier@mircom.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* ftsmc020: fix relocationMacpaul Lin2011-05-12-4/+3
| | | | | | Avoid relocation problem by fix global declaration. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* ftsmc020: move ftsmc020 static mem controller to driver/mtdMacpaul Lin2011-04-27-0/+52
| | | | | | | | | | | Move the header file and definitions of ftsmc020 static memory control unit from a320 SoC folder to "drivers/mtd" folder. This change will let other SoC which also use ftsmc020 could share the same header file. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* cfi_flash driver - Add delay after reset commandAaron Williams2011-04-21-0/+7
| | | | | | | | | | | | | I ran into a problem where the reset was failing except when I enabled debugging support. After talking with Garret Swalling at Spansion I was told that the GL-N series of devices require a 500ns wait for the reset to complete. The below patch adds a 1us delay after all reset commands. -Aaron Williams Signed-off-by: Aaron Williams <aaron.williams@caviumnetworks.com> Signed-off-by: Stefan Roese <sr@denx.de>
* mtd, cfi: read AMD 3-byte (expanded) device ids on 16bit devicesHeiko Schocher2011-04-21-2/+11
| | | | | | | | | | | | | | | | | | | | | tested on the a4m072 board with a S29GL512P flash. flinfo without this patch Bank # 1: CFI conformant flash (16 x 16) Size: 32 MB in 256 Sectors AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E Erase timeout: 16384 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 32 bytes [...] flinfo with this patch Bank # 1: CFI conformant flash (16 x 16) Size: 32 MB in 256 Sectors AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x227E2301 Erase timeout: 16384 ms, write timeout: 2 ms Buffer write timeout: 5 ms, buffer size: 32 bytes [...] Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: reverse geometry for M29W800DT partsMike Frysinger2011-04-21-3/+4
| | | | | | | | | | | | | | | | | | | | | | The M29W800DT parts also report their geometry with the sector layout reversed. So add that ID to the flash_fixup_stm function. Otherwise, we get: bfin> flinfo Bank # 1: CFI conformant FLASH (16 x 16) Size: 1 MB in 19 Sectors AMD Standard command set, Manufacturer ID: 0x20, Device ID: 0x22D7 Erase timeout: 8192 ms, write timeout: 1 ms Sector Start Addresses: 20000000 20004000 20006000 20008000 20010000 20020000 20030000 20040000 20050000 20060000 20070000 20080000 20090000 200A0000 200B0000 200C0000 200D0000 200E0000 200F0000 Reported-by: Jianxi Fu <fujianxi@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Stefan Roese <sr@denx.de>
* NAND: rearrange ONFI revision checking, add ONFI 2.3Florian Fainelli2011-04-15-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch sync with Brian's patch on Linux in nand_flash_detect_onfi() commit b7b1a29d94c17e4341856381bccb4d17495bea60 Author: Brian Norris <computersforpeace@gmail.com> Date: Sun Dec 12 00:23:33 2010 -0800 mtd: nand: rearrange ONFI revision checking, add ONFI 2.3 In checking for the ONFI revision, the first conditional (for checking "unsupported" ONFI) seems unnecessary. All ONFI revisions should be backwards-compatible; even if this is not the case on some newer ONFI revision, it should simply fail the second version-checking if-else block (i.e., the bit-fields for 1.0, 2.0, etc. would not be set to 1). Thus, we move our "unsupported" condition after having checked each bit field. Also, it's simple enough to add a condition for ONFI revision 2.3. Note that this does *NOT* mean we handle all new features of ONFI versions above 1.0. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Florian Fainelli <florian@openwrt.org>
* NAND: Fix integer overflow in ONFI detection of chips >= 4GiBFlorian Fainelli2011-04-15-1/+1
| | | | | | | | | | | | | | This patch sync with David's patch on Linux in nand_flash_detect_onfi() commit 4ccb3b4497ce01fab4933704fe21581e30fda1a5 Author: David Woodhouse <David.Woodhouse@intel.com> Date: Fri Dec 3 16:36:34 2010 +0000 mtd: nand: Fix integer overflow in ONFI detection of chips >= 4GiB Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Florian Fainelli <florian@openwrt.org>
* Merge branch 'sf' of git://git.denx.de/u-boot-blackfinWolfgang Denk2011-04-13-75/+71
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| * sf: sst: add support for SST25VF064CJames Kosin2011-04-13-0/+4
| | | | | | | | | | Signed-off-by: James Kosin <jkosin@intcomgrp.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * sf: use print_size() for sector_size outputMike Frysinger2011-04-12-2/+2
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * sf: localize erase funcsMike Frysinger2011-04-12-9/+9
| | | | | | | | | | | | | | No need for these to be exported as they are only accessed indirectly via function pointers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * sf: sst: setup read funcMike Frysinger2011-04-12-0/+1
| | | | | | | | | | | | The previous unification patch missed setting up the sst read func. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * sf: add struct spi_flash.sector_size parameterRichard Retanubun2011-04-12-64/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a new member to struct spi_flash (u16 sector_size) and updates the spi flash drivers to start populating it. This parameter can be used by spi flash commands that need to round up units of operation to the flash's sector_size. Having this number in one place also allows duplicated code to be further collapsed into one common location (such as erase parameter and the detected message). Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * sf: atmel: undo unification of status pollingMike Frysinger2011-04-11-2/+29
| | | | | | | | | | | | | | | | The AT45 flashes are completely different (at the command set and status register level) from all other SPI flashes, so we can't unify their logic with common code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | cfi_flash: Fix CONFIG_SYS_FLASH_AUTOPROTECT_LIST usagePeter Tyser2011-04-13-6/+8
|/ | | | | | | | | | | | | | | | | | | | | Commit 6ee1416e8184b4d9ebe6087d396a60bcecf3551c (mtd, cfi: introduce void flash_protect_default(void)) introduced a bug which resulted in boards that define CONFIG_SYS_FLASH_AUTOPROTECT_LIST not compiling with the the following errors and warning: ptyser@petert u-boot $ make -s xpedite520x Configuring for xpedite520x board... cfi_flash.c: In function 'flash_protect_default': cfi_flash.c:2118: error: 'i' undeclared (first use in this function) cfi_flash.c:2118: error: (Each undeclared identifier is reported only once cfi_flash.c:2118: error: for each function it appears in.) cfi_flash.c:2118: error: 'apl' undeclared (first use in this function) cfi_flash.c:2118: error: invalid application of 'sizeof' to incomplete type 'struct apl_s' cfi_flash.c: In function 'flash_init': cfi_flash.c:2137: warning: unused variable 'apl' Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Reported-by: Kumar Gala <galak@kernel.crashing.org> Cc: Heiko Schocher <hs@denx.de>
* sf: unify read functionsMike Frysinger2011-04-11-157/+22
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify erase functionsMike Frysinger2011-04-11-335/+83
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify status polling for ready bitMike Frysinger2011-04-11-283/+81
| | | | | | | | All of the spi flash drivers implement the status register polling for detecting the device ready state, so unify them all in a new helper function -- spi_flash_wait_ready. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify read/write helpersMike Frysinger2011-04-11-48/+19
| | | | | | | These functions largely do the same exact thing, so unify them all into one basic function. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* mtd, cfi: introduce void flash_protect_default(void)Heiko Schocher2011-04-07-36/+41
| | | | | | | | collect code which protects default sectors in a function, called flash_protect_default. So boardspecific code can call it too. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* cfi_flash: use AMD fixups for AMIC (e.g. A29L160A series) tooMario Schuknecht2011-04-07-1/+2
| | | | | | Signed-off-by: Mario Schuknecht <m.schuknecht@dresearch.de> Signed-off-by: Steffen Sledz <sledz@dresearch.de> Signed-off-by: Stefan Roese <sr@denx.de>
* atmel_nand: don't require CONFIG_SYS_NAND_ENABLE_PINmichael2011-04-01-0/+2
| | | | | | | | | | | | If NCE is hooked up to NCS3, we don't need to (and can't) explicitly set the state of the NCE pin. Instead, the controller asserts it automatically as part of a command/data access. Only "CE don't care"-type NAND chips can be used in this manner. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
* NAND: add support for reading ONFI page tableFlorian Fainelli2011-04-01-49/+144
| | | | | | | | | | | | This patch adds support for reading an ONFI page parameter from a NAND device supporting it. If this is the case, struct nand_chip onfi_version member contains the supported ONFI version, 0 otherwise. This allows NAND drivers past nand_scan_ident to set the best timings for the NAND chip. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
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