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* dm: sf: sandbox: Convert SPI flash driver to driver modelSimon Glass2014-10-22-47/+291
| | | | | | | Convert sandbox's spi flash emulation driver to use driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* dm: Convert spi_flash_probe() and 'sf probe' to use driver modelSimon Glass2014-10-22-2/+64
| | | | | | | | | | | | | | | | | | | We want the SPI flash probing feature to operate as a standard driver. Add a driver for the basic probing feature used by most boards. This will be activated by device_probe() as with any other driver. The 'sf probe' command currently keeps track of the SPI slave that it last used. This doesn't work with driver model, since some other driver or system may have probed the device and have access to it too. On the other hand, if we try to probe a device twice the second probe is a nop with driver model. Fix this by searching for the matching device, removing it, and then probing it again. This should work as expected regardless of other device activity. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* dm: sf: Add a uclass for SPI flashSimon Glass2014-10-22-1/+69
| | | | | | | | | | | Add a driver model uclass for SPI flash which supports the common operations (read, write, erase). Since we must keep support for the non-dm interface, some modification of the spi_flash header is required. CONFIG_DM_SPI_FLASH is used to enable driver model for SPI flash. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* spi: Use error return value in sf_opsSimon Glass2014-10-22-33/+57
| | | | | | | | | | | | | Adjust spi_flash_probe_slave() to return an error value instead of a pointer so we get the correct error return. Have the caller allocate memory for spi_flash to simplify error handling, and also so that driver model can use its existing allocated memory. Add a spi.h include in the sf_params file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* sf: Tidy up public and private header filesSimon Glass2014-10-22-7/+62
| | | | | | | | Since spi_flash.h is supposed to be the public API for SPI flash, move private things to sf_internal.h. Also tidy up a few comment nits. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* dm: Add spi.h header to a few filesSimon Glass2014-10-22-0/+1
| | | | | | | | Some files are using SPI functions but not explitly including the SPI header file. Fix this, since driver model needs it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* sandbox: Convert SPI flash emulation to use sf_paramsSimon Glass2014-09-26-76/+38
| | | | | | | | | | | At present sandbox has its own table of supported SPI flash chips. Now that the SPI flash system is fully consolidated and has its own list, sandbox should use that. This enables us to expand the number of chips that sandbox supports. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add M25PX64 SPI NOR flash IDStefan Roese2014-09-24-0/+1
| | | | | | | | | | Add ID for this Numonix / STMicro chip. Tested on Marvell DB-78460-BP board. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* spl: replace CONFIG_SPL_SPI_* with CONFIG_SF_DEFAULT_*Nikita Kiryanov2014-09-24-2/+4
| | | | | | | | | | | | | | | | | | | | | | | Currently, CONFIG_SPL_SPI_* #defines are used for controlling SPI boot in SPL. These #defines do not allow the user to select SPI mode for the SPI flash (there's no CONFIG_SPL_SPI_MODE, so the SPI mode is hardcoded in spi_spl_load.c), and duplicate information already provided by CONFIG_SF_DEFAULT_* #defines. Kill CONFIG_SPL_SPI_*, and use CONFIG_SF_DEFAULT_* instead. Cc: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Lokesh Vutla <lokeshvutla@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Bo Shen <voice.shen@atmel.com> Cc: Hannes Petermaier <hannes.petermaier@br-automation.com> Cc: Michal Simek <monstr@monstr.eu> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* mtd: spi: add support for M25PE16 and M25PX16Nikita Kiryanov2014-09-24-0/+2
| | | | | | | | | Add support for M25PE16 and M25PX16 Cc: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add an empty entry to the parameter listSimon Glass2014-09-23-0/+1
| | | | | | | | The list is supposed to be terminated with a NULL name, but is not. If a board probes a chip which does not appear in the table, U-Boot will crash (at least on sandbox). Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-08-11-0/+1
|\ | | | | | | | | | | | | Conflicts: boards.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
| * sf: sf_ops: Stop leaking memoryMarek Vasut2014-08-06-0/+1
| | | | | | | | | | | | | | | | | | It's usually a common pattern to free() the memory that we allocated. Implement this here to stop leaking memory. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* | spi: add config option to enable the WP pin function on st micron flashesHeiko Schocher2014-07-23-0/+34
|/ | | | | | | | | enable the W#/Vpp signal to disable writing to the status register on ST MICRON flashes like the N25Q128 thorugh the new config option CONFIG_SYS_SPI_ST_ENABLE_WP_PIN Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* sf: probe: Fix quad bit set pathPoddar, Sourav2014-06-08-10/+10
| | | | | | | | | | Currently, flash quad bit is set in "spi_flash_validate_params" and later at the end in the same api, we write 0 to status register for few flashes, thereby overriding the quad bit set. This fix moves the quad bit setting outside this api in "spi_flash_probe_slave" Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: params: Added support for Spansion S25FL512S_512KSiva Durga Prasad Paladugu2014-06-08-0/+1
| | | | | | | | Added support for Spansion chip "S25FL512S_512K". Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* Merge branch 'u-boot/master'Albert ARIBAUD2014-05-09-3/+26
|\ | | | | | | | | | | | | Conflicts: drivers/net/Makefile (trivial merge)
| * driver: Add support of image load for MMC & SPI in SPLPrabhakar Kushwaha2014-04-22-0/+14
| | | | | | | | | | | | | | Add support of loading image, binary for MMC and SPI during SPL boot. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * driver/mtd/spi:Read 8KB data chunk during u-boot load in SPLPrabhakar Kushwaha2014-04-22-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI driver perform its operation(read/write) on 64KB buffer chunk for data greater than 64KB. This buffer chunk is allocated from system heap. During SPL boot, 768KB of data is read from SPI flash. Here, heap size may not be sufficient enough to full-fill 64KB buffer requirement of SPI driver. So break down u-boot read operation at 8KB of chunk. Also, fix a warning i.e. "unused variable buf" during CONFIG_FSL_CORENET Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | SPL:SPI: Add Falcon Mode supportTom Rini2014-04-17-6/+40
|/ | | | Signed-off-by: Tom Rini <trini@ti.com>
* mtd: spi: Fix page size for S25FL032P,S25FL064PMarek Vasut2014-03-17-1/+15
| | | | | | | | | | | | The commit 6af8dc3ebccb3b1e4b2e479315e49545e7f53150 broke support for S25FL032P and S25FL064P by carelessly removing the code handling special page size for these two SPI NOR flashes and unifying the code under the assumption that Extended JEDEC ID of 0x4d00 always implies 512b page size. Add special case handling for these two SPI NOR flashes. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: ops: Squash the malloc+memset comboJagannadha Sutradharudu Teki2014-03-17-2/+6
| | | | | | | Squash the malloc()+memset() combo in favor of calloc(). Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Acked-by: Marek Vasut <marex@denx.de>
* sf: Squash the malloc+memset comboMarek Vasut2014-03-17-2/+1
| | | | | | | Squash the malloc()+memset() combo in favor of calloc(). Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add S25FL128S_256K IDsMarek Vasut2014-03-17-0/+1
| | | | | | | Add IDs for this new chip. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Fix entries for S25FL256S_256K and S25FL512S_256KMarek Vasut2014-03-17-2/+2
| | | | | | | | | Both of these chips have 256kB big sectors, thus the _256K suffix, compared to their _64K counterparts, which have 64kB sectors. Also, they have four times less sectors than their _64K counterparts. Signed-off-by: Marek Vasut <marex@denx.de> Tested-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: params: Removed flag SECT_4K for Micron N25Q128Siva Durga Prasad Paladugu2014-01-12-2/+2
| | | | | | | | | Remove the flag SECT_4K for device N25Q128 as the 4K-byte sub sector erase granularity is available only for top/bottom 8 sectors in some of the N25Q128 chips. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add CONFIG_SF_DUAL_FLASHJagannadha Sutradharudu Teki2014-01-12-5/+14
| | | | | | | This config will use for defining greater than single flash support. currently - DUAL_STACKED and DUAL_PARALLEL. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add dual memories support - DUAL_PARALLELJagannadha Sutradharudu Teki2014-01-12-7/+12
| | | | | | | | | This patch added support for accessing dual memories in parallel connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add dual memories support - DUAL_STACKEDJagannadha Sutradharudu Teki2014-01-12-11/+57
| | | | | | | | | This patch added support for accessing dual memories in stacked connection with single chipselect line from controller. For more info - see doc/SPI/README.dual-flash Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: ops: Unify read_ops bank configurationJagannadha Sutradharudu Teki2014-01-12-8/+5
| | | | | | Unified the bar code from read_ops into a spi_flash_bar() Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Code cleanupsJagannadha Sutradharudu Teki2014-01-12-13/+8
| | | | | | | - comment typo's - func args have a proper names Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Divide flash register ops from QEB codeJagannadha Sutradharudu Teki2014-01-11-53/+77
| | | | | | | QEB code comprises of couple of flash register read/write operations, this patch moved flash register operations on to sf_op Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Enable macronix quad read/write cmds supportJagannadha Sutradharudu Teki2014-01-11-4/+4
| | | | | | | | | Added macronix flash quad read/write commands support and it's up to the respective controller driver usecase to configure the respective commands by defining SPI RX/TX operation modes from include/spi.h on the driver. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add macronix set QEB supportJagannadha Sutradharudu Teki2014-01-11-0/+35
| | | | | | | This patch adds set QEB support for macronix flash devices which are trying to program/read quad operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Discover read dummy_byteJagannadha Sutradharudu Teki2014-01-11-7/+30
| | | | | | | Discovered the read dummy_byte based on the configured read command. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add QUAD_IO_FAST read supportJagannadha Sutradharudu Teki2014-01-11-0/+3
| | | | | | This patch adds support QUAD_IO_FAST read command. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Separate the flash params tableJagannadha Sutradharudu Teki2014-01-11-145/+135
| | | | | | | | Moved the flash params table from sf_probe.c and placed on to sf_params.c, hence flash params file will alter based on new addons. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Enable RD_FULL and WR_QPPJagannadha Sutradharudu Teki2014-01-11-30/+30
| | | | | | | | | This patch enabled RD_FULL and WR_QPP for supported flashes in micron, winbond and spansion. Remaining parts will be add in future patches. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Set quad enable bit supportJagannadha Sutradharudu Teki2014-01-11-2/+62
| | | | | | | | | | | | | This patch provides support to set the quad enable bit on flash. quad enable bit needs to set before performing any quad IO operations on respective SPI flashes. Currently added set quad enable bit for winbond and spansion flash devices. stmicro flash doesn't require to set as qeb is volatile. remaining flash devices support will add in future patches. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: ops: Add configuration register writing supportJagannadha Sutradharudu Teki2014-01-11-0/+24
| | | | | | | | | This patch provides support to program a flash config register. Configuration register contains the control bits used to configure the different configurations and security features of a device. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add quad read/write commands supportJagannadha Sutradharudu Teki2014-01-11-86/+96
| | | | | | | | This patch add quad commands support like - QUAD_PAGE_PROGRAM => for write program - QUAD_OUTPUT_FAST ->> for read program Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Add extended read commands supportJagannadha Sutradharudu Teki2014-01-11-86/+108
| | | | | | | | | | | Current sf uses FAST_READ command, this patch adds support to use the different/extended read command. This implementation will determine the fastest command by taking the supported commands from the flash and the controller, controller is always been a priority. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* driver: mtd: sf_ops: claim bus while doing memcpyPoddar, Sourav2013-12-19-0/+6
| | | | | | | | | | claim spi bus while doing memory copy, this will set up the spi controller device control register before doing a memory read. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Yebio Mesfin <ymesfin@ti.com> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: add support for MX25L2006ELuka Perkov2013-12-18-0/+1
| | | | | | | Add support for Macronix MX25L2006E SPI flash. Signed-off-by: Luka Perkov <luka@openwrt.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* sf: probe: Hex values are in lower caseLuka Perkov2013-12-18-1/+1
| | | | | | | | All other hex values in sf_probe.c are in lower case so we should fix this one too. Signed-off-by: Luka Perkov <luka@openwrt.org> Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* Merge branch 'spi' of git://git.denx.de/u-boot-x86Tom Rini2013-12-10-5/+508
|\
| * sandbox: spi: Add new SPI flash driverMike Frysinger2013-12-09-1/+487
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a SPI flash driver which simulates SPI flash clients. Currently supports the bare min that U-Boot requires: you can probe, read, erase, and write. Should be easy to extend to make it behave more exactly like a real SPI flash, but this is good enough to merge now. sjg@chromium.org added a README and tidied up code a little. Added a required map_sysmem() for sandbox. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| * spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT nodeSimon Glass2013-12-09-4/+21
| | | | | | | | | | | | | | This allows us to put the SPI flash chip inside the SPI interface node, with U-Boot finding the correct bus and chip select automatically. Signed-off-by: Simon Glass <sjg@chromium.org>
* | powerpc: spiflash:Add corenet devices support in eSPI SPLPriyanka Jain2013-12-04-0/+5
|/ | | | | | | | | | | | | | | Existing eSPI SPL framework assumes booting from spi-image with boot_format header which contains final u-boot Image offset and size. No such header is present in case of corenet devices like T1040 as corenet deivces use PBI-RCW based intialization. So, for corenet deives, SPL bootloader use values provided at compilation time. These values can be defined in board specific config file. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
* drivers: mtd: convert makefiles to Kbuild styleMasahiro Yamada2013-10-31-30/+6
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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