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* sf: probe: Print erase_size while printing flash detailsJagannadha Sutradharudu Teki2013-10-07-1/+2
| | | | | | Included erase_size while printing probed flash details. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Use print_size arg as page_sizeJagannadha Sutradharudu Teki2013-10-07-1/+1
| | | | | | | Use flash->page_size arg in print_size() instead of flash->sector_size while printing detected flas part details. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for S25FL512S_256KJagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | Add support for Spansion S25FL512S_256K SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for S25FL256S_256KJagannadha Sutradharudu Teki2013-10-07-1/+2
| | | | | | Add support for Spansion S25FL256S_256K SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for EN25Q64Jagannadha Sutradharudu Teki2013-10-07-0/+1
| | | | | | Add support for EON EN25Q64 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Remove unneeded flash drivers filesJagannadha Sutradharudu Teki2013-10-07-1508/+0
| | | | | | | Now the common probing is handled in spi_flash_probe.c hence removed the unneeded flash drivers. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: ramtron: Add support for separate flash driverJagannadha Sutradharudu Teki2013-10-07-283/+125
| | | | | | | | Compared to other spi flashes, ramtron has a different probing and implementation on flash ops, hence moved ramtron probe code into ramtron driver. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Simply the BAR configuration logicJagannadha Sutradharudu Teki2013-10-07-54/+20
| | | | Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for flag status pollingJagannadha Sutradharudu Teki2013-10-07-5/+11
| | | | | | | | From Micron, 512MB onwards, flash requires to poll flag status instead of read status- hence added E_FSR flag on spectific flash parts. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for erase sector selection flagJagannadha Sutradharudu Teki2013-10-07-83/+91
| | | | | | | | SECT_4K, SECT_32K and SECT_64K opeartions are performed to to specific flash by adding a SECT* flag on respective spi_flash_params.flag param. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support to clear flash BP# bitsJagannadha Sutradharudu Teki2013-10-07-0/+7
| | | | | | | | | | Few of the flashes(Atmel, Macronix and SST) require to clear BP# bits in flash power ups. So clear these BP# bits at probe time, so-that the flash is ready for user operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for SST_WPJagannadha Sutradharudu Teki2013-10-07-77/+181
| | | | | | | | | | Most of the SST flashes needs to write up using SST_WP, AAI Word Program, so added a flag param on spi_flash_params table. SST flashes, which supports SST_WP need to use a WP write sst_write_wp instead of common flash write. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Give proper spacing on flash table paramsJagannadha Sutradharudu Teki2013-10-07-77/+77
| | | | | | Given proper spacing between flash table params. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for AT45DB* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+9
| | | | | | | | | | Added AT45DB* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for SST25* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+12
| | | | | | | | | | | Added SST25* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
* sf: probe: Add support for S25FL* flash partsJagannadha Sutradharudu Teki2013-10-07-6/+25
| | | | | | | | | | Added S25FL* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for W25* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+32
| | | | | | | | | | Added W25* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for MX25L* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+9
| | | | | | | | | | Added MX25L* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for GD25* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+4
| | | | | | | | | | Added GD25* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for EN25Q* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+4
| | | | | | | | | | Added EN25Q* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add support for M25P* flash partsJagannadha Sutradharudu Teki2013-10-07-1/+8
| | | | | | | | | Added M25P* parts are which are avilable in spi_flash_probe_legacy.c. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: probe: Add new spi_flash_probe supportJagannadha Sutradharudu Teki2013-10-07-122/+385
| | | | | | | | | | | Added new spi_flash_probe support, currently added N25Q* flash part attributes support. Updated the sector_size attributes as per the flash parts. Looks fine for with this sector_size for computing the size of flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Divide spi_flash into multiple partsJagannadha Sutradharudu Teki2013-10-07-567/+596
| | | | | | | | | | | | | | | | Divided the spi_flash framework into mutiple parts for - spi_flash.c: spi flash core file, interaction for spi/qspi driver to spi_flash framework. - spi_flash_ops.c spi flash preffered operations, erase,write and read. - spi_flash_probe.c spi flash probing, easy to extend probing functionality. This change will support to extend the functionality in a proper manner. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* SPDX-License-Identifier: clean up license headerYork Sun2013-08-20-16/+1
| | | | | | | | | This patch cleans up license header in these files: board/freescale/p1022ds/spl.c drivers/mmc/fsl_esdhc_spl.c drivers/mtd/spi/fsl_espi_spl.c Signed-off-by: York Sun <yorksun@freescale.com>
* powerpc : spi flash : Support to start from eSPI with SPLYing Zhang2013-08-20-0/+80
| | | | | | | | | | | | | | | | | This patch introduces SPL to enable a loader stub that being loaded by the code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang <b40530@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
* sf: sst: Add support for SST25WF080Jagannadha Sutradharudu Teki2013-08-07-0/+6
| | | | | | | Add support for SST25WF080 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* sf: Fix code cleanupsJagannadha Sutradharudu Teki2013-08-07-15/+16
| | | | | | | - CHECK: Alignment should match open parenthesis - trailing whitespace Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: Fix code cleanupJagannadha Sutradharudu Teki2013-08-06-5/+6
| | | | | | | - line over 80 characters. - CHECK: Alignment should match open parenthesis Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: stmicro: Fix code cleanupJagannadha Sutradharudu Teki2013-08-06-4/+3
| | | | | | | | - line over 80 characters - foo * bar -> foo *bar - removed unnecessary for single statement blocks. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: sst: Fix code cleanupJagannadha Sutradharudu Teki2013-08-06-12/+20
| | | | | | | | - line over 80 characters - add spaces - add tabs Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* sf: eon|spansion|ramtron: Fix code cleanupJagannadha Sutradharudu Teki2013-08-06-5/+7
| | | | | | | - line over 80 characters - insert the expression in same line Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-133/+8
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2013-06-24-135/+341
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| * sf: Warn to use BAR for > 16MiB flashesJagannadha Sutradharudu Teki2013-06-23-0/+6
| | | | | | | | | | | | Warning for > 16MiB flashes to #define CONFIG_SPI_FLASH_BAR Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * sf: Add debug messages on spi_flash_read_commonJagannadha Sutradharudu Teki2013-06-23-1/+11
| | | | | | | | | | | | | | - Added debug's on spi_flash_read_common() - Added space Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * sf: Place the sf calls in proper orderJagannadha Sutradharudu Teki2013-06-23-92/+92
| | | | | | | | | | | | Placed the sf calls in proper order - erase/write/read Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * sf: Unify spi_flash write codeJagannadha Sutradharudu Teki2013-06-23-67/+63
| | | | | | | | | | | | | | Move common flash write code into spi_flash_write_common(). Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
| * sf: Add flag status register polling supportJagannadha Sutradharudu Teki2013-06-23-4/+18
| | | | | | | | | | | | | | | | | | | | | | | | Flag status register polling is required for micron 512Mb flash devices onwards, for performing erase/program operations. Like polling for WIP(Write-In-Progress) bit in read status register, spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control) bit in flag status register. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * sf: Remove spi_flash_cmd_poll_bit()Jagannadha Sutradharudu Teki2013-06-23-12/+3
| | | | | | | | | | | | | | | | | | There is no other call other than spi_flash_cmd_wait_ready(), hence removed spi_flash_cmd_poll_bit and use the poll status code spi_flash_cmd_wait_ready() itself. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * sf: spansion: Add support for S25FL512S_64KJagannadha Sutradharudu Teki2013-06-23-0/+7
| | | | | | | | | | | | Add support for Spansion S25FL512S_64K SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * sf: stmicro: Add support for N25Q1024AJagannadha Sutradharudu Teki2013-06-23-0/+6
| | | | | | | | | | | | Add support for Numonyx N25Q1024A SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * sf: stmicro: Add support for N25Q1024Jagannadha Sutradharudu Teki2013-06-23-0/+6
| | | | | | | | | | | | Add support for Numonyx N25Q1024 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * sf: stmicro: Add support for N25Q512AJagannadha Sutradharudu Teki2013-06-23-0/+6
| | | | | | | | | | | | Add support for Numonyx N25Q512A SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * sf: stmicro: Add support for N25Q512Jagannadha Sutradharudu Teki2013-06-23-0/+6
| | | | | | | | | | | | Add support for Numonyx N25Q512 SPI flash. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * sf: Use spi_flash_addr() in write callJagannadha Sutradharudu Teki2013-06-23-5/+2
| | | | | | | | | | | | | | | | Use the existing spi_flash_addr() for 3-byte addressing cmd filling in write call. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * sf: Add bank addr code in CONFIG_SPI_FLASH_BARJagannadha Sutradharudu Teki2013-06-23-10/+25
| | | | | | | | | | | | | | | | | | | | | | Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the size for existing boards which has < 16Mbytes SPI flashes. It's upto user which has provision to use the bank addr code for flashes which has > 16Mbytes. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * sf: Update sf read to support all sizes of flashesJagannadha Sutradharudu Teki2013-06-23-3/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updated the spi_flash read func to support all sizes of flashes using bank reg addr facility. The same support has been added in below patch for erase/write spi_flash functions: "sf: Support all sizes of flashes using bank addr reg facility" (sha1: c956f600cbb0943d0afe1004cdb503f4fcd8f415) With these new updates on sf framework, the flashes which has < 16MB are not effected as per as performance is concern and but the u-boot.bin size incrased ~460 bytes. sf update(for first 16MBytes), Changes before: U-Boot> sf update 0x1000000 0x0 0x1000000 - N25Q256 16777216 bytes written, 0 bytes skipped in 199.72s, speed 86480 B/s - W25Q128BV 16777216 bytes written, 0 bytes skipped in 351.739s, speed 48913 B/s - S25FL256S_64K 16777216 bytes written, 0 bytes skipped in 65.659s, speed 262144 B/s sf update(for first 16MBytes), Changes before: U-Boot> sf update 0x1000000 0x0 0x1000000 - N25Q256 16777216 bytes written, 0 bytes skipped in 198.953s, speed 86480 B/s - W25Q128BV 16777216 bytes written, 0 bytes skipped in 350.90s, speed 49200 B/s - S25FL256S_64K 16777216 bytes written, 0 bytes skipped in 66.521s, speed 262144 B/s Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * sf: Update sf to support all sizes of flashesJagannadha Sutradharudu Teki2013-06-23-13/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Updated the spi_flash framework to handle all sizes of flashes using bank/extd addr reg facility The current implementation in spi_flash supports 3-byte address mode due to this up to 16Mbytes amount of flash is able to access for those flashes which has an actual size of > 16MB. As most of the flashes introduces a bank/extd address registers for accessing the flashes in 16Mbytes of banks if the flash size is > 16Mbytes, this new scheme will add the bank selection feature for performing write/erase operations on all flashes. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * sf: Read flash bank addr register at probe timeJagannadha Sutradharudu Teki2013-06-23-0/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read the flash bank addr register to get the state of bank in a perticular flash. and also bank write happens only when there is a change in bank selection from user. bank read only valid for flashes which has > 16Mbytes those are opearted in 3-byte addr mode, each bank occupies 16Mytes. Suppose if the flash has 64Mbytes size consists of 4 banks like bank0, bank1, bank2 and bank3. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * sf: Discover the bank addr commandsJagannadha Sutradharudu Teki2013-06-23-0/+35
| | | | | | | | | | | | | | | | | | | | Bank/Extended addr commands are specific to particular flash vendor so discover them based on the idocode0. Assign the discovered bank commands to spi_flash members so-that the bank read/write will use their specific operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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