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path: root/drivers/mtd/spi/spi_flash_internal.h
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* sf: probe: Add support for SST_WPJagannadha Sutradharudu Teki2013-10-07-0/+5
| | | | | | | | | | Most of the SST flashes needs to write up using SST_WP, AAI Word Program, so added a flag param on spi_flash_params table. SST flashes, which supports SST_WP need to use a WP write sst_write_wp instead of common flash write. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2013-06-24-4/+35
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| * sf: Unify spi_flash write codeJagannadha Sutradharudu Teki2013-06-23-0/+10
| | | | | | | | | | | | | | Move common flash write code into spi_flash_write_common(). Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
| * sf: Add flag status register polling supportJagannadha Sutradharudu Teki2013-06-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Flag status register polling is required for micron 512Mb flash devices onwards, for performing erase/program operations. Like polling for WIP(Write-In-Progress) bit in read status register, spi_flash_cmd_wait_ready will poll for PEC(Program-Erase-Control) bit in flag status register. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * sf: Remove spi_flash_cmd_poll_bit()Jagannadha Sutradharudu Teki2013-06-23-4/+0
| | | | | | | | | | | | | | | | | | There is no other call other than spi_flash_cmd_wait_ready(), hence removed spi_flash_cmd_poll_bit and use the poll status code spi_flash_cmd_wait_ready() itself. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * sf: Add bank addr code in CONFIG_SPI_FLASH_BARJagannadha Sutradharudu Teki2013-06-23-4/+8
| | | | | | | | | | | | | | | | | | | | | | Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the size for existing boards which has < 16Mbytes SPI flashes. It's upto user which has provision to use the bank addr code for flashes which has > 16Mbytes. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * sf: Read flash bank addr register at probe timeJagannadha Sutradharudu Teki2013-06-23-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read the flash bank addr register to get the state of bank in a perticular flash. and also bank write happens only when there is a change in bank selection from user. bank read only valid for flashes which has > 16Mbytes those are opearted in 3-byte addr mode, each bank occupies 16Mytes. Suppose if the flash has 64Mbytes size consists of 4 banks like bank0, bank1, bank2 and bank3. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * sf: Discover the bank addr commandsJagannadha Sutradharudu Teki2013-06-23-0/+14
| | | | | | | | | | | | | | | | | | | | Bank/Extended addr commands are specific to particular flash vendor so discover them based on the idocode0. Assign the discovered bank commands to spi_flash members so-that the bank read/write will use their specific operations. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * sf: Add bank address register writing supportJagannadha Sutradharudu Teki2013-06-23-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch provides support to program a flash bank address register. extended/bank address register contains an information to access the 4th byte addressing in 3-byte address mode. reff' the spec for more details about bank addr register in Page-63, Table 8.16 http://www.spansion.com/Support/Datasheets/S25FL128S_256S_00.pdf Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | SF: Add driver for Gigabyte device GD25LQ and GD25Q64BRajeshwari Shinde2013-05-20-0/+1
|/ | | | | | | | | | This patch adds driver for the gigabyte devices GD25LQ and GD25Q64B required for Snow Board. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@ti.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* sf: unify status register writing (and thus block unlocking)Mike Frysinger2012-03-04-0/+3
| | | | | | | | The only two drivers to write the status register do it in the same way, so unify the implementations. This also makes the block unlock logic the same. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify erase commandsMike Frysinger2012-03-04-2/+5
| | | | | | | | Analysis of the flash drivers shows that they all use 0x20 if the erase size is 4KiB, or 0xd8 if it's larger. So with this info in hand, we can unify all the erase functionality in one place. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: drop unused/duplicate command definesMike Frysinger2012-07-20-1/+1
| | | | | | | In an effort to unify the spi flash drivers further, drop all the unused and/or duplicate command defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify write disable commandsMike Frysinger2011-07-26-0/+9
| | | | | | | | | Every spi flash uses the same write disable command, so unify this in the common code. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Fixed commit message. Signed-off-by: Wolfgang Denk <wd@denx.de>
* sf: unify write funcsMike Frysinger2011-07-26-0/+8
| | | | | | | Once we add a new page_size field for write lengths, we can unify the write methods for most of the spi flash drivers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify write enable commandsMike Frysinger2011-07-26-0/+8
| | | | | | | Every spi flash uses the same write enable command, so unify this in the common code. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: add struct spi_flash.sector_size parameterRichard Retanubun2011-04-12-1/+1
| | | | | | | | | | | | | | | This patch adds a new member to struct spi_flash (u16 sector_size) and updates the spi flash drivers to start populating it. This parameter can be used by spi flash commands that need to round up units of operation to the flash's sector_size. Having this number in one place also allows duplicated code to be further collapsed into one common location (such as erase parameter and the detected message). Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify read functionsMike Frysinger2011-04-11-0/+3
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify erase functionsMike Frysinger2011-04-11-0/+5
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: unify status polling for ready bitMike Frysinger2011-04-11-0/+15
| | | | | | | | All of the spi flash drivers implement the status register polling for detecting the device ready state, so unify them all in a new helper function -- spi_flash_wait_ready. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: new driver for EON devicesChong Huang2010-12-17-0/+1
| | | | | | Signed-off-by: Chong Huang <chuang@ucrobotics.com> Signed-off-by: Haitao Zhang <minipanda@linuxrobot.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: ramtron: new spi fram driverReinhard Meyer2010-11-10-0/+1
| | | | | | | Supports most types that support Read-Id and the FM25H20. Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: new driver for Winbond W25X16/32/64 devicesJason McMullan2009-11-22-0/+1
| | | | | Signed-off-by: Jason McMullan <jason.mcmullan@gmail.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: new Macronix MX25xx SPI flash driverPrafulla Wadaskar2009-06-12-0/+1
| | | | | | | | | Added macronix SF driver for MTD framework MX25L12805D is supported and tested TBD: sector erase implementation, other deivces support Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* sf: set common timeouts in seconds, not millisecondsMike Frysinger2009-04-02-3/+6
| | | | | | | | | | | Since timeouts are only hit when there is a problem in the system, we don't want to prematurely timeout on a functioning setup. Thus having low timeouts (in milliseconds) doesn't gain us anything in the production case, but rather increases likely hood of causing problems where none otherwise exist. Signed-off-by: Mike Frysinger <vapier@gentoo.org> CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* sf: add driver for SST flashesMike Frysinger2009-04-02-0/+1
| | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-3/+3
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* mtd: SPI Flash: Support the STMicro FlashTsiChung Liew2008-09-09-0/+1
| | | | | | | | Add MTD SPI Flash support for M25P16, M25P20, M25P32, M25P40, M25P64, M25P80, M25P128. Signed-off-by: Jason McMullan <mcmullan@netapp.com> Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
* SPI Flash subsystemHaavard Skinnemoen2008-06-03-0/+45
This adds a new SPI flash subsystem. Currently, only AT45 DataFlash in non-power-of-two mode is supported, but some preliminary support for other flash types is in place as well. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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