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* kconfig: switch to single .config configurationMasahiro Yamada2015-02-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When Kconfig for U-boot was examined, one of the biggest issues was how to support multiple images (Normal, SPL, TPL). There were actually two options, "single .config" and "multiple .config". After some discussions and thought experiments, I chose the latter, i.e. to create ".config", "spl/.config", "tpl/.config" for Normal, SPL, TPL, respectively. It is true that the "multiple .config" strategy provided us the maximum flexibility and helped to avoid duplicating CONFIGs among Normal, SPL, TPL, but I have noticed some fatal problems: [1] It is impossible to share CONFIG options across the images. If you change the configuration of Main image, you often have to adjust some SPL configurations correspondingly. Currently, we cannot handle the dependencies between them. It means one of the biggest advantages of Kconfig is lost. [2] It is too painful to change both ".config" and "spl/.config". Sunxi guys started to work around this problem by creating a new configuration target. Commit cbdd9a9737cc (sunxi: kconfig: Add %_felconfig rule to enable FEL build of sunxi platforms.) added "make *_felconfig" to enable CONFIG_SPL_FEL on both images. Changing the configuration of multiple images in one command is a generic demand. The current implementation cannot propose any good solution about this. [3] Kconfig files are getting ugly and difficult to understand. Commit b724bd7d6349 (dm: Kconfig: Move CONFIG_SYS_MALLOC_F_LEN to Kconfig) has sprinkled "if !SPL_BUILD" over the Kconfig files. [4] The build system got more complicated than it should be. To adjust Linux-originated Kconfig to U-Boot, the helper script "scripts/multiconfig.sh" was introduced. Writing a complicated text processor is a shell script sometimes caused problems. Now I believe the "single .config" will serve us better. With it, all the problems above would go away. Instead, we will have to add some CONFIG_SPL_* (and CONFIG_TPL_*) options such as CONFIG_SPL_DM, but we will not have much. Anyway, this is what we do now in scripts/Makefile.spl. I admit my mistake with my apology and this commit switches to the single .config configuration. It is not so difficult to do that: - Remove unnecessary processings from scripts/multiconfig.sh This file will remain for a while to support the current defconfig format. It will be removed after more cleanups are done. - Adjust some makefiles and Kconfigs - Add some entries to include/config_uncmd_spl.h and the new file scripts/Makefile.uncmd_spl. Some CONFIG options that are not supported on SPL must be disabled because one .config is shared between SPL and U-Boot proper going forward. I know this is not a beautiful solution and I think we can do better, but let's see how much we will have to describe them. - update doc/README.kconfig More cleaning up patches will follow this. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* mtd, omap: fix case NAND_OMAP_GPMC_PREFETCH not definedEgli, Samuel2015-02-16-1/+4
| | | | | | | | | | | | | | | | The patch c316f577b4b72d1a1aeb559e9b3fad20808f1ffd breaks siemens boards because prefetch mode is not enabled. I assume it breaks other boards as well that don't use prefetch. This patch sets read_buf to nand_read_buf if NAND_OMAP_GPMC_PREFETCH is not defined. Signed-off-by: Samuel Egli <samuel.egli@siemens.com> CC: Daniel Mack <zonque@gmail.com> CC: Guido Martínez <guido@vanguardiasur.com.ar> CC: Tom Rini <trini@ti.com> CC: Heiko Schocher <hs@denx.de>
* mtd: atmel_nand: according to pmecc version to perform 0xff page correctionWu, Josh2015-02-07-0/+29
| | | | | | | | | | | | As the PMECC hardware has different version. In SAMA5D4 chip, the PMECC ip can generate 0xff pmecc ECC value for all 0xff sector. According to this, add PMECC version check, if it's SAMA5D4 then we always let PMECC hardware to correct it. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
* dm: tegra: nand: Remove use of fdtdec GPIO supportSimon Glass2015-01-29-5/+4
| | | | | | These functions are going away, so use the new uclass support instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: ppc4xx: remove PPChameleonEVB, CATcenter boardsMasahiro Yamada2015-01-23-5/+0
| | | | | | | | | | | These boards are still non-generic boards. It is a good thing that we can drop board-specific hack code from drivers/mtd/nand/nand_base.c Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Andrea "llandre" Marson <andrea.marson@dave-tech.it>
* mtd: OMAP: Enable GPMC prefetch modeDaniel Mack2015-01-13-2/+112
| | | | | | | | | | | | | | | | | | | | | | | | | Enable GPMC's prefetch feature for NAND access. This speeds up NAND read access a lot by pre-fetching contents in the background and reading them through the FIFO address. The current implementation has two limitations: a) it only works in 8-bit mode b) it only supports read access Both is easily fixable by someone who has hardware to implement it. Note that U-Boot code uses non word-aligned buffers to read data into, and request read lengths that are not multiples of 4, so both partial buffers (head and tail) have to be addressed. Tested on AM335x hardware. Tested-by: Guido Martínez <guido@vanguardiasur.com.ar> Reviewed-by: Guido Martínez <guido@vanguardiasur.com.ar> Signed-off-by: Daniel Mack <zonque@gmail.com> [trini: Make apply again, use 'cs' fix pointed out by Guido] Signed-off-by: Tom Rini <trini@ti.com>
* mtd: nand: do not scan BBT after scrubMasahiro Yamada2015-01-09-8/+3
| | | | | | | | | | | | | | | | | Currently, "nand scrub" runs chip->scan_bbt at the end of nand_erase_opts() even if NAND_SKIP_BBTSCAN flag is set. It violates the intention of NAND_SKIP_BBTSCAN. Move NAND_SKIP_BBTSCAN flag check to nand_block_checkbad() so that chip->scan_bbt() is never run if NAND_SKIP_BBTSCAN is set. Also, unset NAND_BBT_SCANNED flag instead of running chip->scan_bbt() right after scrub. We can be lazier here because the BBT is scanned at the next call of nand_block_checkbad(). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com>
* mtd: nand: Mark the BBT as scanned prior to calling scan_bbt againMasahiro Yamada2015-01-09-1/+1
| | | | | | | | | | | | | | | | | | | | | Commit 35c204d8a9d0 (nand: reinstate lazy bad block scanning) broke NAND_BBT_USE_FLASH feature. Its git-log claimed that it reinstated the change as by commit fb49454b1b6c ("nand: reinstate lazy bad block scanning"), but it moved "chip->options |= NAND_BBT_SCANNED" below "chip->scan_bbt(mtd);". It causes recursion if scan_bbt does not find a flash based BBT and tries to write one, and the attempt to erase the BBT area causes a bad block check. Reinstate commit ff49ea8977b5 (NAND: Mark the BBT as scanned prior to calling scan_bbt.). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Rostislav Lisovy <lisovy@merica.cz> Cc: Heiko Schocher <hs@denx.de> Cc: Scott Wood <scottwood@freescale.com>
* mtd: nand: revive "nand scrub" commandMasahiro Yamada2015-01-09-1/+1
| | | | | | | | | Since commit ff94bc40af34 (mtd, ubi, ubifs: resync with Linux-3.14), the "nand scrub" command has not been working. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Heiko Schocher <hs@denx.de>
* mtd: nand: omap_gpmc: fix error handlingGuido Martínez2015-01-05-1/+2
| | | | | | | | | | | | "err" was an unsigned variable, causing negative error codes to turn into positive values, which are interpreted as an amount of succesfully corrected bitflips (and thus not an error). In particular, this resulted in that if the elm reports uncorrectable errors (-EBADMSG), the MTD layer (and UBI) falsely succeeded. Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar> Reviewed-by: Stefan Roese <sr@denx.de>
* driver/mtd: Fix IFC compilation warningsJaiprakash Singh2014-12-11-1/+1
| | | | | | | 'eccstat' array elements might be used uninitialized Signed-off-by: Jaiprakash Singh <b44839@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* arm: ls102xa: Add NAND boot support for LS1021AQDS boardAlison Wang2014-12-11-0/+10
| | | | | | | | | | | This patch adds NAND boot support for LS1021AQDS board. SPL framework is used. PBL initialize the internal RAM and copy SPL to it, then SPL initialize DDR using SPD and copy u-boot from NAND flash to DDR, finally SPL transfer control to u-boot. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* mtd: nand: omap_gpmc: Always use ready/busy pinStefan Roese2014-12-04-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions to detect the state of the ready / busy signal is already available but only used in the SPL case. Lets use it always, also for the main U-Boot. As all boards should have this HW connection. Testing on Siemens Draco (am335x) showed a small perfomance gain by using this ready pin to detect the NAND chip state. Here the values tested on Draco with Hynix 4GBit NAND: Without NAND ready pin: U-Boot# time nand read 80400000 0 400000 NAND read: device 0 offset 0x0, size 0x400000 4194304 bytes read: OK time: 2.947 seconds, 2947 ticks With NAND ready pin: U-Boot# time nand read 80400000 0 400000 NAND read: device 0 offset 0x0, size 0x400000 4194304 bytes read: OK time: 2.795 seconds, 2795 ticks So an increase of approx. 5%. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Roger Meier <r.meier@siemens.com> Cc: Samuel Egli <samuel.egli@siemens.com>
* mtd: nand: s3c: Unify the register definition and namingMarek Vasut2014-11-26-19/+19
| | | | | | | | | | | | | | Merge struct s3c2410_nand and struct s3c2440_nand into one unified struct s3c24x0_nand. While at it, fix up and rename the functions to retrieve the NAND base address and fix up the s3c NAND driver to reflect this change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Vladimir Zapolskiy <vz@mleia.com>
* mtd/nand/vf610_nfc: Disable subpage writesSanchayan Maity2014-11-26-0/+3
| | | | | | | | | | | | This patch disables subpage writes for vf610_nfc nand driver. This is required, as without this fix, writing unaligned u-boot images with DFU results in a hang. Trying to write unalgined binary images also results in a hang, without disabling subpage writes. Patch has been tested on a Colibri VF61 module. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
* mtd: denali: set some registers after nand_scan_ident()Masahiro Yamada2014-11-26-0/+11
| | | | | | | | | | | | | | | | | Some but not all of implementations of the Denali NAND controller have hardware circuits to detect the device parameters such as page_size, erase_size, etc. Even on those SoCs with such hardware supported, the hardware is known to detect wrong parameters for some nasty (almost buggy) NAND devices. The device parameters detected during nand_scan_ident() are more trustworthy. This commit sets some hardware registers to mtd->pagesize, mtd->oobsize, etc. in the code between nand_scan_ident() and nand_scan_tail(). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com>
* mtd: denali: use CONFIG_SYS_NAND_SELF_INITMasahiro Yamada2014-11-26-40/+93
| | | | | | | | | | | | | | | | Some variants of the Denali NAND controller need some registers set up based on the device information that has been detected during nand_scan_ident(). CONFIG_SYS_NAND_SELF_INIT has to be defined to insert code between nand_scan_ident() and nand_scan_tail(). It is also helpful to reduce the difference between this driver and its Linux counterpart because this driver was ported from Linux. Moreover, doc/README.nand recommends to use CONFIG_SYS_NAND_SELF_INIT. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com>
* nand: reinstate lazy bad block scanningRostislav Lisovy2014-11-26-3/+7
| | | | | | | | | | | | | | | Commit ff94bc40af3481d47546595ba73c136de6af6929 ("mtd, ubi, ubifs: resync with Linux-3.14") accidentally reverted part of the commit 13f0fd94e3cae6f8a0d9fba5d367e311edc8ebde ("NAND: Scan bad blocks lazily."). Reinstate the change as by commit fb49454b1b6c7c6e238ac3c0b1e302e73eb1a1ea ("nand: reinstate lazy bad block scanning") Signed-off-by: Rostislav Lisovy <lisovy@merica.cz> Acked-by: Heiko Schocher <hs@denx.de>
* linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada2014-11-23-1/+1
| | | | | | | | | | | | | | | | | | | | U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com>
* mtd: atmel_nand: runtime to build gf table for pmeccJosh Wu2014-11-17-1/+78
| | | | | | | | | | | | | | | As in SAMA5D4 SoC, the gf table in ROM code can not be seen. So, when we try to use PMECC, we need to build it when do initialization. Add a macro NO_GALOIS_TABLE_IN_ROM in soc header file. If it is defined we will build gf table runtime. The PMECC use the BCH algorithm, so based on the build_gf_tables() function in lib/bch.c, we can build the Galois Field lookup table. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* spl, mtd, nand, atmel_nand: invert device ready pin logicHeiko Schocher2014-11-17-3/+3
| | | | | | | | | | | device ready pin is signalling that the device is ready on state 1 not on 0. Simmiliar as it is in drivers/mtd/nand/nand_spl_simple.c Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* spl, nand, atmel_nand: add erase one block functionHeiko Schocher2014-11-17-0/+33
| | | | | | | | | | | erase one nand block in spl code. keep it simple, as size matters This is used on the upcoming taurus spl support. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* mtd: atmel_nand: add missing includeHeiko Schocher2014-11-17-0/+1
| | | | | | | | | | | using this driver in SPL code with CONFIG_SPL_NAND_ECC configured leads in an compileerror. Fix this. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> [fix subject] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2014-11-05-2/+7
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| * mtd: nand: mxs: Add ECC geometry for 2048b/112b NANDMarek Vasut2014-10-30-2/+7
| | | | | | | | | | | | | | Add ECC geometry for NAND which has 2048b pagesize and 112b OOB size. This is for example Macronix MX30LF2G28AB chip. Signed-off-by: Marek Vasut <marex@denx.de>
* | omap_gpmc: fix warnigs with W=1Jeroen Hofstee2014-10-25-18/+18
| | | | | | | | | | | | | | | | - make omap_spl_dev_ready static - make omap_reverse_list static, move to under CONFIG_NAND_OMAP_ELM Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Signed-off-by: Tom Rini <trini@ti.com>
* | arm: marvell: Move arch/kirkwood.h to arch/soc.hStefan Roese2014-10-23-1/+1
|/ | | | | | | | | This move makes is possible to use this header not only from kirkwood platforms but from all Marvell mvebu platforms. Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-10-11-2/+10
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| * mtd: denali: support NAND_CMD_RNDOUT commandMasahiro Yamada2014-10-09-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | The function nand_flash_detect_ext_param_page() requires NAND_CMD_RNDOUT command supported. It is necessary to detect some types of ONFi-compliant devices. Without it, the error message "unsupported command received 0x5" is shown. Let's support this command on the Denali NAND controller driver. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Chin Liang See <clsee@altera.com>
| * mtd: denali: fix NAND_CMD_PARAM commandMasahiro Yamada2014-10-09-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND_CMD_PARAM (0xEC) command is not working on the Denali NAND controller driver. Unlike NAND_CMD_READID (0x90), when the NAND_CMD_PARAM command is followed by an address cycle, the target device goes busy. (R/B# is deasserted) Wait until the parameter data are ready. In addition, unnecessary clear_interrupts() should be removed. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Chin Liang See <clsee@altera.com>
* | Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD2014-10-08-0/+725
|\ \ | |/ |/| | | | | | | | | The single file conflict below is actually trivial. Conflicts: board/boundary/nitrogen6x/nitrogen6x.c
| * Merge branch 'master' of git://git.denx.de/u-boot-armStefano Babic2014-09-22-13/+16
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| * | mtd: nand: add Freescale vf610_nfc driverStefan Agner2014-09-16-0/+725
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds initial support for Freescale NFC (NAND Flash Controller) found in ARM Vybrid SoC's, Power Architecture MPC5125 and others. The driver is called vf610_nfc since this is the first supported and tested hardware platform supported by the driver. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Bill Pringlemeir <bpringlemeir@nbsps.com>
* | | mtd: denali: add Denali NAND driver for SPLMasahiro Yamada2014-10-05-0/+242
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPL-mode driver for Denali(Cadence) NAND Flash Memory Controller IP. This driver requires two CONFIG macros: - CONFIG_SPL_NAND_DENALI Define to enable this driver. - CONFIG_SYS_NAND_BAD_BLOCK_POS Specify bad block mark position in the oob space. Typically 0. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Chin Liang See <clsee@altera.com> Cc: Scott Wood <scottwood@freescale.com>
* | | mtd: denali: add Denali controller configs to KconfigMasahiro Yamada2014-10-05-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 3eb3e72a3f66 (nand/denali: Adding Denali NAND driver support) introduced some new options, and some of them were documented by commit f9860cf081ef (nand/denali: Document CONFIG symbols). This commit allows users to enable/disable them via Kconfig with more detailed help docs. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Chin Liang See <clsee@altera.com> Cc: Scott Wood <scottwood@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2014-09-26-15/+14
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| * | | driver/mtd: Use generic timer API for FSL IFC, eLBCPrabhakar Kushwaha2014-09-25-15/+14
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale's flash control driver is using architecture specific timer API i.e. usec2ticks Replace usec2ticks with get_timer() (generic timer API) Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | | nand/denali: Adding Denali NAND driver supportChin Liang See2014-09-25-0/+1673
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To add the Denali NAND driver support into U-Boot. This driver is leveraged from Linux with commit ID fdbad98dff8007f2b8bee6698b5d25ebba0471c9. For Denali controller 64 variance, you need to declare macro CONFIG_SYS_NAND_DENALI_64BIT. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | mtd: nand: Fix length bug in ioread16_rep() and iowrite16_rep()Stefan Roese2014-09-25-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ioread16_rep() and iowrite16_rep() implementations are U-Boot specific and have been introduced with the Linux MTD v3.14 sync. While introducing these functions, the length for the loop has been miscalculated. The ">> 1" is already present in the caller. So lets remove it in the function. Tested on omap3_ha. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Scott Wood <scottwood@freescale.com> Acked-by: Heiko Schocher <hs@denx.de>
* | | mtd: nand: am335x: Fix 'bit-flip' errors in SPLRostislav Lisovy2014-09-25-4/+8
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP GPMC driver used with some NAND Flash devices (e.g. Spansion S34ML08G1) causes that U-boot shows hundreds of 'nand: bit-flip corrected' error messages. Possible cause was discussed in the mailinglist thread: http://lists.denx.de/pipermail/u-boot/2014-April/177508.html The issue was partially fixed with the cc81a5291910d7a.git however this has to be done to fix the SPL. The original author of the code is Belisko Marek <marek.belisko@gmail.com> Signed-off-by: Rostislav Lisovy <lisovy@merica.cz>
* | mtd: atmel_nand: Disable subpage NAND write when using Atmel PMECCBoris BREZILLON2014-09-19-0/+1
| | | | | | | | | | | | | | | | | | | | | | Disable subpage write when using PMECC to prevent buggy partial page write. This fix has been taken from linux sources (see commit 90445ff6241e2a13445310803e2efa606c61f276) Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | mtd: atmel-nand: use pmecc_readl(b)/pmecc_writel to access the pmecc registerWu, Josh2014-09-19-10/+14
| | | | | | | | | | | | | | | | | | | | We defined the macro pmecc_readl(b)/pmecc_writel for pmecc register access. But in the driver we also use the readl(b)/writel. To keep consistent, this patch make all use pmecc_readl(b)/pmecc_writel. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | mtd: nand: davinci_nand: update write_page function for keystone RBLKhoronzhuk, Ivan2014-09-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | After mtd was synced with Linux 3.14 (ff94bc40af3481d47546595ba73c136de6af6929) the number of parameters for write_page function of nand_chip was changed. The additional two var were needed for subpage write. As keystone has no supbage write they are not needed. So correct only function definition by upgrading it's parameter list. That helps to get ritd of compilation warning. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
* | kbuild: force to define __UBOOT__ in all the C sourcesMasahiro Yamada2014-09-16-3/+0
|/ | | | | | | | | | | | | | | | | | | | | | | U-Boot has imported various source files from other projects, mostly Linux. Something like #ifdef __UBOOT__ [ modification for U-Boot ] #else [ original code ] #endif is an often used strategy for clarification of adjusted parts, that is, easier re-sync in future. Instead of defining __UBOOT__ in each source file, passing it from the top Makefile would be easier. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* mtd: nand: omap_gpmc: Fix 'bit-flip' errorsRostislav Lisovy2014-09-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | OMAP GPMC driver used with some NAND Flash devices (e.g. Spansion S34ML08G1) causes that U-boot shows hundreds of 'nand: bit-flip corrected' error messages. Possible cause was discussed in the mailinglist thread: http://lists.denx.de/pipermail/u-boot/2014-April/177508.html Quote (Author: Pekon Gupta <pekon@ti.com>): "The issue is mainly due to a NAND protocol violation in the omap driver since the Random Data Output command (05h-E0h) expects to see only the column address that should be addressed within the already loaded read page into the read buffer. Only 2 address cycles with ALE active should be provided between the 05h and E0h commands. The Page read command expects the full address footprint (2bytes for column address + 3bytes for row address), but once the page is loaded into the read buffer, Random Data Output should be used with only 2bytes for column address." This patch combines the solution proposed in the mailinglist and the patch provided by the Spansion company (GPLv2 code, source: http://www.spansion.com/Support/Software/u-boot-psp-04.04.00.01-NAND.zip) Signed-off-by: Rostislav Lisovy <lisovy@merica.cz>
* mtd: nand: omap_gpmc: Enable multiple NAND flash devicesRostislav Lisovy2014-09-04-22/+20
| | | | | | | | | | | Since the CS of a device connected to the GPMC was stored in the global variable, it was not possible to use multiple devices. In this patch the CS is stored per device in its 'struct omap_nand_info'. This makes it possible to use up to 'GPMC_MAX_CS' NAND Flash devices connected to U-boot. Signed-off-by: Rostislav Lisovy <lisovy@merica.cz>
* mtd: nand: davinci_nand: correct keystone RBL layout definitionKhoronzhuk, Ivan2014-09-04-1/+1
| | | | | | | | In case when 4K page keystone RBL layout is used the compilation error is appeared. That's because the #ifdef has to be placed under struct name. This patch correct it. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
* arm/kirkwood/nand: allow forced disabling for subpage writesHolger Brunck2014-08-30-0/+3
| | | | | | | | | | Make it configurable to disable subpage writes like the DaVinci NAND driver already does. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Scott Wood <scottwood@freescale.com>
* mtd,ubi,ubifs: sync with linux v3.15Heiko Schocher2014-08-25-33/+144
| | | | | | | | | | | | | | snyc with linux v3.15: commit 1860e379875dfe7271c649058aeddffe5afd9d0d Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Jun 8 11:19:54 2014 -0700 Linux 3.15 Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Scott Wood <scottwood@freescale.com> Cc: Tom Rini <trini@ti.com>
* mtd, ubi, ubifs: resync with Linux-3.14Heiko Schocher2014-08-25-778/+1680
| | | | | | | | | | | | | | | | | | | | resync ubi subsystem with linux: commit 455c6fdbd219161bd09b1165f11699d6d73de11c Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Mar 30 20:40:15 2014 -0700 Linux 3.14 A nice side effect of this, is we introduce UBI Fastmap support to U-Boot. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Cc: Marek Vasut <marex@denx.de> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Scott Wood <scottwood@freescale.com> Cc: Joerg Krause <jkrause@posteo.de>
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