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* nand: Freescale Integrated Flash Controller NAND supportDipen Dudhat2011-09-29-0/+851
| | | | | | | | | | | | | | | Add NAND support (including spl) on IFC, such as is found on the p1010. Note that using hardware ECC on IFC with small-page NAND (which is what comes on the p1010rdb reference board) means there will be insufficient OOB space for JFFS2, since IFC does not support 1-bit ECC. UBI should work, as it does not use OOB for anything but ECC. When hardware ECC is not enabled in CSOR, software ECC is now used. Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> [scottwood@freescale.com: ECC rework and misc fixes] Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: Add 16bit NAND support for the NDFCAlex Waterman2011-07-01-4/+29
| | | | | | | | | | | | | | | | | | | This patch adds support for 16 bit NAND devices attached to the NDFC on ppc4xx processors. Two config entries were added: CONFIG_SYS_NDFC_16 - Setting this tells the NDFC that a 16 bit device is attached. CONFIG_SYS_NDFC_EBC0_CFG - This is for the External Bus Controller configuration register. Also, a new ndfc_read_byte() function was added which does not first convert the data to little endian. The NAND SPL was also modified to do 16bit bad block testing when a 16 bit chip is being used. Signed-off-by: Alex Waterman <awaterman@dawning.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: drop trailing all-0xff pages if requestedBen Gardiner2011-07-01-3/+37
| | | | | | | | | | | | | | | | | | | | Add a flag to nand_read_skip_bad() such that if true, any trailing pages in an eraseblock whose contents are entirely 0xff will be dropped. The implementation is via a new drop_ffs() function which is based on the function of the same name from the ubiformat utility by Artem Bityutskiy. This is as-per the reccomendations of the UBI FAQ [1] [1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Artem Bityutskiy <dedekind1@gmail.com> Acked-by: Detlev Zundel <dzu@denx.de> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: treat WITH_YAFFS_OOB as a modeBen Gardiner2011-07-01-0/+3
| | | | | | | | | | | | | When specified in the flags argument of nand_write, WITH_YAFFS_OOB causes an operation which is mutually exclusive with the 'usual' way of writing. Add a check that client code does not specify WITH_YAFFS_OOB along with any other flags and add a comment indicating that the WITH_YAFFS_OOB flag should not be mixed with other flags. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_util: convert nand_write_skip_bad() to flagsBen Gardiner2011-07-01-4/+4
| | | | | | | | | | | | | | | | | | | | | | In a future commit the behaviour of nand_write_skip_bad() will be further extended. Convert the only flag currently passed to the nand_write_ skip_bad() function to a bitfield of only one allocated member. This should avoid an explosion of int's at the end of the parameter list or the ambiguous calls like nand_write_skip_bad(info, offset, len, buf, 0, 1, 1); nand_write_skip_bad(info, offset, len, buf, 0, 1, 0); Instead there will be: nand_write_skip_bad(info, offset, len, buf, WITH_YAFFS_OOB | WITH_OTHER); Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Acked-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand_base: trivial: fix comment read/write commentBen Gardiner2011-07-01-1/+1
| | | | | | | | Replace an incorrect 'read' with 'write' in a comment. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Acked-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: rearrange ONFI revision checking, add ONFI 2.3Florian Fainelli2011-04-15-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch sync with Brian's patch on Linux in nand_flash_detect_onfi() commit b7b1a29d94c17e4341856381bccb4d17495bea60 Author: Brian Norris <computersforpeace@gmail.com> Date: Sun Dec 12 00:23:33 2010 -0800 mtd: nand: rearrange ONFI revision checking, add ONFI 2.3 In checking for the ONFI revision, the first conditional (for checking "unsupported" ONFI) seems unnecessary. All ONFI revisions should be backwards-compatible; even if this is not the case on some newer ONFI revision, it should simply fail the second version-checking if-else block (i.e., the bit-fields for 1.0, 2.0, etc. would not be set to 1). Thus, we move our "unsupported" condition after having checked each bit field. Also, it's simple enough to add a condition for ONFI revision 2.3. Note that this does *NOT* mean we handle all new features of ONFI versions above 1.0. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Florian Fainelli <florian@openwrt.org>
* NAND: Fix integer overflow in ONFI detection of chips >= 4GiBFlorian Fainelli2011-04-15-1/+1
| | | | | | | | | | | | | | This patch sync with David's patch on Linux in nand_flash_detect_onfi() commit 4ccb3b4497ce01fab4933704fe21581e30fda1a5 Author: David Woodhouse <David.Woodhouse@intel.com> Date: Fri Dec 3 16:36:34 2010 +0000 mtd: nand: Fix integer overflow in ONFI detection of chips >= 4GiB Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Florian Fainelli <florian@openwrt.org>
* atmel_nand: don't require CONFIG_SYS_NAND_ENABLE_PINmichael2011-04-01-0/+2
| | | | | | | | | | | | If NCE is hooked up to NCS3, we don't need to (and can't) explicitly set the state of the NCE pin. Instead, the controller asserts it automatically as part of a command/data access. Only "CE don't care"-type NAND chips can be used in this manner. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
* NAND: add support for reading ONFI page tableFlorian Fainelli2011-04-01-49/+144
| | | | | | | | | | | | This patch adds support for reading an ONFI page parameter from a NAND device supporting it. If this is the case, struct nand_chip onfi_version member contains the supported ONFI version, 0 otherwise. This allows NAND drivers past nand_scan_ident to set the best timings for the NAND chip. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: add more watchdog resetsScott Wood2011-04-01-0/+8
| | | | | | | Poke the watchdog in a variety of looping constructs, which could take a long time to complete. Signed-off-by: Scott Wood <scottwood@freescale.com>
* Minor Coding Style Cleanup.Wolfgang Denk2011-02-02-19/+19
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* mxc_nand: add support for i.MX35 processorStefano Babic2011-02-02-3/+3
| | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* mtd: nand: Allow caller to pass alternative ID table to nand_scan_ident()Lei Wen2011-01-12-15/+16
| | | | | | | | | | | | | | This patch sync with David's patch on Linux for handling nand_scan_ident. commit 5e81e88a4c140586d9212999cea683bcd66a15c6 Author: David Woodhouse <David.Woodhouse@intel.com> Date: Fri Feb 26 18:32:56 2010 +0000 mtd: nand: Allow caller to pass alternative ID table to nand_scan_ident() Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Lei Wen <leiwen@marvell.com>
* NAND: add the ability to directly write yaffs imageLei Wen2011-01-12-8/+55
| | | | | | | This patch add addition suffix to nand write to give the uboot the power to directly burn the yaffs image to nand. Signed-off-by: Lei Wen <leiwen@marvell.com>
* nand: fix bug with multiple NAND devices if CONFIG_MTD_DEVICE is defined.Alexander Holler2011-01-12-1/+1
| | | | | | The variable i has to be static, otherwise it would be always zero. Signed-off-by: Alexander Holler <holler@ahsoftware.de>
* MTD/NAND: fix nand_base.c to use get_timer() correctlyReinhard Meyer2010-12-17-6/+9
| | | | | | | | | This is part of the timer cleanup effort. In the future we only use get_timer() in its intended way to program timeout loops. reset_timer() shall not be used anymore. Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* nand: constify id/manu tablesMike Frysinger2010-12-17-5/+5
| | | | | | These id tables need not be writable. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* fsl_upm: Add MxMR/MDR synchronizationJohn Schmoller2010-12-13-0/+2
| | | | | | | | | | | | | | | | | According to Freescale reference manuals (eg section "13.4.4.2 Programming the UPMs" of the P4080 Reference Manual): "Since the result of any update to the MxMR/MDR register must be in effect before the dummy read or write to the UPM region, a write to MxMR/MDR should be followed immediately by a read of MxMR/MDR." The UPM on a custom P4080-based board did not work without performing a read of MxMR/MDR after a write. Signed-off-by: John Schmoller <jschmoller@xes-inc.com> Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fix s3c2410_nand timing default valuesDavid Müller (ELSOFT AG)2010-12-06-3/+9
| | | | | | | The attached patch fixes wrong timing default values and adds the possibility to specify board specific timing value in the board config file. Signed-off-by: David Mueller <d.mueller@elsoft.ch>
* ppc4xx/NAND: Reduce size of NAND SPL imageStefan Roese2010-11-27-2/+2
| | | | | | | | | | This is needed for the canyonlands_nand build target. Without it the resulting image won't fit into 4k. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Acked-by: Stefan Roese <sr@denx.de>
* Switch from archive libraries to partial linkingSebastien Carlier2010-11-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, weak symbols were not overridden by non-weak symbols found in archive libraries when linking with recent versions of binutils. As stated in the System V ABI, "the link editor does not extract archive members to resolve undefined weak symbols". This commit changes all Makefiles to use partial linking (ld -r) instead of creating library archives, which forces all symbols to participate in linking, allowing non-weak symbols to override weak symbols as intended. This approach is also used by Linux, from which the gmake function cmd_link_o_target (defined in config.mk and used in all Makefiles) is inspired. The name of each former library archive is preserved except for extensions which change from ".a" to ".o". This commit updates references accordingly where needed, in particular in some linker scripts. This commit reveals board configurations that exclude some features but include source files that depend these disabled features in the build, resulting in undefined symbols. Known such cases include: - disabling CMD_NET but not CMD_NFS; - enabling CONFIG_OF_LIBFDT but not CONFIG_QE. Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-samsungWolfgang Denk2010-10-29-12/+13
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| * Add generic support for samsung s3c2440C Nauman2010-10-28-12/+13
| | | | | | | | | | | | | | | | | | | | | | This patch adds generic support for the Samsung s3c2440 processor. Global s3c24x0 changes to struct members converting from upper case to lower case. Signed-off-by: Craig Nauman <cnauman@diagraph.com> Cc: kevin.morfitt@fearnside-systems.co.uk Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Replace CONFIG_RELOC_FIXUP_WORKS by CONFIG_NEEDS_MANUAL_RELOCWolfgang Denk2010-10-29-1/+1
|/ | | | | | | | | | | By now, the majority of architectures have working relocation support, so the few remaining architectures have become exceptions. To make this more obvious, we make working relocation now the default case, and flag the remaining cases with CONFIG_NEEDS_MANUAL_RELOC. Signed-off-by: Wolfgang Denk <wd@denx.de> Tested-by: Heiko Schocher <hs@denx.de> Tested-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* davinci_nand, trivial : use symbolic ECC start commandBen Gardiner2010-10-17-1/+2
| | | | | | | | | | | The ECC calculations were started by writing 1 << 13 to the nand FCR register; that value is also defined as DAVINCI_NANDFCR_4BIT_CALC_START in emif_defs.h. This patch substitutes the macro DAVINCI_NANDFCR_4BIT_CALC_START for the magic number '1 << 13'. Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* nand: remove dead code and suspend/resumeScott Wood2010-10-11-308/+1
| | | | | | | | | | | | | | | Get rid of the several "#if 0" sections that were keeping around Linux code that isn't relevant to U-Boot. Besides cluttering the code, these sections make tracking upstream changes harder, rather than easier. It's easy to discard obviously irrelevant diff hunks that patch rejects, but it's not as easy to notice hunks that apply cleanly to the #if 0 section, but *are* relevant to U-Boot and require modification elsewhere. Also remove suspend/resume, as this is not applicable to U-Boot. Removal saves 232 bytes on powerpc. Signed-off-by: Scott Wood <scottwood@freescale.com> Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
* nand erase: .spread, .part, .chip subcommandsScott Wood2010-10-11-14/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A while back, in http://lists.denx.de/pipermail/u-boot/2009-June/054428.html, Michele De Candia posted a patch to not count bad blocks toward the requested size to be erased. This is desireable when you're passing in something like $filesize, but not when you're trying to erase a partition. Thus, a .spread subcommand (named for consistency with http://lists.denx.de/pipermail/u-boot/2010-August/075163.html) is introduced to make explicit the user's desire to erase for a given amount of data, rather than to erase a specific region of the chip. While passing $filesize to "nand erase" is useful, accidentally passing something like $fliesize currently produces quite unpleasant results, as the variable evaluates to nothing and U-Boot assumes that you want to erase the entire rest of the chip/partition. To improve the safety of the erase command, require the user to make explicit their intentions by using a .part or .chip subcommand. This is an incompatible user interface change, but keeping compatibility would eliminate the safety gain, and IMHO it's worth it. While touching nand_erase_opts(), make it accept 64-bit offsets and sizes, fix the percentage display when erase length is rounded up, eliminate an inconsistent warning about rounding up the erase length which only happened when the length was less than one block (rounding up for $filesize is normal operation), and add a diagnostic if there's an attempt to erase beginning at a non-block boundary. Signed-off-by: Scott Wood <scottwood@freescale.com> Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
* nand util: read/write: accept unaligned lengthScott Wood2010-10-11-37/+63
| | | | | | | | | | | | | | | | The underlying code in nand_base.c already supports non-page-aligned reads and writes, but the block-skipping wrapper code did not. With block skipping, an unaligned start address is not useful since you really want to be starting at the beginning of a partition -- or at least that's where you want to start checking for blocks to skip, but we don't (yet) support that. So we still require the start address to be aligned. An unaligned length, though, is useful for passing $filesize to the read/write command, and handling it does not complicate block skipping. Signed-off-by: Scott Wood <scottwood@freescale.com> Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
* ppc4xx: Move ppc4xx headers to powerpc include directoryStefan Roese2010-09-23-1/+1
| | | | | | | | | This patch moves some ppc4xx related headers from the common include directory (include/) to the powerpc specific one (arch/powerpc/include/asm/). This way to common include directory is not so cluttered with files. Signed-off-by: Stefan Roese <sr@denx.de>
* nand/davinci: make sure ECC calculation has really startedWolfram Sang2010-09-13-1/+14
| | | | | | | | | | Due to a register glitch (result code <4 might show up right after the start-calculation-bit was set), make sure the ECC has really started. See 1c3275b656045aff9a75bb2c9f3251af1043ebb3 in the kernel. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Sandeep Paulraj <s-paulraj@ti.com>
* mtd: nand: supress 'unknown NAND' warning if no nand is foundSteve Sakoman2010-09-08-3/+6
| | | | | | | | | | | | | | | This printk was added recently and results in ugly output on systems with no NAND: NAND: nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00, Chip ID: 0x00 0 MiB instead of: NAND: 0 MiB Signed-off-by: Steve Sakoman <steve@sakoman.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* 83xx/85xx/86xx: LBC register cleanupBecky Bruce2010-07-16-11/+7
| | | | | | | | | | | | | | | | | | | | | Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2010-07-14-8/+8
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| * Blackfin: bfin_nand: convert to portmux frameworkMike Frysinger2010-07-13-8/+8
| | | | | | | | | | | | | | | | Rather than bang MMRs directly, use the new portmux framework to handle the details. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Scott Wood <scottwood@freescale.com>
* | mtd: nand_plat: add simple GPIO framework DEV_READY optionMike Frysinger2010-07-08-0/+11
| | | | | | | | | | | | | | | | Make it easy to use GPIOs for the DEV_READY pin by using the common GPIO framework. Also make the NAND_PLAT_INIT() define optional. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Thomas Chou <thomas@wytron.com.tw>
* | NAND: add Toshiba TC58NVG0 identifierFlorian Fainelli2010-07-08-0/+1
| | | | | | | | | | | | | | The Toshiba TC58NVG0* parts are 128Mbytes x 8 bits 3.3V parts with the 0xD1 identifier. Add these to the list of known devices IDs. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
* | NAND: show manufacturer and device ID for unknown chipsFlorian Fainelli2010-07-08-1/+5
|/ | | | | | | | When the NAND part is not supported, it is useful to show the manufacturer and device ID to help debugging and reporting. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Blackfin: nand: drain the write buffer before returningAndrew Caldwell2010-05-26-1/+6
| | | | | | | | | | | | | The current Blackfin nand write function fills up the write buffer but returns before it has had a chance to drain. On faster systems, this isn't a problem as the operation finishes before the ECC registers are read, but on slower systems the ECC may be incomplete when the core tries to read it. So wait for the buffer to drain once we're done writing to it. Signed-off-by: Andrew Caldwell <Andrew.Caldwell@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* at91: add hwecc method for nandNikolay Petukhov2010-03-23-0/+301
| | | | | | | This is a patch to use the hardware ECC controller of the AT91SAM9260 for the AT91 nand. Taken from the kernel 2.6.33. Signed-off-by: Nikolay Petukhov <Nikolay.Petukhov@gmail.com>
* TI: Davinci: NAND Driver CleanupCyril Chemparathy2010-03-23-59/+69
| | | | | | | Modified to use IO accessor routines consistently. Eliminated volatile usage to keep checkpatch.pl happy. Signed-off-by: Cyril Chemparathy <cyril@ti.com>
* mod change 755 => 644 for multiple filesThomas Weber2010-03-21-0/+0
| | | | | | | | I executed 'find . -name "*.[chS]" -perm 755 -exec chmod 644 {} \;' Signed-off-by: Thomas Weber <swirl@gmx.li> Add some more: neither Makefile nor config.mk need execute permissions. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Prepare v2010.03-rc1v2010.03-rc1Wolfgang Denk2010-03-12-3/+1
| | | | | | Coding style cleanup, update CHANGELOG. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Nand mxc_nand add v1.1 controller supportJohn Rigby2010-01-27-71/+546
| | | | | | | | Add support for version 1.1 of the nfc nand flash controller which is on the i.mx25 soc. Signed-off-by: John Rigby <jcrigby@gmail.com> CC: Scott Wood <scottwood@freescale.com>
* SPEAr : nand driver support for SPEAr SoCsVipin KUMAR2010-01-23-0/+125
| | | | | | | | SPEAr SoCs contain an FSMC controller which can be used to interface with a range of memories eg. NAND, SRAM, NOR. Currently, this driver supports interfacing FSMC with NAND memories Signed-off-by: Vipin <vipin.kumar@st.com>
* MXC: Add large page oob layout for i.MX31 NAND controller.Magnus Lilja2010-01-19-0/+12
| | | | | | | | | | | | | Import the large page oob layout from Linux mxc_nand.c driver. The CONFIG_SYS_NAND_LARGEPAGE option is used to activate the large page oob layout. Run time detection is not supported as this moment. This has been tested on the i.MX31 PDK board with a large page NAND device. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
* mxc_nand: Update driver to work with i.MX31.Magnus Lilja2010-01-19-3/+31
| | | | | | Tested on i.MX31 Litekit. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-01-12-14/+13
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| * Davinci: NAND enable ECC even when not in NAND boot modeNick Thompson2010-01-04-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Davinci: NAND enable ECC even when not in NAND boot mode On Davinci platforms, the default NAND device is enabled (for ECC) in low level boot code when NAND boot mode is used. If booting in another mode, NAND ECC is not enabled. The driver should make sure ECC is enabled regardless of boot mode if NAND is configured in U-Boot. Signed-off-by: Nick Thompson <nick.thompson@ge.com>
| * Davinci: Configurable NAND chip selectsNick Thompson2010-01-04-14/+11
| | | | | | | | | | | | | | | | | | | | Davinci: Configurable NAND chip selects Add a CONFIG_SYS_NAND_CS setting to all davinci configs and use it to setup the NAND controller in the davinci_nand mtd driver. Signed-off-by: Nick Thompson <nick.thompson@gefanuc.com>
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