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* s3c2410: move nand driver to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-30-0/+172
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* davinci: move nand driver to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-30-0/+467
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Merge branch 'master' of git://git.denx.de/u-boot-at91Wolfgang Denk2009-03-26-0/+79
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| * at91sam9/at91cap: move nand drivers to drivers/mtd/nandJean-Christophe PLAGNIOL-VILLARD2009-03-22-0/+79
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Add wait flags to support board/chip specific delaysWolfgang Grandegger2009-03-23-9/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The NAND flash on the TQM8548_BE modules requires a short delay after running the UPM pattern like the MPC8360ERDK board does. The TQM8548_BE requires a further short delay after writing out a buffer. Normally the R/B pin should be checked, but it's not connected on the TQM8548_BE. The corresponding Linux FSL UPM driver uses similar delay points at the same locations. To manage these extra delays in a more general way, I introduced the "wait_flags" field allowing the board-specific driver to specify various types of extra delay. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Add support for TQM-specific chip select logic to FSL-UPMWolfgang Grandegger2009-03-23-1/+4
| | | | | | | | | | | | | | | | | | For the NAND chips on the TQM8548 modules, a special chip-select logic is used. It uses dedicated address lines to be set via UPM machine address register (mar). This patch adds such support to the FSL-UPM driver. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Add multi chip support to the FSL-UPM driverWolfgang Grandegger2009-03-23-8/+36
| | | | | | | | | | | | | | | | | | | | | | This patch adds support for multi-chip NAND devices to the FSL-UPM driver. The "dev_ready" callback of the "struct fsl_upm_nand" is now called with the argument "chip_nr" to allow testing the proper chip select line. The NAND support of the MPC8360ERDK is updated as well. No other boards are currently using the FSL UPM driver. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Enable multi chip support in the NAND layerWolfgang Grandegger2009-03-23-1/+7
|/ | | | | | | | | | This patch adds support for NAND_MAX_CHIPS to the MTD NAND layer. Multi-chips devices are displayed as shown: Device 0: 2x NAND 512MiB 3,3V 8-bit, sector size 128 KiB Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nomadik/nand: fix 'ecc512' discards qualifiers from pointer target typeJean-Christophe PLAGNIOL-VILLARD2009-02-22-1/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Nand driver for Nomadik SoCAlessandro Rubini2009-02-22-0/+222
| | | | | | | | | | This driver implements the ECC algorithm described in the CPU data sheet and uses the OOB layout chosen in already-released development systems (shipped with a custom-made u-boot 1.3.1). Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stnwireless.com>
* NAND: Add timeout for reset commandPeter Tyser2009-02-06-2/+17
| | | | | | | | Without the timeout present an infinite loop can occur if the NAND device is broken or not present. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: Silence warning when CONFIG_SYS_NAND_QUIET_TESTPeter Tyser2009-02-06-0/+2
| | | | | | | | | | Commit cfa460adfdefcc30d104e1a9ee44994ee349bb7b removed support for disabling the "No NAND device found!!!" warning when CONFIG_SYS_NAND_QUIET_TEST was defined. This re-adds support for silencing the warning. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: Fixed invalid pointers to static relocated chip namesValeriy Glushkov2009-02-06-0/+4
| | | | | | | | | | Dear Wolfgang, You are right, the patch was ugly. The new one seems to be better. Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Blackfin: add driver for on-chip NAND controllerMike Frysinger2009-02-02-0/+386
| | | | | | This is a port of the Linux Blackfin on-chip NFC driver to U-Boot. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* OMAP3: Add NAND supportDirk Behme2009-01-24-0/+354
| | | | | | | | Add NAND support. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Syed Mohammed Khasim <khasim@ti.com> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* nand: fixup printf modifiers to match types usedMike Frysinger2009-01-23-6/+6
| | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPSWolfgang Grandegger2009-01-23-1/+1
| | | | | | | | | | | | | | | | This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: Enable nand lock, unlock featureNishanth Menon2009-01-23-36/+43
| | | | | | | | | | | | | | | | Enable nand lock, unlock and status of lock feature. Not every device and platform requires this, hence, it is under define for CONFIG_CMD_NAND_LOCK_UNLOCK Nand unlock and status operate on block boundary instead of page boundary. Details in: http://www.micron.com/products/partdetail?part=MT29C2G24MAKLAJG-6%20IT Intial solution provided by Vikram Pandita <vikram.pandita@ti.com> Includes preliminary suggestions from Scott Wood Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: move board_nand_init to nand.hMike Frysinger2009-01-23-2/+0
| | | | | | | | | | | Rather than putting the function prototype for board_nand_init() in the one place where it gets called, put it into nand.h so that every place that also defines it gets the prototype. Otherwise, errors can go silently unnoticed such as using the wrong return value (void rather than int) when defining the function. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2008-12-30-2/+4
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| * NAND FSL elbc: Use virt_to_phys to determine which bank is in useKumar Gala2008-12-19-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | The current code that determines which bank/chipselect is used for a given NAND instance only worked for 32-bit addresses and assumed a 1:1 mapping. This breaks in 36-bit physical configs. The proper way to handle this is to use the virt_to_phys() and BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address with the the virtual address the NAND code uses. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Scott Wood <scottwood@freescale.com>
* | NAND: Mark the BBT as scanned prior to calling scan_bbt.Scott Wood2008-12-16-1/+1
|/ | | | | | | | Otherwise, recursion can occur if scan_bbt does not find a bad block table, and tries to write one, and the attempt to erase the BBT area causes a bad block check. Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: Fix misplaced return statement in nand_{read,write}_skip_bad().Scott Wood2008-11-25-6/+6
| | | | | | | | This caused the operation to be needlessly repeated if there were no bad blocks and no errors. Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: Properly create JFFS2 cleanmarkers.Scott Wood2008-10-29-19/+11
| | | | | | | | | | | As reported by Ilko Iliev <iliev@ronetix.at>, the "nand erase clean" command is currently broken, and among other things causes all blocks to be marked bad. This implements it properly using MTD_OOB_AUTO, along with some indentation fixes. Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND fsl elbc: Set FMR[ECCM] based on page size.Scott Wood2008-10-29-2/+14
| | | | | | | Hardware expects ECCM 0 for small page and ECCM 1 for large page when booting from NAND, so use those defaults. Signed-off-by: Scott Wood <scottwood@freescale.com>
* Make Freescale local bus registers available for both 83xx and 85xx.Haiying Wang2008-10-29-9/+11
| | | | | | | | | | | | | - Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it can be shared by both 83xx and 85xx - Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards files which use lbus83xx_t. - Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that 85xx can share them. Signed-off-by: Jason Jin <Jason.Jin@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: Reset chip on power-upKarl Beldan2008-10-29-0/+8
| | | | | | | | | | Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx). The first command sent is NAND_CMD_READID. Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id. Tested with an MT29F4G08AAC. Signed-off-by: Karl Beldan <karl.beldan@gmail.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: sync with 2.6.27Scott Wood2008-10-29-42/+140
| | | | | | | | | | | | | This brings the core NAND code up to date with the Linux kernel. Since there were several drivers in Linux as of the last update that are not in u-boot, I'm not bringing over new drivers that have been added since in the absence of an interested party. I did not update OneNAND since it was recently synced by Kyungmin Park, and I'm not sure exactly what the common ancestor is. Signed-off-by: Scott Wood <scottwood@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-17/+17
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Fix the NAND size overflow issue.Jason Jin2008-10-14-2/+2
| | | | | | | | | | | | | When the total size of all NAND devices exceeds 4 GiB, the size will overflow. This patch tries to fix this. Note that we still have a problem when a single NAND device is bigger than 4 GiB: then the overflow would actually happen earlier, i. e. when storing the size in nand_info[].size, as nand_info[].size is an "u_int32_t". Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* fsl_elbc_nand: ecclayout cleanupsAnton Vorontsov2008-09-12-4/+0
| | | | | | | | | | This patch deletes oobavail assignments, they're calculated by the nand core code in nand_scan_tail, plus current oobavail values are wrong for the LP NANDs. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* fsl_elbc_nand: implement support for flash-based BBTAnton Vorontsov2008-09-12-1/+34
| | | | | | | | | | | | | This patch implements support for flash-based BBT for chips working through ELBC NAND controller, so that NAND core will not have to re-scan for bad blocks on every boot. Because ELBC controller may provide HW-generated ECCs we should adjust bbt pattern and bbt version positions in the OOB free area. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* fsl_elbc_nand: fix OOB workability for large page NAND chipsAnton Vorontsov2008-09-12-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | For large page chips, nand_bbt is looking into OOB area, and checking for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be reserved for bbt means. But ELBC driver is specifying ecclayout so that oobfree area starts at offset 1, so only one byte left for the bbt purposes. This causes problems with any OOB users, namely JFFS2: after first mount JFFS2 will fill all OOBs with "erased marker", so OOBs will contain: OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff And on the next boot, NAND core will rescan for bad blocks, then will see "0xff 0x19" pattern, and will mark all blocks as bad ones. To fix the issue we should implement our own bad block pattern: just one byte at OOB start. Though, this will work only for x8 chips. For x16 chips two bytes must be checked. Since ELBC driver does not support x16 NANDs (yet), we're safe for now. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: add NAND driver for S3C64XXGuennadi Liakhovetski2008-08-31-0/+320
| | | | | | Based on the original S3C64XX NAND driver by Samsung for U-Boot 1.1.6. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
* Coding Style cleanup, update CHANGELOGWolfgang Denk2008-08-14-55/+55
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* drivers/mtd/nand: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-08-13-35/+8
| | | | | | rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* NAND: chip->state does not always get set.Marcel Ziswiler2008-08-12-0/+1
| | | | | | | Fixes an issue with chip->state not always being set causing troubles. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: Scan bad blocks lazily.Ilya Yanok2008-08-12-3/+7
| | | | | | | | | | Rather than scanning on boot, scan upon the first attempt to check the badness of a block. This speeds up boot when not using NAND, and reduces the likelihood of needing to reflash via JTAG if NAND becomes nonfunctional. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND read/write fixScott Wood2008-08-12-581/+181
| | | | | | | | Implement block-skipping read/write, based on a patch from Morten Ebbell Hestens <morten.hestnes@tandberg.com>. Signed-off-by: Morten Ebbell Hestnes <morten.hestnes@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: fsl_upm: convert to updated MTD NAND infrastructureAnton Vorontsov2008-08-12-40/+28
| | | | | Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* fsl_elbc_nand: Hard-code the FBAR/FPAR split.Scott Wood2008-08-12-3/+2
| | | | | | | | The hardware has separate registers for block and page-within-block, but the division between the two has no apparent relation to the actual erase block size of the NAND chip. Signed-off-by: Scott Wood <scottwood@freescale.com>
* fsl_elbc_nand: workaround for hangs during nand writeAnton Vorontsov2008-08-12-1/+10
| | | | | | | | Using current driver elbc sometimes hangs during nand write. Reading back last byte helps though (thanks to Scott Wood for the idea). Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Freescale eLBC FCM NAND driverScott Wood2008-08-12-0/+760
| | | | | | | | This is a driver for the Flash Control Machine of the enhanched Local Bus Controller found on some Freescale chips (such as the mpc8313 and the mpc8379). Signed-off-by: Scott Wood <scottwood@freescale.com>
* Don't panic if a controller driver does ecc its own way.Scott Wood2008-08-12-2/+6
| | | | | | | | | | | | Some hardware, such as the enhanced local bus controller used on some mpc83xx chips, does ecc transparently when reading and writing data, rather than providing a generic calculate/correct mechanism that can be exported to the nand subsystem. The subsystem should not BUG() when calculate, correct, or hwctl are missing, if the methods that call them have been overridden. Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: Make NAND driver less verbose per defaultStefan Roese2008-08-12-6/+7
| | | | | | | This patch turns off printing of bad blocks per default upon bootup. This can always be shown via the "nand bad" command later. Signed-off-by: Stefan Roese <sr@denx.de>
* NAND: Change nand_wait_ready() to not call nand_wait()Stefan Roese2008-08-12-1/+10
| | | | | | | | This patch changes nand_wait_ready() to not just call nand_wait(), since this will send a new command to the NAND chip. We just want to wait for the chip to become ready here. Signed-off-by: Stefan Roese <sr@denx.de>
* Fixing coding style issuesWilliam Juul2008-08-12-6/+6
| | | | | | | | | - Fixing leading white spaces - Fixing indentation where 4 spaces are used instead of tab - Removing C++ comments (//), wherever I introduced them Signed-off-by: William Juul <william.juul@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Remove white space at end.William Juul2008-08-12-7/+7
| | | | | Signed-off-by: William Juul <william.juul@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Update MTD to that of Linux 2.6.22.1William Juul2008-08-12-2299/+2753
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A lot changed in the Linux MTD code, since it was last ported from Linux to U-Boot. This patch takes U-Boot NAND support to the level of Linux 2.6.22.1 and will enable support for very large NAND devices (4KB pages) and ease the compatibility between U-Boot and Linux filesystems. This patch is tested on two custom boards with PPC and ARM processors running YAFFS in U-Boot and Linux using gcc-4.1.2 cross compilers. MAKEALL ppc/arm has some issues: * DOC/OneNand/nand_spl is not building (I have not tried porting these parts, and since I do not have any HW and I am not familiar with this code/HW I think its best left to someone else.) Except for the issues mentioned above, I have ported all drivers necessary to run MAKEALL ppc/arm without errors and warnings. Many drivers were trivial to port, but some were not so trivial. The following drivers must be examined carefully and maybe rewritten to some degree: cpu/ppc4xx/ndfc.c cpu/arm926ejs/davinci/nand.c board/delta/nand.c board/zylonite/nand.c Signed-off-by: William Juul <william.juul@tandberg.com> Signed-off-by: Stig Olsen <stig.olsen@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* MTD/NAND: Fix printf format warning in nand codeStefan Roese2008-07-10-4/+4
| | | | | | | | | This patch fixes NAND related printf format warning. Those warnings are now visible since patch dc4b0b38d4aadf08826f6c31270f1eecd27964fd [Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is really helpful. Signed-off-by: Stefan Roese <sr@denx.de>
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