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path: root/drivers/mtd/nand
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* ENGR00143704: U_BOOT: Nand oobsize is wrong in some nand chipsTerry Lv2011-05-20-7/+11
| | | | | | Nand oobsize is wrong in some nand chips. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00141556: Fix copyright issueTerry Lv2011-04-08-2/+4
| | | | | | | | | | | We're following the following rules: 1. FSL copyright should be added for freescale added and modified files. 2. FSL copyright should go after existing copyrights. 3. For Duplicate FSL copyright, Our copyright will go after that also. 4. FSL copyright should not include personal names as part. 5. For only FSL copyright, "All rights reserved" is not mattered. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00137390 UBOOT:NAND: BBT not found on MX53 boardJason Liu2010-12-27-0/+7
| | | | | | | | | | BBT table can't be found on MX53 board, which is due to that the BBT table flag has been written to the ECC area which cause the BBT flag lost. This patch also fix the BBT version not correct issue. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00134220-1 NAND: fix up the chip select handlingJason Liu2010-12-07-10/+16
| | | | | | | | When the NAND has multi-cs, the chip select other than cs0 is not handled correctly which will lead to NAND not function as expected Signed-off-by: Jason Liu <r64343@freescale.com>
* NAND: Update to support 64 bit device sizeSandeep Paulraj2010-12-03-28/+39
| | | | | | | | This patch adds support for NANDs greater than 2 GB. Patch is based on the MTD NAND driver in the kernel. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* ENGR00133124: Add nand support for mx50 rdpTerry Lv2010-11-18-15/+8
| | | | | | Add nand support for mx50 rdp. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00133756:UBOOT:NAND:Remove the 2G limitation from NAND driverJason Liu2010-11-16-10/+0
| | | | | | | | | | Remove the 2G limitation from NAND driver since currently kernel can support more than 2GB NAND flash now. This commit will make NAND driver rescan the whole NAND to create one BBT and store to the last 4 blocks of the larger than 2GB NAND flash. This commit will have no effect on the NAND which size is not larger than 2GB. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00133049 Support nand flash for MX28Frank Li2010-11-04-5/+5
| | | | | | | Support nand basic read/write in MX28 u-boot. Signed-off-by: Frank Li <frank.li@freescale.com> Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00132965 add MT29F16G08ABACA NAND descriptionLily Zhang2010-10-26-0/+5
| | | | | | Add MT29F16G08ABACA NAND description Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00132727 NAND: remove REG_NFC_ONE_CYCLE callingLily Zhang2010-10-18-2/+0
| | | | | | | Remove REG_NFC_ONE_CYCLE calling from mxc_nand driver. Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00132617 MX53: add NAND supportLily Zhang2010-10-17-9/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | Add NAND support for MX53 EVK and ARD. Need to use kobs-ng to flash U-Boot on MX53 TO1. Because MX51 TO1 ROM doesn't support bi swap solution and kernel enable bi swap, Must enable "ignore bad block" option when flashing U-Boot. The step is as following: echo 1 > /sys/devices/platform/mxc_nandv2_flash.0/ignorebad kobs-ng init --chip_0_device_path=/dev/mtd2 u-boot.bin echo 0 > /sys/devices/platform/mxc_nandv2_flash.0/ignorebad Since default configuration stores environment into SD card and U-Boot uses get_mmc_env_devno (Read SBMR register) to get MMC/SD slot information, you must insert SD card to bottom SD slot to get/store environment if you are using NAND boot on MX53 EVK. You must config boot dip setting well when doing NAND boot. For example, if you are using NAND 29F32G080AA NAND chip on MX53 EVK, you can set boot dips as the following for NAND boot: SW3: dip 7, 8 on; SW2: dip 3,5 on; SW1: dip 4,7,8 on. Other dips are off. Signed-off-by: Lily Zhang <r58066@freescale.com>
* ENGR00132014: nand read and write page may fail in some pagesTerry Lv2010-09-28-30/+33
| | | | | | nand read and write page may fail in some pages. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00127167: Add gpmi nfc and apbh dma support for mx50.Terry Lv2010-09-19-0/+4591
| | | | | | Add gpmi nfc and apbh dma support for mx50. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00123265 UBOOT:Preserve NAND bad block indicationJason Liu2010-05-07-1/+29
| | | | | | Preserve NAND bad block indication Signed-off-by:Jason Liu <r64343@freescale.com>
* ENGR00119246 Add CONFIG_MXC_NAND config flag in MX25 platformJason2009-12-11-1/+0
| | | | | | Add CONFIG_MXC_NAND config flag in MX25 platform Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00118789 Uboot:Update NAND scan scheme to support new nand typeJason2009-12-08-4/+2493
| | | | | | | | Update NAND scan scheme to support new nand type. With this patch uboot can support new NAND flash on mx25/mx35 board while compatible with old NAND on old boards. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00116924 Uboot: Boot up hang at detecting NAND when cold bootJason2009-11-04-14/+45
| | | | | | | | | | Boot from MMC card failed at detecting NAND. The fix will 1. Set RBB_MODE to 1 and using atomic status command 2. Set FW correctly by adding CONFIG_NAND_FW_8 config 3. Correct the BLS register value Signed-off-by:Jason Liu <r64343@freescale.com> (cherry picked from commit 7142651386271c340a6ae061a6e2893695675724)
* ENGR00116203: Change nand Makefile to use CONFIG_MXC_NAND.Terry Lv2009-09-10-2/+1
| | | | | | Change nand Makefile to use CONFIG_MXC_NAND. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00116083: Recovery mode support for Android on mx51.Terry Lv2009-09-10-1/+1
| | | | | | Recovery mode support for Android on mx51. Signed-off-by: Terry Lv <r65388@freescale.com>
* ENGR00114236 Disable NAND driver interleave mode supportJason2009-09-10-23/+13
| | | | | | Disable NAND driver interleave mode support Signed-off-by:Jason Liu <r64343@freescale.com>
* ENGR00114233 Add support for programming ubifs image on nand flashJason2009-09-10-0/+67
| | | | | | Add support for programming ubifs image on nand flash Signed-off-by:Jason Liu <r64343@freescale.com>
* ENGR00109851 Add nand driver for MX51 ubootJason2009-09-10-212/+257
| | | | | | Add nand driver for MX51 uboot Signed-off-by:Jason Liu <r64343@freescale.com>
* ENGR00108673 Add i.MX25 core to U-BootAlan Carvalho de Assis2009-09-10-0/+1
| | | | | | This patch add support on U-Boot to i.MX25 processor. Signed-off-by: Alan Carvalho de Assis <alan.assis@freescale.com>
* ENGR00108473 Porting i.MX51 3stack TO2 support to V2009.01Fred Fan2009-09-10-0/+1
| | | | | | | Support i.MX51 TO2.0 3stack board. And enable LAN9217 support. NAND is not supported in this patch. Signed-off-by: Fred Fan <r01011@freescale.com>
* ENGR00107886 Porting MX31, MX35 3stack to u-boot V2009.01Fred Fan2009-09-10-93/+88
| | | | | | Modify and Verfiy MX31 & MX35 3stack according to the changes in V2009.01 Signed-off-by: Fred Fan <r01011@freescale.com>
* ENGR00102788 Remove CONFIG_NAND_BOOT on i.MX31 3stackFred Fan2009-09-09-1/+1
| | | | | | | | | 1. Change NAND driver Makefile to bulild individual nand driver on i.MX31 and i.MX35. 2. Remove CONFIG_NAND_BOOT to common boot code which supports boot from nand and nor. Signed-off-by: Fred Fan <r01011@freescale.com>
* ENGR00099697 Add nand driver for mx35Fred Fan2009-09-09-12/+1158
| | | | | | Add nand driver for mx35 Signed-off-by:Jason Liu <r64343@freescale.com>
* ENGR00094619 Support i.MX31 3stack boardFred Fan2009-09-09-0/+970
| | | | | | | | Support boot from NAND Flash Add driver for i.MX31 NFC Upgate U-Boot to support NAND boot Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
* ppc4xx: Fix ECC Correction bug with SMC ordering for NDFC driverFeng Kan2009-08-25-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix ECC Correction bug where the byte offset location were double flipped causing correction routine to toggle the wrong byte location in the ECC segment. The ndfc_calculate_ecc routine change the order of getting the ECC code. /* The NDFC uses Smart Media (SMC) bytes order */ ecc_code[0] = p[2]; ecc_code[1] = p[1]; ecc_code[2] = p[3]; But in the Correction algorithm when calculating the byte offset location, the s1 is used as the upper part of the address. Which again reverse the order making the final byte offset address location incorrect. byteoffs = (s1 << 0) & 0x80; . . byteoffs |= (s0 >> 4) & 0x08; The order is change to read it in straight and let the correction function to revert it to SMC order. Signed-off-by: Feng Kan <fkan@amcc.com> Acked-by: Victor Gallardo <vgallardo@amcc.com> Acked-by: Prodyut Hazarika <phazarika@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* add WATCHDOG_RESET() on nand write and readGiulio Benetti2009-08-21-0/+4
| | | | | | Signed-off-by: giulio.benetti@micronovasrl.com Acked-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
* omap3: replace all instances of gpmc config struct by one globalDirk Behme2009-08-08-17/+16
| | | | | Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* omap3: remove typedefs for configuration structsDirk Behme2009-08-08-1/+1
| | | | | Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* omap3: embedd gpmc_cs into gpmc config structMatthias Ludwig2009-08-07-15/+7
| | | | | | | | | Embedd chip select configuration into struct for gpmc config instead of having it completely separated as suggested by Wolfgang Denk on http://lists.denx.de/pipermail/u-boot/2009-May/052247.html Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
* Remove legacy NAND and disk on chip code.Scott Wood2009-07-16-5/+0
| | | | | | | | | | | | | Legacy NAND had been scheduled for removal. Any boards that use this were already not building in the previous release due to an #error. The disk on chip code in common/cmd_doc.c relies on legacy NAND, and it has also been removed. There is newer disk on chip code in drivers/mtd/nand; someone with access to hardware and sufficient time and motivation can try to get that working, but for now disk on chip is not supported. Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: ndfc: Remove unnecessary #ifdef'sStefan Roese2009-07-16-6/+0
| | | | | | | | | Now that the 4xx NAND driver ndfc is moved to the common NAND driver directory we don't need this #ifdef's anymore. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand/ppc4xx: Move PPC4xx NAND driver to common NAND driver directoryStefan Roese2009-07-16-0/+224
| | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: fixed failed reads on corrected ECC errors in nand_util.cValeriy Glushkov2009-07-16-5/+5
| | | | | | Signed-off-by: Valeriy Glushkov <gvv@lstec.com> Signed-off-by: Paulraj, Sandeep <s-paulraj@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Typo fix: use CONFIG_SOC_DM644X, not CONFIG_SOC_DM646.David Brownell2009-07-16-1/+1
| | | | | Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2009-07-13-0/+83
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| * nand: Add Marvell Kirkwood NAND driverPrafulla Wadaskar2009-07-08-0/+83
| | | | | | | | | | | | | | This patch adds a NAND driver for the Marvell Kirkwood SoC's Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Acked-by: Scott Wood <scottwood@freescale.com>
* | fsl_elbc_nand: redirect the pointer of bbt pattern to RAMMingkai Hu2009-07-07-0/+4
| | | | | | | | | | | | | | | | | | | | | | The bbt descriptors contains the pointer to the bbt pattern which are statically initialized memory struct. When relocated to RAM, these pointers will continue point to NOR flash(or L2 SRAM, or other boot device). If the contents of NOR flash changed or L2 SRAM disabled, it'll hang the system. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | Bug-fix in drivers mtd nand Makefilekevin.morfitt@fearnside-systems.co.uk2009-07-07-1/+1
| | | | | | | | | | | | | | | | The S3C2410 NAND driver source file is included in the makefile instead of the object file. Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | mtd: nand: use loff_t for offsetJean-Christophe PLAGNIOL-VILLARD2009-07-07-10/+10
| | | | | | | | | | | | | | | | nand_util currently uses size_t which is arch dependent and not always a unsigned long. Now use loff_t, as does the linux mtd layer. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | mtd: nand: new base driver for memory mapped nand devicesMike Frysinger2009-07-07-0/+54
| | | | | | | | | | | | | | | | | | The BF537-STAMP Blackfin board had a driver for working with NAND devices that are simply memory mapped. Since there is nothing Blackfin specific about this, generalize the driver a bit so that everyone can leverage it. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | davinci_nand chipselect/init cleanupDavid Brownell2009-07-07-20/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update chipselect handling in davinci_nand.c so that it can handle 2 GByte chips the same way Linux does: as one device, even though it has two halves with independent chip selects. For such chips the "nand info" command reports: Device 0: 2x nand0, sector size 128 KiB Switch to use the default chipselect function unless the board really needs its own. The logic for the Sonata board moves out of the driver into board-specific code. (Which doesn't affect current build breakage if its NAND support is enabled...) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC)David Brownell2009-07-07-205/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option. It's not just nasty; it's also unused by any current boards, and doesn't even match the main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC on newer chips that support it). DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30, match non-BROKEN code paths for 1-bit HW ECC. The BROKEN code paths do seem to partially match what MontaVista/TI kernels (4.0/2.6.10, and 5.0/2.6.18) do ... but only for small pages. Large page support is really broken (and it's unclear just what software it was trying to match!), and the ECC layout was making three more bytes available for use by filesystem (or whatever) code. Since this option itself seems broken, remove it. Add a comment about the MV/TI compat issue, and the most straightforward way to address it (should someone really need to solve it). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
* | davinci_nand: cleanup I (minor)David Brownell2009-07-07-33/+22
|/ | | | | | | | | | | | | | | | | | | | | | | | Minor cleanup for DaVinci NAND code: - Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't be defined when there are multiple chipselect lines in use (as with common 2 GByte chips). - Cleanup handling of EMIF control registers * Only need one pointer pointing to them * Remove incorrect and unused struct supersetting them - Use the standard waitfunc; we don't need a custom version - Partial legacy cleanup: * Don't initialize every board like it's a DM6446 EVM * #ifdef a bit more code for BROKEN_ECC Sanity checked with small page NAND on dm355 and dm6446 EVMs; and large page on dm355 EVM (packaged as two devices, not one). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
* ARM DaVinci: EMIF settingsThomas Lange2009-07-06-9/+3
| | | | | | | | | | | NAND module should not modify EMIF registers unrelated to CS2 that is used for NAND, i.e. do not modify EWAIT config register or registers for other Chip Selects. Without this patch, EMIF configurations made in board_init() will be invalidated. Signed-off-by: Thomas Lange <thomas@corelatus.se>
* nand/mpc512x: Add MPC512x NAND support (NFC)Stefan Roese2009-06-12-0/+693
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds NAND Flash Controller driver for MPC5121 revision 2. All device features, except hardware ECC and power management, are supported. This NFC driver replaces the one orignally posted by John Rigby: "[PATCH] Freescale NFC NAND driver" It's a port of the Linux driver version posted by Piotr Ziecik a few weeks ago. Using this driver has the following advantages (from my point of view): - Compatibility with the Linux NAND driver (e.g. ECC usage) - Better code quality in general - Resulting U-Boot image is a bit smaller (approx. 3k) - Better to sync with newer Linux driver versions The only disadvantage I can see, is that HW-ECC is not supported right now. But this could be added later (e.g. port from Linux driver after it's supported there). Using HW-ECC on the MCP5121 NFC has a general problem because of the ECC usage in the spare area. This collides with JFFS2 for example. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Piotr Ziecik <kosmo@semihalf.com> Cc: Wolfgang Denk <wd@denx.de> Cc: John Rigby <jcrigby@gmail.com> Cc: Scott Wood <scottwood@freescale.com>
* mtd: Introduce CONFIG_MTD_DEVICE to select compilation of mtdcore.oStefan Roese2009-06-12-1/+1
| | | | | | | | | | | | | This new define enables mtdcore.c compilation and with this we can select the MTD device infrastructure needed for the reworked mtdparts command. We now have the 2 MTD infrastructure defines, CONFIG_MTD_DEVICE and CONFIG_MTD_PARTITIONS. CONFIG_MTD_DEVICE is needed (as explained above) for the "mtdparts" command and CONFIG_MTD_PARTITIONS is needed for UBI. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Scott Wood <scottwood@freescale.com>
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