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* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-17/+17
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Fix the NAND size overflow issue.Jason Jin2008-10-14-2/+2
| | | | | | | | | | | | | When the total size of all NAND devices exceeds 4 GiB, the size will overflow. This patch tries to fix this. Note that we still have a problem when a single NAND device is bigger than 4 GiB: then the overflow would actually happen earlier, i. e. when storing the size in nand_info[].size, as nand_info[].size is an "u_int32_t". Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* fsl_elbc_nand: ecclayout cleanupsAnton Vorontsov2008-09-12-4/+0
| | | | | | | | | | This patch deletes oobavail assignments, they're calculated by the nand core code in nand_scan_tail, plus current oobavail values are wrong for the LP NANDs. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* fsl_elbc_nand: implement support for flash-based BBTAnton Vorontsov2008-09-12-1/+34
| | | | | | | | | | | | | This patch implements support for flash-based BBT for chips working through ELBC NAND controller, so that NAND core will not have to re-scan for bad blocks on every boot. Because ELBC controller may provide HW-generated ECCs we should adjust bbt pattern and bbt version positions in the OOB free area. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* fsl_elbc_nand: fix OOB workability for large page NAND chipsAnton Vorontsov2008-09-12-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | For large page chips, nand_bbt is looking into OOB area, and checking for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be reserved for bbt means. But ELBC driver is specifying ecclayout so that oobfree area starts at offset 1, so only one byte left for the bbt purposes. This causes problems with any OOB users, namely JFFS2: after first mount JFFS2 will fill all OOBs with "erased marker", so OOBs will contain: OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff And on the next boot, NAND core will rescan for bad blocks, then will see "0xff 0x19" pattern, and will mark all blocks as bad ones. To fix the issue we should implement our own bad block pattern: just one byte at OOB start. Though, this will work only for x8 chips. For x16 chips two bytes must be checked. Since ELBC driver does not support x16 NANDs (yet), we're safe for now. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: add NAND driver for S3C64XXGuennadi Liakhovetski2008-08-31-0/+320
| | | | | | Based on the original S3C64XX NAND driver by Samsung for U-Boot 1.1.6. Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
* Coding Style cleanup, update CHANGELOGWolfgang Denk2008-08-14-55/+55
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* drivers/mtd/nand: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-08-13-35/+8
| | | | | | rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* NAND: chip->state does not always get set.Marcel Ziswiler2008-08-12-0/+1
| | | | | | | Fixes an issue with chip->state not always being set causing troubles. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: Scan bad blocks lazily.Ilya Yanok2008-08-12-3/+7
| | | | | | | | | | Rather than scanning on boot, scan upon the first attempt to check the badness of a block. This speeds up boot when not using NAND, and reduces the likelihood of needing to reflash via JTAG if NAND becomes nonfunctional. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND read/write fixScott Wood2008-08-12-581/+181
| | | | | | | | Implement block-skipping read/write, based on a patch from Morten Ebbell Hestens <morten.hestnes@tandberg.com>. Signed-off-by: Morten Ebbell Hestnes <morten.hestnes@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* nand: fsl_upm: convert to updated MTD NAND infrastructureAnton Vorontsov2008-08-12-40/+28
| | | | | Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* fsl_elbc_nand: Hard-code the FBAR/FPAR split.Scott Wood2008-08-12-3/+2
| | | | | | | | The hardware has separate registers for block and page-within-block, but the division between the two has no apparent relation to the actual erase block size of the NAND chip. Signed-off-by: Scott Wood <scottwood@freescale.com>
* fsl_elbc_nand: workaround for hangs during nand writeAnton Vorontsov2008-08-12-1/+10
| | | | | | | | Using current driver elbc sometimes hangs during nand write. Reading back last byte helps though (thanks to Scott Wood for the idea). Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Freescale eLBC FCM NAND driverScott Wood2008-08-12-0/+760
| | | | | | | | This is a driver for the Flash Control Machine of the enhanched Local Bus Controller found on some Freescale chips (such as the mpc8313 and the mpc8379). Signed-off-by: Scott Wood <scottwood@freescale.com>
* Don't panic if a controller driver does ecc its own way.Scott Wood2008-08-12-2/+6
| | | | | | | | | | | | Some hardware, such as the enhanced local bus controller used on some mpc83xx chips, does ecc transparently when reading and writing data, rather than providing a generic calculate/correct mechanism that can be exported to the nand subsystem. The subsystem should not BUG() when calculate, correct, or hwctl are missing, if the methods that call them have been overridden. Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: Make NAND driver less verbose per defaultStefan Roese2008-08-12-6/+7
| | | | | | | This patch turns off printing of bad blocks per default upon bootup. This can always be shown via the "nand bad" command later. Signed-off-by: Stefan Roese <sr@denx.de>
* NAND: Change nand_wait_ready() to not call nand_wait()Stefan Roese2008-08-12-1/+10
| | | | | | | | This patch changes nand_wait_ready() to not just call nand_wait(), since this will send a new command to the NAND chip. We just want to wait for the chip to become ready here. Signed-off-by: Stefan Roese <sr@denx.de>
* Fixing coding style issuesWilliam Juul2008-08-12-6/+6
| | | | | | | | | - Fixing leading white spaces - Fixing indentation where 4 spaces are used instead of tab - Removing C++ comments (//), wherever I introduced them Signed-off-by: William Juul <william.juul@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Remove white space at end.William Juul2008-08-12-7/+7
| | | | | Signed-off-by: William Juul <william.juul@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* Update MTD to that of Linux 2.6.22.1William Juul2008-08-12-2299/+2753
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A lot changed in the Linux MTD code, since it was last ported from Linux to U-Boot. This patch takes U-Boot NAND support to the level of Linux 2.6.22.1 and will enable support for very large NAND devices (4KB pages) and ease the compatibility between U-Boot and Linux filesystems. This patch is tested on two custom boards with PPC and ARM processors running YAFFS in U-Boot and Linux using gcc-4.1.2 cross compilers. MAKEALL ppc/arm has some issues: * DOC/OneNand/nand_spl is not building (I have not tried porting these parts, and since I do not have any HW and I am not familiar with this code/HW I think its best left to someone else.) Except for the issues mentioned above, I have ported all drivers necessary to run MAKEALL ppc/arm without errors and warnings. Many drivers were trivial to port, but some were not so trivial. The following drivers must be examined carefully and maybe rewritten to some degree: cpu/ppc4xx/ndfc.c cpu/arm926ejs/davinci/nand.c board/delta/nand.c board/zylonite/nand.c Signed-off-by: William Juul <william.juul@tandberg.com> Signed-off-by: Stig Olsen <stig.olsen@tandberg.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
* MTD/NAND: Fix printf format warning in nand codeStefan Roese2008-07-10-4/+4
| | | | | | | | | This patch fixes NAND related printf format warning. Those warnings are now visible since patch dc4b0b38d4aadf08826f6c31270f1eecd27964fd [Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is really helpful. Signed-off-by: Stefan Roese <sr@denx.de>
* NAND: Rename DEBUG to MTDDEBUG to avoid namespace pollution.Scott Wood2008-07-09-37/+70
| | | | | | | | | This is particularly problematic now that non-NAND-specific code is including <nand.h>, and thus all debugging code is being compiled regardless of whether it was requested, as reported by Scott McNutt <smcnutt@psyent.com>. Signed-off-by: Scott Wood <scottwood@freescale.com>
* NAND: Added support for 128-bit OOB, adaptedSergei Poselenov2008-06-11-13/+33
| | | | Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
* NAND FSL UPM: driver re-write using the hwcontrol callbackWolfgang Grandegger2008-06-10-82/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a re-write of the NAND FSL UPM driver using the more universal hwcontrol callback (instead of the cmdfunc callback). Here is a brief list of furher modifications: - For the time being, the UPM setup writing the UPM array has been removed from the driver and must now be done by the board specific code. - The bus width definition in "struct fsl_upm_nand" is now in bits to comply with the corresponding Linux driver and 8, 16 and 32 bit accesses are supported. - chip->dev_read is only set if fun->dev_ready != NULL, which is required for boards not connecting the R/B pin. - A few issue have been fixed with MxMR bit manipulation like in the corresponding Linux driver. Note: I think the "io_addr" field of "struct fsl_upm" could be removed as well, because the address is already determined by "nand->IO_ADDR_[RW]", but I'm not 100% sure. This patch has been tested on a TQM8548 modules with the NAND chip Micron MT29F8G08FABWP. This patch is based on the following patches posted to this list a few minutes ago: PPC: add accessor macros to clear and set bits in one shot 83xx/85xx/86xx: add more MxMR local bus definitions Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* nand: Correct NAND erase percentage outputDirk Behme2008-05-28-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | For NAND erase sizes smaller than one NAND erase block, erase percentage output becomes grater than 100% e.g. -- cut -- > nand info Device 0: NAND 64MiB 1,8V 8-bit, sector size 16 KiB > nand erase 0x100000 0x2000 NAND erase: device 0 offset 0x100000, size 0x2000 Erasing at 0x100000 -- 200% complete. OK > -- cut -- Correct this and give user a warning that more is erased than specified: -- cut -- > nand erase 0x100000 0x2000 NAND erase: device 0 offset 0x100000, size 0x2000 Warning: Erase size 0x00002000 smaller than one erase block 0x00004000 Erasing 0x00004000 instead Erasing at 0x100000 -- 100% complete. OK > -- cut -- Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
* Big white-space cleanup.Wolfgang Denk2008-05-21-81/+81
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* PATCH - Fix oob data copied into supplied bufferTroy Kisky2008-04-21-9/+8
| | | | | | | | | | | | | This patch correctly sets the oobavail variable and fixes a bug where the oob data was not valid when there where multiple groups in oobfree. First segment fixes a typo Second segment fixes a bug where oob data may be copied incorrectly. Third segment adds an error message when exiting due to write protect. Forth segment fixes a bug where oobavail may be set incorrectly. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* Remove conflicting NAND IDMike Frysinger2008-04-17-2/+0
| | | | | | | | | | | There are two NAND entries with ID 0xDC and this obviously causes problems. In the kernel, they punted the first entry, so we should do the same. See this upstream e-mail for more info: http://lists.infradead.org/pipermail/linux-mtd/2007-July/018795.html Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* nand: FSL UPM NAND driverAnton Vorontsov2008-01-16-0/+203
| | | | Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
* fix comments with new drivers organizationMarcel Ziswiler2008-01-09-1/+1
| | | | Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* drivers/mtd : move mtd drivers to drivers/mtdJean-Christophe PLAGNIOL-VILLARD2007-11-25-0/+6842
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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