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* arm: rmobile: Add BLANCHE board supportmasakazu.mochizuki.wd@hitachi.com2016-08-17-17/+15
| | | | | | | | | | BLANCHE is development board based on R-Car V2H SoC (R8A7792) This commit supports the following periherals: - SCIF, Ethernet, QSPI, MMC Signed-off-by: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* mmc: rmobile: add a compiler barrierYannick Gicquel2016-08-17-0/+3
| | | | | | | | | | | | | | Building w/ GCC v5.2, the SD card access is broken due to invalid data in the response command reconstructed at the end of sh_sdhci_get_response(). Add a memory barrier between the two main steps of this function to ensure the resp[] table content is consistent before bits reordering. This fix has been tested Ok on Porter board rev1.0 using v2016.03 release. Signed-off-by: Yannick Gicquel <yannick.gicquel@iot.bzh>
* ARM: Rmobile: Rename CONFIG_RMOBILE to CONFIG_ARCH_RMOBILENobuhiro Iwamatsu2016-08-17-1/+1
| | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* mmc: msm_sdhci: Set mmc->dev pointer in msm_sdc_probe()Mateusz Kulikowski2016-07-08-1/+6
| | | | | | | | | | | MMC core expects (now) valid mmc->dev pointer. During conversion in commit cffe5d86 not every driver was updated. This patch fixes crash while accessing MMC on boards using Qualcomm SDHCI controller. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* mmc: increase MMC SDHCI read status timeoutSteve Rae2016-07-01-2/+3
| | | | | | | | | | | | | | | | | | | | | | Otherwise, ocassionally see errors like this: Flashing sparse image at offset 2078720 Flashing Sparse Image sdhci_send_command: Timeout for status update! mmc fail to send stop cmd write_sparse_image: Write failed, block #2181088 [0] This does not affect the actual writing speed, which is controlled by the default value: CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT It only increases the retries when reading: SDHCI_INT_STATUS to avoid the timeout error. Signed-off-by: Steve Rae <steve.rae@raedomain.com> Reviewed-by: Stefan Roese <sr@denx.de> Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-06-28-14/+54
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| * mmc: fsl: introduce wp_enablePeng Fan2016-06-28-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introudce wp_enable. To check WPSPL, wp_enable needs to be set to 1 in board code. Take i.MX6UL for example, for some boards, they do not use WP singal, so they does not configure USDHC1_WP_SELECT_INPUT, and its default value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and SION bit set. So USDHC controller can always get wp signal and WPSPL shows write protect and blocks driver continuing. This is not what we want to see, so add wp_enable, and if set to 0, just omit the WPSPL checking and this does not effect normal working of usdhc controller. If wp-gpios is provided in dts, wp_enable is set to 1, otherwise 0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * fsl_esdhc: Update clock enable bits for USDHCYe Li2016-06-28-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USDHC moves the 4 clock bits CARD_CLK_SOFT_EN, IPG_PERCLK_SOFT_EN, HCLK_SOFT_EN, and IPG_CLK_SOFT_EN from sysctl register to vendorspec register. The driver uses RSTA to replace the clock gate off operation. But this is not a good solution because: 1. when using RSTA, we should wait this bit to clear by itself. This is not implemeneted in the code. 2. After RSTA is set, it is recommended that the Host Driver reset the external card and reinitialize it. So in this patch, we change to use the vendorspec registers for these bits operation. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * mmc: fsl: reset to normal boot mode when eMMC fast bootPeng Fan2016-06-28-9/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When booting in eMMC fast boot, MMC host does not exit from boot mode after bootrom loading image. So the first command 'CMD0' sent in uboot will pull down the CMD line to low and cause errors. This patch cleans the MMC boot register in "mmc_init" to put the MMC host back to normal mode. Also clear DLL_CTRL delay line settings at USDHC initialization to eliminate the pre-settings from boot rom. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: York Sun <york.sun@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | mmc: dw_mmc: fix the wrong AND operationJaehoon Chung2016-06-27-2/+2
|/ | | | | | | | | | These condition checking are wrong. Original Author's intention might be "&" instead of "&&". It can know whether receive or transmit data request with BIT[4]/BIT[5] of RINTSTS register. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* mmc: add MMC_VERSION_5_1Stefan Wahren2016-06-20-0/+3
| | | | Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
* clk: convert API to match reset/mailbox styleStephen Warren2016-06-19-14/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following changes are made to the clock API: * The concept of "clocks" and "peripheral clocks" are unified; each clock provider now implements a single set of clocks. This provides a simpler conceptual interface to clients, and better aligns with device tree clock bindings. * Clocks are now identified with a single "struct clk", rather than requiring clients to store the clock provider device and clock identity values separately. For simple clock consumers, this isolates clients from internal details of the clock API. * clk.h is split so it only contains the client/consumer API, whereas clk-uclass.h contains the provider API. This aligns with the recently added reset and mailbox APIs. * clk_ops .of_xlate(), .request(), and .free() are added so providers can customize these operations if needed. This also aligns with the recently added reset and mailbox APIs. * clk_disable() is added. * All users of the current clock APIs are updated. * Sandbox clock tests are updated to exercise clock lookup via DT, and clock enable/disable. * rkclk_get_clk() is removed and replaced with standard APIs. Buildman shows no clock-related errors for any board for which buildman can download a toolchain. test/py passes for sandbox (which invokes the dm clk test amongst others). Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* armv8: s32v234: Introduce basic support for s32v234evbEddy Petrișor2016-06-13-4/+4
| | | | | | | | | | | | | | | | Add initial support for NXP's S32V234 SoC and S32V234EVB board. The S32V230 family is designed to support computation-intensive applications for image processing. The S32V234, as part of the S32V230 family, is a high-performance automotive processor designed to support safe computation-intensive applications in the area of vision and sensor fusion. Code originally writen by: Original-signed-off-by: Stoica Cosmin-Stefan <cosminstefan.stoica@freescale.com> Original-signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com> Original-signed-off-by: Eddy Petrișor <eddy.petrisor@gmail.com> Signed-off-by: Eddy Petrișor <eddy.petrisor@nxp.com>
* mmc: omap_hsmmc: enable 8bit interface for eMMC for AM33xxHeiko Schocher2016-06-09-0/+1
| | | | | | | Enable 8bit interface on HSMMC2 for am33xx to support 8bit eMMC chips. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* mmc: revert mmc: Handle switch error status bit in MMC card statusHeiko Schocher2016-06-09-3/+1
| | | | | | | | | revert patch: commit: 6b2221b008e0: mmc: Handle switch error status bit in MMC card status to get eMMC working on shc board Signed-off-by: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-06-04-5/+4
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| * mmc: fsl_esdhc: fix check_and_invalidate_dcache_range functionYangbo Lu2016-06-03-5/+4
| | | | | | | | | | | | | | | | | | In function check_and_invalidate_dcache_range(), there are incorrect start address and end address of the dcache range calculated for Layerscape platforms. This patch is to fix this issue. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | mmc: tegra: add basic Tegra186 supportStephen Warren2016-05-31-1/+31
|/ | | | | | | | | | | | | | | | | | | | | | Tegra186's MMC controller needs to be explicitly identified. Add another compatible value for it. Tegra186 will use an entirely different clock/reset control mechanism to existing chips, and will use standard clock/reset APIs rather than the existing Tegra-specific custom APIs. The driver support for that isn't ready yet, so simply disable all clock/reset usage if compiling for Tegra186. This must happen at compile time rather than run-time since the custom APIs won't even be compiled in on Tegra186. In the long term, the plan would be to convert the existing custom APIs to standard APIs and get rid of the ifdefs completely. The system's main eMMC will work without any clock/reset support, since the firmware will have already initialized the controller in order to load U-Boot. Hence the driver is useful even in this apparently crippled state. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* dm: mmc: Use cfg directly in mmc_bind()Simon Glass2016-05-27-1/+1
| | | | | | This small change tidies up the code slightly. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Fix up mmc_bread/bwrite() prototypes for SPLSimon Glass2016-05-27-0/+14
| | | | | | | When these functions are not compiled in, we still need to declare the correct function signature to avoid a build warnings in SPL. Fix this. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: rockchip: mmc: Allow use of CONFIG_BLKSimon Glass2016-05-27-0/+31
| | | | | | Allow driver model to be used for block devices in the rockchip mmc driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: dwmmc: Support CONFIG_BLKSimon Glass2016-05-27-14/+28
| | | | | | Add support for using driver model for block devices in this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Convert sdhci to support CONFIG_BLKSimon Glass2016-05-27-1/+1
| | | | | | Update sdhci.c so that it works with driver model enabled for block devices. Signed-off-by: Simon Glass <sjg@chromium.org>
* mmc: Use byte array for multipliersSimon Glass2016-05-26-1/+1
| | | | | | | We don't need an int since no value is over 80. This saves a small amount of SPL space (about 44 bytes). Signed-off-by: Simon Glass <sjg@chromium.org>
* mmc: Drop mmc_register()Simon Glass2016-05-26-9/+0
| | | | | | This function is no longer used. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: sandbox: Add an SD-card emulationSimon Glass2016-05-17-2/+143
| | | | | | | | Add an emulation of an SD card to sandbox, allowing MMC to be used in tests. The emulation is very simple, supporting only card detection and reading test data. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Add support for driver-model block devicesSimon Glass2016-05-17-12/+54
| | | | | | | Add support for enabling CONFIG_BLK with MMC. This involves changing a few functions to use struct udevice and adding a MMC block device driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Add a way to bind MMC devices with driver modelSimon Glass2016-05-17-0/+48
| | | | | | | | | | Binding an MMC device when CONFIG_BLK is enabled requires that a block device be bound as a child of the MMC device. Add a function to do this. The mmc_create() method will be used only when DM_BLK is disabled. Add an unbind method also. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Implement the MMC functions for block devicesSimon Glass2016-05-17-1/+109
| | | | | | | | Implement the functions in mmc_legacy.c for driver-model block devices, so that MMC can use driver model for these. This allows CONFIG_BLK to be enabled with DM_MMC. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: sandbox: Only enable the sandbox MMC driver when validSimon Glass2016-05-17-0/+4
| | | | | | | This driver will require generic MMC and block-device support in a future commit. To avoid test errors, make this change now. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Adjust mmc_switch_part() to use a struct mmcSimon Glass2016-05-17-8/+4
| | | | | | | Instead of looking up the MMC device by number, just pass it in. This makes it possible to use this function with driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Move the device list into a separate fileSimon Glass2016-05-17-117/+172
| | | | | | | | | At present the MMC subsystem maintains its own list of MMC devices. This cannot work with driver model, which needs to maintain this itself. Move the list code into a separate 'legacy' file. The core MMC code remains, and will be shared with the driver-model implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Set up the device pointer when using the MMC uclassSimon Glass2016-05-17-1/+11
| | | | | | | Update the existing drivers to set up this new pointer. This will be required by the MMC uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Use the new select_hwpart() APISimon Glass2016-05-17-3/+4
| | | | | | Avoid calling directly into the MMC code - use the new API call instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Add a function to obtain the block deviceSimon Glass2016-05-17-0/+5
| | | | | | | | The MMC block device is contained within struct mmc. But with driver model this will not be the case. Add a function to obtain the block device. We can later implement this for CONFIG_BLK. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Implement the select_hwpart() methodSimon Glass2016-05-17-0/+22
| | | | | | | Implement this method so that hardware partitions will work correctly with MMC. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Move mmc_switch_part() above its callersSimon Glass2016-05-17-24/+21
| | | | | | | | This function is defined after it is used. In preparation for making it static, move it up a little. Also drop the printf() which should not appear in a driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Drop the get_dev() functionSimon Glass2016-05-17-14/+2
| | | | | | This function is implemented by the legacy block functions now. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Add a legacy block interface for MMCSimon Glass2016-05-17-3/+27
| | | | | | Add a legacy block interface for MMC. Signed-off-by: Simon Glass <sjg@chromium.org>
* mmc: sdhci: add const qualifier to the name of struct sdhci_hostMasahiro Yamada2016-04-25-3/+3
| | | | | | | This allows to drop annoying (char *) casts when setting the host name of struct sdhci_host. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* drivers: mmc: omap_hsmmc: request cd and wp gpios when DM_MMC is definedMugunthan V N2016-04-18-0/+5
| | | | | | | | Add request gpio for CD and WP gpios, so that the gpio can be used for the respective purposes. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* drivers: mmc: omap_hsmmc: Fix conversion of address to a pointerMugunthan V N2016-04-18-1/+2
| | | | | | | | | | | | | | | | | omap_hsmmc driver directly typecasts fdt_addr_t to a pointer. This is not strictly correct, as it gives a build warning when fdt_addr_t is u64. So, use map_physmem for a proper typecasts. This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address instead of a pointer for the uart base") drivers/mmc/omap_hsmmc.c: In function ‘omap_hsmmc_ofdata_to_platdata’: drivers/mmc/omap_hsmmc.c:776:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] priv->base_addr = (struct hsmmc *)dev_get_addr(dev); ^ Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: socfpga: Nuke useless includeMarek Vasut2016-04-10-1/+0
| | | | | | | | | | The dwmmc.h include was forgotten during the migration of dwmmc probing to DM. Since the shiny DM is in place now, remove this relic of the past. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* fsl: esdhc: support driver modelPeng Fan2016-04-06-40/+213
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Driver Model for fsl esdhc driver. 1. Introduce a new structure struct fsl_esdhc_priv 2. Refactor fsl_esdhc_initialize which is originally used by board code. - Introduce fsl_esdhc_init to be common usage for DM and non-DM - Introduce fsl_esdhc_cfg_to_priv to build the bridge for non-DM part. - The original API for board code is still there, but we use 'fsl_esdhc_cfg_to_priv' and 'fsl_esdhc_init' to serve it. 3. All the functions are changed to use 'struct fsl_esdhc_priv', except fsl_esdhc_initialize. 4. Since clk driver is not implemented, use mxc_get_clock to geth the clk and fill 'priv->sdhc_clk'. Has been tested on i.MX6UL 14X14 EVK board: " =>dm tree .... simple_bus [ + ] | `-- aips-bus@02100000 mmc [ + ] | |-- usdhc@02190000 mmc [ + ] | |-- usdhc@02194000 .... => mmc list FSL_SDHC: 0 (SD) FSL_SDHC: 1 (SD) " Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Yangbo Lu <yangbo.lu@nxp.com> Cc: Hector Palacios <hector.palacios@digi.com> Cc: Eric Nelson <eric@nelint.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Tested-By: Eric Nelson <eric@nelint.com> Reviewed-by: York Sun <york.sun@nxp.com>
* mmc: Add support for Qualcomm SDHCI controllerMateusz Kulikowski2016-04-01-0/+190
| | | | | | | | | | | Add support for SD/eMMC controller present on some Qualcomm Snapdragon devices. This controller implements SDHCI 2.0 interface but requires vendor-specific initialization. Driver works in PIO mode as ADMA is not supported by U-Boot (yet). Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-04-01-1/+5
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| * sunxi: Add support for Allwinner A64 SoCsSiarhei Siamashka2016-04-01-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner A64 SoC is used in the Pine64. This patch adds all bits necessary to compile U-Boot for it running in AArch64 mode. Unfortunately SPL is not ready yet due to legal problems, so we need to boot using the binary boot0 for now. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [agraf: remove SPL code, move to AArch64] Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Explicitly cast u32 pointer conversionsAlexander Graf2016-04-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | Some parts of the sunxi code cast explicitly between u32 values and pointers. This is not a problem in practice, because all 64bit SoCs today only use the lower 32 bits for their phyical address space. But we need to make sure that the compiler is sure this is not an accident as well. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | mmc: uniphier: use devm_get_addr() to get base addressMasahiro Yamada2016-04-01-3/+6
|/ | | | | | | | | Currently, fdtdec_get_addr_size() does not support the address translation, so it cannot handle device trees with non-straight "ranges" properties. (This would be a problem with DTS for UniPhier ARMv8 SoCs.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* mmc: Print send_cmd response only when return value is zeroBin Meng2016-03-27-38/+42
| | | | | | | | send_cmd response is valid only when no error happened. If an error occured, let mmc_send_cmd() print the return value to aid debugging. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.1 at 2024-11-05 06:07:51 +0000