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* Blackfin: bfin_sdh: drop dos part hardcodeMike Frysinger2012-04-22-1/+0
| | | | | | | | | No other driver sets up the part type to DOS in their init, and it doesn't seem to be needed as `mmcinfo` and `mmc part` stll work, so drop it. Reported-by: Marek Vasut <marex@denx.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* mmc: Fix warning if CONFIG_MMC_TRACE is enabledDirk Behme2012-04-21-1/+1
| | | | | | | | | | | | | | Fix the warning mmc.c: In function 'mmc_send_cmd': mmc.c:87: warning: assignment from incompatible pointer type in case CONFIG_MMC_TRACE is enabled. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Andy Fleming <afleming@freescale.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* DMA: Split the APBH DMA init into block and channel initMarek Vasut2012-04-16-0/+5
| | | | | | | | | | | | | | | | | | | | | | | This fixes the issue where mxs_dma_init() was called either twice or never, without introducing any new init hooks. The idea is to allow each and every device using the APBH DMA block to configure and request only the channels it uses, instead of making it call init for all the channels as is now. The common DMA block init part, which only configures the block, is then called from CPUs arch_cpu_init() call. NOTE: This patch depends on: http://patchwork.ozlabs.org/patch/150957/ Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* i.MX28: Allow coexistence of PIO and DMA mode for SD/MMCMarek Vasut2012-04-16-1/+47
| | | | | | | | | | | | This SD DMA function of i.MX28 is still apparently too experimental to be enabled by default in 2012.04 release. Enable this feature only if the user plans to tinker with DCache or explicitly enables it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* drivers/mmc/mmc.c: Fix build warningAnatolij Gustschin2012-03-30-1/+1
| | | | | | | | | | | | Fix: mmc.c: In function 'mmc_bounce_buffer_start': mmc.c:132:13: warning: no return statement in function returning non-void [-Wreturn-type] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Andy Fleming <afleming@gmail.com> Cc: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* drivers/mmc/tegra2_mmc.c: fix GCC 4.6 warningAnatolij Gustschin2012-03-30-1/+1
| | | | | | | | | | | Fix: tegra2_mmc.c: In function 'mmc_send_cmd': tegra2_mmc.c:230:3: warning: 'mask' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Doug Anderson <dianders@chromium.org> Cc: Tom Warren <twarren@nvidia.com>
* i.MX28: Do data transfers via DMA in MMC driverMarek Vasut2012-03-29-30/+40
| | | | | | | | | This utilizes the newly introduced bounce buffers in the MMC layer. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Andy Fleming <afleming@gmail.com> Cc: Fabio Estevam <festevam@gmail.com>
* MMC: Implement generic bounce bufferMarek Vasut2012-03-29-3/+99
| | | | | | | | | | This implements generic bounce buffer at the end of MMC command submission chain. Therefore if unaligned data are passed, they are copied. This stuff should be pushed down into the MMC subsystem to squash all places generating these unaligned data. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@gmail.com>
* ATMEL: remove old atmel_mci driverSven Schnelle2012-03-13-534/+0
| | | | | | | | All boards are using the gen_atmel_mci driver now, so no need to carry the old driver around. Signed-off-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ATMEL: use generic mmc frameworkSven Schnelle2012-03-13-245/+0
| | | | | | | | | gen_atmel_mci works on AVR32 as well, so no need to use the legacy mmc driver. This also has the nice side effect of being able to use SDHC cards an those boards. Signed-off-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* mmc: make mmc_send_status() more reliableJan Kloetzke2012-02-15-8/+12
| | | | | | | | | Align the card status polling with the Linux kernel and retry the command at least five times. Also some cards apparently mishandle the status bits, so make sure to check the card state too. Signed-off-by: Jan Kloetzke <jan.kloetzke@dspg.com> Cc: Andy Fleming <afleming@gmail.com>
* mmc: fix card busy pollingJan Kloetzke2012-02-15-8/+6
| | | | | | | | | | | | A MMC/SD card may always go into the programming state (and hence be busy) after a block write. Therefore always check the card state, even after single block writes. On the other hand there is no need to check the card status after a read. Also make sure that errors during busy polling are propagated upwards. Signed-off-by: Jan Kloetzke <jan.kloetzke@dspg.com> Cc: Andy Fleming <afleming@gmail.com>
* Tegra: mmc: Fixed handling of interrupts in timeouts.Tom Warren2012-02-15-0/+4
| | | | | | | | | | | | | We are seeing occasional timeouts in the Tegra mmc code when we are reading from external MMC cards. These don't seem to be detrimental if they are handled properly. This CL properly clears the "normal interrupt status register" (norintsts) in error conditions. If we don't do this, when we come back into mmc_send_cmd() the register will still contain status from the last transaction. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* omap_hsmmc: Wait for CMDI to be clearTom Rini2012-02-15-2/+3
| | | | | | | | | | | | | | | | | Before we can send a command we need both the DATI (command inhibit on mmc_dat line) bit and CMDI (command inhibit on mmc_cmd line) are clear. The previous behavior of only checking on DATI was insufficient on some cards and incorrect behavior in any case. This makes the code check for both bits being clear and makes the error print more clear as to what happened. DATI_CMDDIS is removed as it was unused elsewhere in the code and stood for 'DATI is set, cmds are disabled still'. Fix originally spotted by Peter Bigot. Tested-by: Peter A. Bigot <bigotp@acm.org> Tested-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Andreas Müller <schnitzeltony@googlemail.com>
* mmc: access mxcmmc from mx31 boardsHelmut Raiger2012-02-12-5/+3
| | | | | | | | | | | | | | | | | This patch modifies mxcmmc.c to be used not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups. The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
* tegra: mmc: Support operation with dcache enabledSimon Glass2012-02-12-0/+16
| | | | | | | | | | | When the data cache is enabled we must flush on write and invalidate on read. We also check that buffers are aligned to data cache lines boundaries. With recent work in U-Boot this should generally be the case but the warnings will catch problems. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* fsl_esdhc: fix PIO mode transfersIra Snyder2012-01-08-1/+2
| | | | | | | | | | | | | | | | The pointer to the registers used to control the Freescale ESDHC MMC controller is not initialized correctly when using PIO mode. This is fixed by initializing the pointer in the same way as all other sites within the driver. Examining the commit history shows that this was broken at introduction due to a code change in upstream U-Boot to support the mx51 processor family. Reported-by: Jim Lentz <JLentz@zhone.com> Cc: Andy Fleming <afleming@freescale.com> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
* mmc: tegra2: Implement card-detect hook.Thierry Reding2012-01-08-19/+13
| | | | | | | | | | On Tegra2, card-detection is implemented by passing the card-detection GPIOs to the MMC driver at initialization time. Instead of implementing the board_mmc_getcd() function, use the card-detect hook and allow boards to override it by providing their own board_mmc_getcd() implementation. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
* mmc: fsl_esdhc: Implement card-detect hook.Thierry Reding2012-01-08-17/+12
| | | | | | | | | | | | | | | | This card-detect hook probably doesn't work. Perhaps somebody with more knowledge about the hardware can comment on this. I think that perhaps even the complete code from esdhc_init() could go into the getcd() function instead or mmc_getcd() needs to be called at some later time after mmc_init(), which, however, would require many other drivers to change. In addition to implementing the hook, this patch also removes the call to the board_mmc_getcd() function which is now called from the MMC framework and is no longer required here. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Jason Liu <jason.hui@linaro.org>
* mmc: Implement card detection.Thierry Reding2012-01-08-0/+31
| | | | | | | | | | | Check for card detect each time an MMC/SD device is initialized. If card detection is not implemented, this code behaves as before and continues assuming a card is present. If no card is detected, has_init is reset for the MMC/SD device (to force initialization next time) and an error is returned. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Jason Liu <jason.hui@linaro.org>
* mmc: Change board_mmc_getcd() function prototype.Thierry Reding2012-01-08-5/+7
| | | | | | | | | | | | | | | | | | | | | The new API no longer uses the extra cd parameter that was used to store the card presence state. Instead, this information is returned via the function's return value. board_mmc_getcd() returns -1 to indicate that no card-detection mechanism is implemented; 0 indicates that no card is present and 1 is returned if it was detected that a card is present. The rationale for this change can be found in the following email thread: http://lists.denx.de/pipermail/u-boot/2011-November/110180.html In summary, the old API was not consistent with the rest of the MMC API which always passes a struct mmc as the first parameter. Furthermore the cd parameter was used to mean "card absence" in some implementations and "card presence" in others. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Jason Liu <jason.hui@linaro.org>
* drivers/mmc/mv_sdhci.c: Fix build warningAnatolij Gustschin2012-01-08-2/+1
| | | | | | | | | | | | | Fix: mv_sdhci.c: In function 'mv_sdh_init': mv_sdhci.c:47:22: warning: the comparison will always evaluate as 'true' for the address of 'mv_sdhci_writeb' will never be NULL [-Waddress] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Lei Wen <leiwen@marvell.com> Cc: Andy Fleming <afleming@freescale.com> Acked-by: Lei Wen <leiwen@marvell.com>
* ftsdc010: improve performance and capabilityMacpaul Lin2012-01-08-85/+103
| | | | | | | | | | This patch improve the performance by spliting flag examination code in ftsdc010_send_cmd() into 3 functions. This patch also reordered the function which made better capability to some high performance cards against to the next version of ftsdc010 hardware. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* mmc: add host_caps checking avoid switch card improperlyMacpaul Lin2012-01-08-0/+10
| | | | | | | | | | | Add a host capability checking to avoid the mmc stack switch the card to HIGHSPEED mode when the card supports HIGHSPEED while the host doesn't. This patch avoid furthur transaction problem when the mmc/sd card runs different mode to the host. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* i.mx: fsl_esdhc: add the i.mx6q supportJason Liu2012-01-08-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmc host controller on the i.mx6q is called usdhc which is redesigned based on the freescale esdhc controller. The usdhc controller is almost compatible with esdhc except it adds one mix register to support debug/SD3.0 and move the low bit 0-6 of XFERTYP register to the mix control reg low bit 0-6. Thus on i.mx6q, we have the following compared with the previous soc: (can refer to RM of chapter 56.3.3) i.mx6q: mix control: bit 31 - bit 7: Added for debug/SD3.0 support bit 6 - bit 0: move in the XFERTYP register bit 6-0 on previous soc XFERTYP register: bit 31 - bit 7: the same as before, bit 6 - bit 0: no-use previous soc mix control: no XFERTYP register: bit 31 - bit 0: xfertype information Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* tegra2: Move tegra2_mmc_init() prototype to public header.Thierry Reding2011-12-24-2/+0
| | | | | | | | | | | | | tegra2_mmc_init() is implemented by the Tegra2 MMC driver. Since most of the Tegra2-based boards will need to call it, this commit exports it in the new public asm/arch/mmc.h header file to prevent each board from providing its own prototype. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* PXA: Kill last remnants of set_GPIO_mode functionMarek Vasut2011-12-19-5/+0
| | | | | | | | GPIO configuration shall never be done inside a driver, never. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* tegra2: Modify MMC driver to handle power and cd GPIOsStephen Warren2011-12-09-7/+39
| | | | | | | | | | | | | | | | | | | | | | | Pass the GPIO numbers for power and card detect to tegra2_mmc_init(), and modify that function to perform all required GPIO initialization. This removes the need for board files to perform these operations. Move board_mmc_getcd() into tegra2_mmc.c now that the driver knows which GPIOs to use. Update affected call-sites in seaboard.c and harmony.c. Note that this change should make all SD ports work on Harmony, since the required GPIO setup is now being performed. v4: Fix prototype of tegra2_mmc_init() in board.h to match driver change. Remove prototype of gpio_config_mmc() from board.h Signed-off-by: Stephen Warren <swarren@nvidia.com> Cc: Andy Fleming <afleming@gmail.com> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]XMarek Vasut2011-12-06-5/+6
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* Revert "mmc: retry the cmd8 to meet 74 clocks requirement in the spec"Macpaul Lin2011-11-25-14/+2
| | | | | | | | | | | | | | | | | | | | This reverts commit 02f3029f1810b99869254d0cf0a71946a008a728. This patch add 3 times retry to CMD8 because the Marvell mmc controller doesn't obey the power ramp up process in the SD specification 6.4.1. (Please refer to figure 6.1 and 6.2 in the specification.) The CMD0 should be send after power ramp up has been finished. However, the Marvell mmc contorller must do power ramp up after the first CMD0 command has been send. This patch also affect existing platforms like Nokia N900 and other platforms. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Acked-by: Lei Wen <leiwen@marvell.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
* mmc: mv_sdhci: Fix host version read for Armada100Ajay Bhargav2011-11-25-1/+4
| | | | | | | | sdhci_readw does not work for host version read in Armada100 series SoCs. This patch fix this issue by making a sdhci_readl call to get host version. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* davinci, mmc: fix gcc 4.6 build warningsHeiko Schocher2011-11-16-4/+3
| | | | | | | | | | | | | | Fix: davinci_mmc.c: In function 'dmmc_wait_fifo_status': davinci_mmc.c:72:7: warning: variable 'mmcstatus1' set but not used [-Wunused-but-set-variable] davinci_mmc.c: In function 'dmmc_busy_wait': davinci_mmc.c:89:7: warning: variable 'mmcstatus1' set but not used [-Wunused-but-set-variable] Delete the unused variable. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-11-16-12/+366
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: arm, davinci: add DAVINCI_MMC_CLKID arm, davinci_emac: fix driver bug if more then 3 PHYs are detected arm, davinci: da850/dm365 lowlevel cleanup omap5: Add omap5_evm board build support. omap4/5: Add support for booting with CH. omap5: emif: Add emif/ddr configurations required for omap5 evm omap5: clocks: Add clocks support for omap5 platform. omap5: Add minimal support for omap5430. omap: Checkpatch fixes omap4: make omap4 code common for future reuse GCC4.6: Squash warnings in onenand_base.c GCC4.6: Fix common/usb.c on xscale OneNAND: Add simple OneNAND SPL PXA: vpac270: Enable the new generic MMC driver PXA: Cleanup serial_pxa PXA: Drop csb226 and innokom boards (unmaintained) m28evk: Fix comment about the number of RAM banks mx31: Fix checkpatch warnings in generic.c mx31: Use proper IO accessor for GPR register mx31: Remove duplicate definition for GPR register qong: Use generic function for configuring GPR register M28EVK: Enable USB HOST support iMX28: Add USB HOST driver iMX28: Add USB and USB PHY register definitions M28: Add memory detection into SPL iMX28: Fix ARM vector handling M28: Add doc/README.m28 documentation M28: Add MMC SPL iMX28: Add support for DENX M28EVK board iMX28: Add u-boot.sb target to Makefile iMX28: Add image header generator tool iMX28: Add driver for internal RTC iMX28: Add GPMI NAND driver iMX28: Add APBH DMA driver iMX28: Add SPI driver iMX28: Add GPIO control iMX28: Add I2C bus driver iMX28: Add PINMUX control FEC: Add support for iMX28 quirks iMX28: Add SSP MMC driver iMX28: Initial support for iMX28 CPU MX25: zmx25: GCC4.6 fix build warnings da850: add new config file for AM18xx BeagleBoard: config: Switch to ttyO2 OMAP3: Change omap3_evm maintainer devkit8000: Fix NAND SPL on boards with 256MB NAND integrator: enable Vpp and disable flash protection integrator: add system controller header integrator: make flash writeable on boot integrator: use io-accessors for board init integrator: move text offset to config integrator: pass configs for core modules ARM: remove superfluous setting of arch_number in board specific code. SPL: Allow ARM926EJS to avoid compiling in the CPU support code integrator: do not test first part of the memory arm: a320: fix broken timer ARM: define CONFIG_MACH_TYPE for all ronetix boards dm646x: pass board revision info to kernel dm646x: add new configuration for dm6467T arm, davinci: Fix setting of the SDRAM configuration register arm, davinci: Remove the duplication of LPSC functions arm, davinci: Rename AM1808 lowlevel functions to DA850 da8xxevm: fix build error ARM: re-add MACH_TYPE_XXXXXX for VCMA9 board and add CONFIG_MACH_TYPE
| * omap: Checkpatch fixesSricharan2011-11-15-12/+14
| | | | | | | | | | | | | | | | | | Fixing them here so that when the files are reused in subsequent patches for omap5, avoids new checkpatch warnings. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * iMX28: Add SSP MMC driverMarek Vasut2011-11-11-0/+352
| | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Acked-by: Andy Fleming <afleming@gmail.com>
* | Tegra2: mmc: Factor out mmc_wait_inhibit functionalityAnton staaf2011-11-12-19/+27
| | | | | | | | | | | | | | | | | | | | | | This is a well encapsulated section of mmc_send_cmd, by moving it to it's own function it increases the readability of mmc_send_cmd. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | Tegra2: mmc: Add data transfer completion timeoutAnton staaf2011-11-12-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently when no expected completion condition occures in the mmc_send_cmd while loop that is waiting for a data transfer to complete the MMC driver just hangs. This patch adds an arbitrary 2 second timeout. If nothing we recognize occures within 2 seconds some diagnostic information is printed and we fail out. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | Tegra2: mmc: Support DMA restarts at buffer boundariesAnton staaf2011-11-12-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently if a DMA buffer straddles a buffer alignment boundary (512KiB) then the DMA engine will pause and generate a DMA interrupt. Since the DMA interrupt is not enabled it will hang the MMC driver. This patch adds support for restarting the DMA transfer. The SYSTEM_ADDRESS register contains the next address that would have been read/written when a boundary is hit. So we can read that and write it back. The write triggers the resumption of the transfer. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | Tegra2: mmc: define register field values in tegra2_mmc.hAnton staaf2011-11-12-27/+85
| | | | | | | | | | | | | | | | | | | | | | | | This moves the magic numbers sprinkled about the MMC driver to a single location in the header file and gives them meaningful names. Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* | MMC: PL180: Fix infinite loop with VExpress extended fifo implementationJon Medhurst (Tixy)2011-11-08-26/+0
|/ | | | | | | | | | | | | | | | | | | The new IO FPGA implementation for Versatile Express contains an MMCI (PL180) cell with the FIFO extended to 128 words. This causes the read_bytes() function to go into an infinite loop; as it will wait for for the half-full signal (SDI_STA_RXFIFOBR) if there are more than 8 words remaining (SDI_FIFO_BURST_SIZE), but it won't receive this signal once there are fewer than 64 words left to transfer. One possible fix is to add some build time configuration to change SDI_FIFO_BURST_SIZE for the new implementation. However, the problematic code only seems to exist as a small performance optimisation, so the solution implemented by this patch is to simply remove it. The error checking following the loop is also removed as this will be handled by code further down the function. Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Jon Medhurst <jon.medhurst@linaro.org>
* tegra2: Move MMC clock initialization into MMC driverStephen Warren2011-11-03-3/+9
| | | | | | | | | | | This centralizes knowledge of MMC clocking into the MMC driver. This also removes clock setup from the board files, which will simplify later changes that modify the Harmony board to support the correct set of MMC controllers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Cc: Andy Fleming <afleming@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* mmc: sdhci: fix sdma bug for large file transferLei Wen2011-11-03-1/+1
| | | | | | | | | SDHCI spec need to reset the sdma base address while the software try to accorss the 512k bytes address boundary. When meet such accross behavior, sdhci controller would generate a interrupt automatically, and software need handle this. Signed-off-by: Lei Wen <leiwen@marvell.com>
* mmc: sdhci: add timeout for data transferLei Wen2011-11-03-1/+8
| | | | Signed-off-by: Lei Wen <leiwen@marvell.com>
* mmc: sdhci: add mmc structure for hostLei Wen2011-11-03-0/+1
| | | | | | | So that sdhci host would tell in the driver that the mmc current attributes. Signed-off-by: Lei Wen <leiwen@marvell.com>
* mmc: sdhci: fix cache flushLei Wen2011-11-03-1/+1
| | | | | | Only flush the memory range needed. Signed-off-by: Lei Wen <leiwen@marvell.com>
* mmc: CMD7:MMC_CMD_SELECT_CARD response fixAjay Bhargav2011-11-03-1/+1
| | | | | | | | | | | | | As per JEDEC document JESD84-A441 (page 105) response for CMD7 (MMC_CMD_SELECT_CARD) response should be R1 instead of R1b. In uboot we never take MMC to disconnected state and on powerup its always ideal state which later goes to stand-by state. from document footnote: R1 while selecting from Stand-By State to Transfer State; R1b while selecting from Disconnected State to Programming State. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* mmc: test mmc bus width on startupLei Wen2011-11-03-18/+26
| | | | | | | | | | | | | | For we don't know mmc bus width from reading registers, the only way to check is to test. Current compare offset is: EXT_CSD_PARTITIONING_SUPPORT EXT_CSD_ERASE_GROUP_DEF EXT_CSD_REV EXT_CSD_HC_ERASE_GRP_SIZE EXT_CSD_SEC_CNT Signed-off-by: Lei Wen <leiwen@marvell.com>
* mmc: change magic number to macro defineLei Wen2011-11-03-9/+12
| | | | | | | | Previous magic number is hard to parse its meaning, change it to respective macro definition Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: WOlfgang Denk <wd@denx.de>
* mmc: mv_sdhci: fix 8bus width access for 88SV331xV5Lei Wen2011-11-03-0/+33
| | | | | | | | | | | | Marvell 88SV331xV5 platform's sdhci host control is not very standard with the spec in the 8bit handling. It need to set its private register to switch to the 8bit mode which is not included in the standard sdhci registers. This patch mainly hacks the writeb method, and set its private register if it find the driver is going to switch to the 8bit mode. Signed-off-by: Lei Wen <leiwen@marvell.com>
* mmc: retry the cmd8 to meet 74 clocks requirement in the specLei Wen2011-11-03-2/+14
| | | | | | | | | | For some controller it has dynamic clock gating, and only toggle out clk when the first cmd0 send out, while some card strictly obey the 74 clocks rule, the interval may not be sufficient between the cmd0 and this cmd8, retry to fulfil the clock requirement. Signed-off-by: Lei Wen <leiwen@marvell.com> Tested-by: Marek Vasut <marek.vasut@gmail.com>
generated by cgit v1.1 at 2024-11-08 19:17:27 +0000