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| * mxs: mmc: Allow overriding default card detect implementationMarek Vasut2013-01-28-2/+14
| | | | | | | | | | | | | | | | | | | | Some MXS based boards do not implement the card-detect signal. Allow user to specify alternate card-detect implementation. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mxs: mmc: Fix MMC reset on iMX23Otavio Salvador2013-01-28-5/+11
| | | | | | | | | | | | | | | | | | | | This does the same reset mask as done in v3.7 Linux kernel code. The block is properly configured for MMC operation that way. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mmc: Limit the number of used SSP ports on MX23Marek Vasut2013-01-21-1/+11
| | | | | | | | | | | | | | | | | | | | The MX23 can only use two SSP ports. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| * mxs: clock: Use 'mxs' prefix for methodsOtavio Salvador2013-01-21-2/+2
| | | | | | | | | | | | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * mxs: ssp: Pull out the SSP bus to regs conversionMarek Vasut2013-01-21-14/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Create function which converts SSP bus number to SSP register pointer. This functionality is reimplemented multiple times in the code, thus make one common implementation. Moreover, make it a switch(), since the SSP ports are not mapped in such nice linear fashion on MX23, therefore having it a switch will simplify things there. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * mxs: mmc: Drop unused members from struct mxsmmc_privMarek Vasut2013-01-21-12/+0
| | | | | | | | | | | | | | | | | | The clock data are not used by the driver, drop them. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* | ppc: arm: Move sdhc_clk into arch_global_dataSimon Glass2013-02-04-3/+3
|/ | | | | | | This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-01-08-1/+1
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| * fsl_esdhc: add MMC_MODE_HC host_capsShawn Guo2013-01-05-1/+1
| | | | | | | | | | | | | | | | All esdhc variants we know should support high capacity MMC cards, so let's add MMC_MODE_HC host_caps unconditionally to support those MMC cards (capacity > 2 GB). Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | Merge branch 'master' of git://git.denx.de/u-boot into resolveMinkyu Kang2012-12-10-65/+153
|\ \ | |/ | | | | | | | | | | | | | | | | | | Conflicts: README board/samsung/universal_c210/universal.c drivers/misc/Makefile drivers/power/power_fsl.c include/configs/mx35pdk.h include/configs/mx53loco.h include/configs/seaboard.h
| * mmc: Properly determine maximum supported bus widthAndy Fleming2012-11-27-12/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At some point, a confusion arose about the use of the bit definitions in host_caps for bus widths, and the value in ext_csd. By coincidence, a simple shift could convert between one and the other: MMC_MODE_1BIT = 0, EXT_CSD_BUS_WIDTH_1 = 0 MMC_MODE_4BIT = 0x100, EXT_CSD_BUS_WIDTH_4 = 1 MMC_MODE_8BIT = 0x200, EXT_CSD_BUS_WIDTH_8 = 2 However, as host_caps is a bitmask of supported things, there is not, in fact, a one-to-one correspondence. host_caps is capable of containing MODE_4BIT | MODE_8BIT, so nonsensical things were happening where we would try to set the bus width to 12. The new code clarifies the very different namespaces: host_caps/card_caps = bitmask (MMC_MODE_*) ext CSD fields are just an index (EXT_CSD_BUS_WIDTH_*) mmc->bus_width integer number of bits (1, 4, 8) We create arrays to map between the namespaces, like in Linux. Signed-off-by: Andy Fleming <afleming@freescale.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * mmc: tegra: use bounce buffer APIsStephen Warren2012-11-27-23/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra's MMC driver does DMA, and hence needs cache-aligned buffers. In some cases (e.g. user load commands) this cannot be guaranteed by callers of the MMC APIs. To solve this, modify the Tegra MMC driver to use the new bounce_buffer_*() APIs. Note: Ideally, all U-Boot code will always provide address- and size- aligned buffers, so a bounce buffer will only ever be needed for user- supplied buffers (e.g. load commands). Ensuring this removes the need for performance-sucking bounce buffer cache management and memcpy()s. The one known exception at present is the SCR buffer in sd_change_freq(), which is only 8 bytes long. Solving this requires enhancing struct mmc_data to know the difference between buffer size and transferred data size, or forcing all callers of mmc_send_cmd() to have allocated buffers using ALLOC_CACHE_ALIGN_BUFFER(), which while true in this case, is not enforced in any way at present, and so cannot be assumed by the core MMC code. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * common: rework bouncebuf implementationStephen Warren2012-11-27-23/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current bouncebuf API requires all parameters to be passed to both bounce_buffer_start() and bounce_buffer_stop(). Modify the bouncebuf start function to accept a state structure as a parameter, and only require that state struct to be passed to the stop function. This simplifies usage of the bounce buffer by clients. Don't modify the data pointer, but rather store the temporary buffer in this state struct. The bouncebuf code ensures that client code can always use a single buffer pointer in the state structure, irrespective of whether a bounce buffer actually had to be allocated. Move cache management logic into the bounce buffer code, so that each client doesn't have to duplicate this. I believe there's no need to invalidate the buffer before a DMA operation, since flushing the cache should prevent any write-backs. Update the MXS MMC driver for this change. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: add no simultaenous power and vddMela Custodio2012-11-27-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bring in the code from Linux kernel. Added to Linux kernel by: commit e08c1694d9e2138204f2b79b73f0f159074ce2f5 Author: Andres Salomon <dilinger@queued.net> Date: Fri Jul 4 10:00:03 2008 -0700 Some HW balks when writing both voltage setting and power up at the same time to SDHCI_POWER_CONTROL register. Signed-off-by: Rommel G Custodio <sessyargc@gmail.com> CC: Andy Fleming <afleming@freescale.com> v2: fix attribution and SOB Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: Fix interpretation of MMC_CMD_ALL_SEND_CIDTaylor Hutt2012-11-27-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | The interpretation of the data returned by the MMC_CMD_ALL_SEND_CID command was incorrect with respect to the JEDEC Standard No. 84-A441. This change makes the interpretation correct with respect to the defined fields of the CID register. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Taylor Hutt <thutt@chromium.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * EXYNOS: mmc: support DesignWare Controller for Samsung-SoCJaehoon Chung2012-11-27-0/+58
| | | | | | | | | | | | | | | | | | Support DesignWare MMC Controller for Samsung Specific. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc: tegra: support 4-bit operation too on 8-bit slotsStephen Warren2012-11-19-3/+4
|/ | | | | | | | | If a board has all 8 data lines routed, the SD/MMC controller can still operate in 4-bit (or presumably even 1-bit) mode. Adjust Tegra's MMC driver to report the 4-bit capability even for 8-bit slots. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-11-05-1/+2
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| * Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD2012-10-27-2/+3
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| | * mxc: Fix SDHC multi-instance clockBenoît Thébaudeau2012-10-16-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On mxc, each SDHC instance has a dedicated clock, so gd->sdhc_clk is not suitable for the multi-instance use case (initialization made directly with fsl_esdhc_initialize()). This patch fixes this issue by adding a configuration field for the SDHC input clock frequency. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Eric Bénard <eric@eukrea.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Jason Liu <r64343@freescale.com> Cc: Matt Sealey <matt@genesi-usa.com> Cc: Andy Fleming <afleming@gmail.com>
* | | drivers/mmc/fsl_esdhc.c: sparse fixesKim Phillips2012-11-04-2/+2
| | | | | | | | | | | | | | | | | | | | | fsl_esdhc.c:71:6: warning: symbol 'esdhc_xfertyp' was not declared. Should it be static? fsl_esdhc.c:413:6: warning: symbol 'set_sysctl' was not declared. Should it be st Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | drivers/mmc/mmc.c: sparse fixesKim Phillips2012-11-04-18/+19
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mmc.c:137:5: warning: symbol 'mmc_send_cmd' was not declared. Should it be static? mmc.c:203:5: warning: symbol 'mmc_send_status' was not declared. Should it be static? mmc.c:247:5: warning: symbol 'mmc_set_blocklen' was not declared. Should it be static? mmc.c:440:5: warning: symbol 'mmc_read_blocks' was not declared. Should it be static? mmc.c:510:5: warning: symbol 'mmc_go_idle' was not declared. Should it be static? mmc.c:532:1: warning: symbol 'sd_send_op_cond' was not declared. Should it be static? mmc.c:597:5: warning: symbol 'mmc_send_op_cond' was not declared. Should it be static? mmc.c:661:5: warning: symbol 'mmc_send_ext_csd' was not declared. Should it be static? mmc.c:683:5: warning: symbol 'mmc_switch' was not declared. Should it be static? mmc.c:705:5: warning: symbol 'mmc_change_freq' was not declared. Should it be static? mmc.c:775:5: warning: symbol 'sd_switch' was not declared. Should it be static? mmc.c:796:5: warning: symbol 'sd_change_freq' was not declared. Should it be static? mmc.c:935:6: warning: symbol 'mmc_set_ios' was not declared. Should it be static? mmc.c:953:6: warning: symbol 'mmc_set_bus_width' was not declared. Should it be static? mmc.c:1108:26: warning: dubious: !x & y mmc.c:960:5: warning: symbol 'mmc_startup' was not declared. Should it be static? mmc.c:1243:5: warning: symbol 'mmc_send_if_cond' was not declared. Should it be s Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Merge remote-tracking branch 'u-boot-atmel/master'Albert ARIBAUD2012-10-26-2/+13
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| * | mmc: at91: use max timeout value. It will avoid some situation that timeout ↵Wu, Josh2012-10-17-2/+2
| | | | | | | | | | | | | | | | | | | | | happened. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | mmc: at91: add multi block read/write support.Wu, Josh2012-10-17-0/+11
| |/ | | | | | | | | | | | | Since the at91sam9263, the mmc hardware support multi blocks read/write. So this driver enable it. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | mmc: dw-mmc: support DesignWare MMC ControllerJaehoon Chung2012-10-22-0/+386
| | | | | | | | | | | | | | | | | | Support the DesginWare MMC Controller. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc: pxa: Remove the old non-generic PXA MMC driverMarek Vasut2012-10-22-644/+0
| | | | | | | | | | | | | | | | | | This driver is no longer used and it's remaining users were converted to the new generic PXA MMC driver. Thus, remove this driver. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc: sdhci: Add a quirk to add delay during completion of sdhci_send_cmdTushar Behera2012-10-22-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MMC host controller requires a delay between every sdhci_send_cmd() execution. In s5p_mmc driver (s5p_sdhci replaces this driver), a delay of 1000us was provided after every mmc_send_cmd() call. Adding a quirk in current sdhci driver to replicate the behaviour. Without this delay, MMC initialization on Origen board fails with following error messages. Timeout for status update! mmc fail to send stop cmd Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc: sdhci: add the DMA select for SDMAJaehoon Chung2012-10-22-0/+7
| | | | | | | | | | | | | | | | | | | | In host-control register, DMA select bit field is present. BUt in sdhci.c, didn't select for DMA. if set CONFIG_MMC_SDMA, we need to set SDMA-select bit. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc: sdhci: increase the timeout value for data transferJaehoon Chung2012-10-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Timeout value is tunable. When run read/write operation, sometime returned the timeout error. Because the timeout value is too short. So increased the enough timeout value. (This timeout value is used to prevent the infinite loop.) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc: Fix mmc_spi error on cmd->flags fieldMarek Vasut2012-10-22-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The recent removal of the cmd->flags field caused error in the debuging code of mmc_spi. Fix this: mmc_spi.c: In function 'mmc_spi_request': mmc_spi.c:179:2: error: 'struct mmc_cmd' has no member named 'flags' Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | MMC: Remove the MMC bounce bufferMarek Vasut2012-10-22-92/+0
| | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Fabio Estevam <festevam@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | MMC: MXS: Convert MXS MMC driver to generic bounce bufferMarek Vasut2012-10-22-13/+23
|/ | | | | | | | | | | Implement necessary code to use the generic bounce buffer routines inside this driver. This replaces the MMC bounce buffer, which is to be removed. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Andy Fleming <afleming@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Tegra20: Move some include files to arch-tegra for sharing with Tegra30Tom Warren2012-10-15-3/+3
| | | | | | | | | | | The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file. All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK. Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: SPL: Convert davinci to CONFIG_SPL_FRAMEWORKTom Rini2012-09-27-65/+0
| | | | | | | | - Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs. - Remove duplicated code. - Add spl_boot_device() that returns the statically chosen boot device. Signed-off-by: Tom Rini <trini@ti.com>
* SPL: Move the omap SPL framework to common/splTom Rini2012-09-27-1/+140
| | | | | | | | | | | | | Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL framework, enable on all of the previously using boards. We move the spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/. We leave the NAND one in-place as we plan to replace it later in this series. We use common/spl to avoid linker problems with respect to merging constant strings in objects. Otherwise all strings in common/ will be linked in and kept which grows SPL in size too much. Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-09-21-148/+21
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| * Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD2012-09-21-0/+4
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| | * MX28: MMC: Avoid DMA DCache race conditionMarek Vasut2012-09-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch prevents dcache-related problem. The problem manifested itself on the SPI driver, this is just a port to the MMC driver. The scenario is the same. In case an "mmc read" is issued to a buffer which was written right before it and data cache is enabled, the cache eviction might happen during the DMA transfer into the buffer, therefore corrupting the buffer. Clear any cache lines that might contain the buffer to prevent such issue. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| * | Tegra: Change Tegra20 to Tegra in common code, prep for T30Tom Warren2012-09-10-148/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate. Convert tegra20_ source file and function names to tegra_, also. Upcoming Tegra30 port will use common code/defines/names where possible. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
| * | mmc: detect boot sectors using EXT_CSD_BOOT_MULT tooStephen Warren2012-09-07-1/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set. Note that the Linux kernel enables access to boot partitions solely based on the value of EXT_CSD_BOOT_MULT; EXT_CSD_PARTITIONING_SUPPORT only influences access to "general" partitions. eMMC devices affected by this issue exist on various NVIDIA Tegra platforms (and presumably many others too), such as Harmony (plug-in eMMC), Seaboard, Springbank, and Whistler (plug-in eMMC). Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | mmc: Remove incorrect cmd->flags usageAndy Fleming2012-09-06-4/+6
| | | | | | | | | | | | | | | | | | | | There were a couple of drivers that were actually using the flags field of the cmd structure, despite the fact that no one ever *set* that field. When we removed the field, those drivers failed to compile. Replaced the references with the correct usage of resp_type. Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc: s5p_sdhci: add the set_mmc_clk for cmu controlJaehoon Chung2012-09-05-0/+6
| | | | | | | | | | | | | | | | Samsung SoC use the cmu control to set clock. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc: s5p_sdhci: fixed wrong function argumentJaehoon Chung2012-09-05-3/+2
| | | | | | | | | | | | | | | | | | | | Useless code is removed, and get buswidth value. buswidth value will be used to choice the 4bit or 8bit. (Now used 4bit mode in sdhci.c by default) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc: s5p_sdhci: set the SDHCI_QUIRK_BROKEN_R1BJaehoon Chung2012-09-05-6/+4
| | | | | | | | | | | | | | | | | | | | Samsung SoC is broken busy waiting for R1b type. And clk delay control value is modified the previosuly value. (that value used at the s5p_mmc.c) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc: Add a SDHCI quirk for boards that have no CDJoe Hershberger2012-09-05-2/+15
| | | | | | | | | | | | | | | | Some boards have no Card Detect wired. In that case, set the CD test bits in the standard interface. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc: Fix version check for clock API in sdhci driverJoe Hershberger2012-09-05-5/+5
| | | | | | | | | | | | | | | | | | | | When setting up the clocks in the sdhci driver, the "spec version" must be masked off. Otherwise any time the vendor version is not 0, the check will allways assume the interface is version 3. This breaks when the interface is actually version 1 or 2. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc_get_dev: Return error if mmc_init failsBenoît Thébaudeau2012-09-05-2/+1
| | | | | | | | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mmc: detect boot sectors using EXT_CSD_BOOT_MULT tooStephen Warren2012-09-05-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some eMMC devices contain boot partitions, but do not set the PART_SUPPORT bit in EXT_CSD_PARTITIONING_SUPPORT. Allow partition selection on such devices, by enabling partition switching when EXT_CSD_BOOT_MULT is set. Note that the Linux kernel enables access to boot partitions solely based on the value of EXT_CSD_BOOT_MULT; EXT_CSD_PARTITIONING_SUPPORT only influences access to "general" partitions. eMMC devices affected by this issue exist on various NVIDIA Tegra platforms (and presumably many others too), such as Harmony (plug-in eMMC), Seaboard, Springbank, and Whistler (plug-in eMMC). Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | MMC: u-boot-spl may be compiled without partition supportMikhail Kshevetskiy2012-09-05-0/+2
| | | | | | | | | | Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-11-01 04:26:56 +0000