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* | mmc: Protect `mmc_initialize` from initialising mmc multiple timesDaniel Kochmański2015-07-24-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | `mmc_initialize` might be called multiple times leading to the mmc-controllers being initialised twice, and initialising the `mmc_devices` list head twice which may lead to memory leaks. Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu> CC: Roy Spliet <r.spliet@ultimaker.com> Cc: Ian Campbell <ijc@hellion.org.uk> CC: Pantelis Antoniou <panto@antoniou-consulting.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | dm: test: Add a test for the mmc uclassSimon Glass2015-07-21-0/+26
| | | | | | | | | | | | | | Add a test to confirm that we can probe this device. Since there is no MMC stack support in sandbox at present, this is as far as the test goes. Signed-off-by: Simon Glass <sjg@chromium.org>
* | mmc: Add debug() output on read errorsSimon Glass2015-07-21-2/+6
| | | | | | | | | | | | Allow read errors to be diagnosed more easily. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: mmc: Add an MMC uclassSimon Glass2015-07-21-0/+48
|/ | | | | | | Add basic support for MMC, providing a uclass which can set up an MMC device. This allows MMC drivers to move to using driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
* mmc: sdhci.c: Add config option to use a fixed buffer for transfersStefan Roese2015-07-10-0/+15
| | | | | | | | | | | | | | | | | | | | While implementing SDIO/MMC SPL booting for the Marvell Armada 38x, the following problem occured. The SPL runs in internal SRAM which is the L2 cache locked to memory. When the MMC buffers now are located on the stack (or bss), the SDIO controller (SDHCI) can't write into this L2 cache memory. This patch introduces a method to use a fixed buffer that will be used for all transfers by defining CONFIG_FIXED_SDHCI_ALIGNED_BUFFER. This way, the board can use this buffer address located in SDRAM for all transfers. This solves this SPL problem on the A38x and should only be used in the SPL U-Boot version. Tested for SPL booting on Marvell Armada 38x DB-88F6820-GP board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
* mmc: sdhci: Use timer based timeout detection in sdhci_send_command()Stefan Roese2015-07-10-5/+5
| | | | | | | | | | | | | The loop counter based timeout detection does not work on the Armada 38x based board (DB-88F6820-GP). At least with dcache enabled a timeout is detected. Without dcache enabled, the timeout does not occur. Increasing the loop counter solves this issue. But a better solution is to use a timer based timeout detection instead. This patch now implements this timer based detection. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
* mmc: bcm2835_sdhci: Restore original delay behaviorMarek Vasut2015-06-25-2/+2
| | | | | | | | | | | | | | | | | | Patch 33fe2fb8df01647f97a7bce96a1c7781a7f6d253 titled "mmc: bcm283x: Remove get_timer_us() from mmc driver" incorrectly replaced ad-hoc get_timer_us() function with a plain get_timer(). The get_timer() operates in mSec units instead of uSec though, which caused very slow operation of the driver. Restore the original behavior of the driver, but avoid get_timer_us() and use timer_get_us() instead. The later is part of the standard API. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Jakub Kiciński <moorray3@wp.pl> Cc: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Jakub Kicinski <kubakici@wp.pl>
* mmc_write.c: Make mmc_berase do 32bit safe 64bit mathTom Rini2015-06-18-1/+11
| | | | | | | | | | | | | | We want to see if the requested start or total block count are unaligned. We discard the whole numbers and only care about the remainder. Update the code to use div_u64_rem here and add a comment. Cc: Hans de Goede <hdegoede@redhat.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Reported-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Bernhard Nortmann <bernhard.nortmann@web.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: mmc: Enable pull-up on card-detect gpio pinHans de Goede2015-06-04-1/+3
| | | | | | | On some boards we need to enable the internal pull-up te reliable detect that no card is inserted. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* Merge git://git.denx.de/u-boot-mpc85xxTom Rini2015-05-05-1/+87
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| * mmc: fsl_esdhc: Add peripheral clock supportYangbo Lu2015-05-04-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | The SD clock could be generated by platform clock or peripheral clock for some platforms. This patch adds peripheral clock support for T1024/T1040/T2080. To enable it, define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * mmc: fsl_esdhc: Add adapter card type identification supportYangbo Lu2015-05-04-1/+46
| | | | | | | | | | | | | | | | | | | | | | | | Add adapter card type identification support by reading FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function, define CONFIG_FSL_ESDHC_ADAPTER_IDENT. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> [York Sun: resolve conflicts in README.fsl-esdhc] Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2015-05-05-69/+74
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| * | ARM: mmc: bcm283x: Remove get_timer_us() from mmc driverMarek Vasut2015-05-05-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The get_timer_us() function is something which is no longer existing in case we use generic timer framework, so replace it with get_timer(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tyler Baker <tyler.baker@linaro.org>
| * | tegra: mmc: Set the removable flag correctlySimon Glass2015-05-05-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | If the mmc device is non-removable (as indicated by the device tree), set the flag so that users of the device know. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
| * | mmc: bcm2835_sdhci: Use calloc to allocate bcm2835_sdhci_hostAlexander Stein2015-05-05-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | We need to clear the allocated memory explicitly as the included struct sdhci_host has function pointers. Those are compared to NULL to test if this (optional) feature is supported. Leaving them undefined let u-boot jump to arbitrary memory. Signed-off-by: Alexander Stein <alexanders83@web.de>
| * | mmc: fsl_esdhc: update eMMC44 adapter card erase timeoutYangbo Lu2015-05-05-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Freescale eMMC44 adapter card uses Micron N2M400FDB311A3CF eMMC memory. According to the silicon datasheet, secure erase timeout is 600ms. So increase erase timeout value from 250ms to 600ms. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Cc: York Sun <yorksun@freescale.com>
| * | mmc: sdhci: add timeout setting for response busy commandKevin Liu2015-05-05-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Timeout interrupt also work for response busy command(R1b) like cmd38/cmd6. So need to set it accordingly. Current code only set timeout for data command. Signed-off-by: Kevin Liu <kliu5@marvell.com> Signed-off-by: Rob Herring <robh@kernel.org> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
| * | mmc: remove the MMC_MODE_HC flagRob Herring2015-05-05-20/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | High capacity support is not a host capability, but a device capability that is queried via the OCR. The flag in the operating conditions request argument can just be set unconditionally. This matches the Linux implementation. [panto] Hand merged and renumbering MMC_MODE_DDR_52MHz. Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com>
| * | mmc: Fix splitting device initializationAndrew Gabbasov2015-05-05-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting part of device initialization sets the init_in_progress flag only if the MMC card did not yet come to ready state and needs to continue polling. If the card is SD or if the MMC card became ready quickly, the flag is not set and (if using pre-initialization) the starting phase will be re-executed from mmc_init function. Set the init_in_progress flag in all non-error cases. Also, move flags setting statements around so that the flags are not set in error paths. Also, IN_PROGRESS return status becomes unnecessary, so get rid of it. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
| * | mmc: Restructure polling loops to avoid extra delaysAndrew Gabbasov2015-05-05-10/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The polling loops in sd_send_op_cond and mmc_complete_op_cond functions check the ready flag state at the end of the loop, that is after executing a delay inside the loop, which, in case of exiting with no error, is not needed. Also, one of these loops, as well as the loop in mmc_send_status, have the delay just before exiting on timeout conditions. Restructure all these loops to check the respective conditions before making a delay for the next loop pass, and to appropriately exit without the delay. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
| * | mmc: Continue polling MMC card for OCR only if it is still not readyAndrew Gabbasov2015-05-05-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some MMC cards come to ready state quite quickly, so that the respective flag appears to be set in mmc_send_op_cond already. In this case trying to continue polling the card with CMD1 in mmc_complete_op_cond is incorrect and may lead to unpredictable results. So check the flag before polling and skip it appropriately. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
| * | mmc: Do not pass external mmc_cmd structure to mmc_send_op_cond_iter()Andrew Gabbasov2015-05-05-13/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous change to use 'ocr' structure field for storing send_op_cond command response also stopped using command response directly outside of mmc_send_op_cond_iter(). Now it becomes possible to use command structure in mmc_send_op_cond_iter() locally, removing a necessity to pass it as an argument from the caller. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
| * | mmc: Avoid extra duplicate entry in mmc device structureAndrew Gabbasov2015-05-05-6/+7
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The 'op_cond_response' field in mmc structure contains the response from the last SEND_OP_COND MMC command while making iterational polling of the card. Later it is copied to 'ocr' field, designed to contain the OCR register value, which is actually the same response from the same command. So, these fields have actually the same data, just in different time periods. It's easier to use the same 'ocr' field in both cases at once, without temporary using of the 'op_cond_response' field. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
* | sunxi: mmc: Fix card-detect gpio handling to work with the driver-modelHans de Goede2015-05-04-3/+4
| | | | | | | | | | | | | | | | | | The driver-model gpio functions may return another value then -1 as error, make the sunxi mmc code properly handle this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | sunxi: Introduce a hidden SUNXI_GEN_SUNxI Kconfig boolHans de Goede2015-05-04-2/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i have a various things in common, like having separate ahb reset control registers, the SID living inside the pmic, custom pmic busses, new style watchdog, etc. This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool which can be used to check for these features avoiding the need for an ever growing list of "#if defined CONFIG_MACH_SUN?I" conditionals as we add support for more "new style" sunxi SoCs. Note that this commit changes the behavior of the gmac and hdmi code for sun8i and the upcoming sun9i devices. This does not matter as sun8i does not have gmac nor hdmi, and sun9i has new hardware-blocks for these so the old code will not work there. Also this is intentional as if a sun8i / sun9i variant which does use the old hwblocks shows up then the GEN_SUN6I code paths will be the right ones to use. For completeness this also adds a SUNXI_GEN_SUN4I bool for A10/A13/A20. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* zynqmp: sdhci: Remove the quirk SDHCI_QUIRK_NO_CDSiva Durga Prasad Paladugu2015-04-29-1/+1
| | | | | | | | Remove the quirk SDHCI_QUIRK_NO_CD as it is not required. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ls2085a: esdhc: Add esdhc support for ls2085aYangbo Lu2015-04-23-2/+34
| | | | | | | This patch adds esdhc support for ls2085a. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
* ARM: bcm283x: move SoC headers to mach-bcm283x/include/machMasahiro Yamada2015-03-28-2/+2
| | | | | | | | Move arch/arm/include/asm/arch-bcm283x/* -> arch/arm/mach-bcm283x/include/mach/* Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* mv_sdhci: fix warnings on 64-bit buildsRob Herring2015-03-18-2/+2
| | | | | | | | Change addresses to unsigned long to be compatible with 64-bit builds. Regardless of fixing warnings, the device is still only 32-bit capable. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
* sdhci: fix warnings on 64-bit buildsRob Herring2015-03-18-3/+3
| | | | | | | | Change addresses to unsigned long to be compatible with 64-bit builds. Regardless of fixing warnings, the device is still only 32-bit capable. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
* mmc: sdhci: don't clobber adjacent registersMatt Reimer2015-03-18-1/+1
| | | | | | | | SDHCI_HOST_CONTROL is a byte-sized register, so don't write to it as if it were a long, as that would result in clobbering the three registers following. Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
* mmc: s5p: properly mask SELBASECLKMatt Reimer2015-03-18-1/+1
| | | | | | | | Properly mask SELBASECLK by using an actual mask rather than the number of bits to shift in order to create the mask. Signed-off-by: Matt Reimer <mreimer@sdgsystems.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
* mmc: fsl_esdhc fix register offsetPeng Fan2015-03-17-1/+1
| | | | | | | | | | Commit f022d36e8a4517b2a9d25ff2d75bd2459d0c68b1 introduces error register offset. Change the "char reserved3[59]" to "char reserved3[56]". Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2015-03-02-21/+77
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| * mmc: fsl_esdhc: Add support for DDR modeVolodymyr Riazantsev2015-02-24-2/+6
| | | | | | | | | | | | | | | | Add support of the DDR mode for eSDHC driver. Enable it for i.MX6 SoC family only. Signed-off-by: Volodymyr Riazantsev <volodymyr.riazantsev@globallogic.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * mmc: sdhci: fix bus width switching on Samsung SoCsMatt Reimer2015-02-23-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Fix bus width switching from 8-bit mode down to 4-bit or 1-bit modes on Samsung SoCs using SDHCI_QUIRK_USE_WIDE8. These SoCs report controller version 2.0 yet they support 8-bit bus widths. If 8-bit mode was previously enabled and then an operation like "mmc dev" caused a switch back down to 4-bit or 1-bit mode, WIDE8 was left set, causing failures. This problem was manifested by "mmc dev" timing out. Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
| * mmc: print SD/eMMC type for inited mmc devicesPrzemyslaw Marczak2015-02-23-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | Depending on the boot priority, the eMMC/SD cards, can be initialized with the same numbers for each boot. To be sure which mmc device is SD and which is eMMC, this info is printed by 'mmc list' command, when the init is done. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: exynos dwmmc: check boot mode before init dwmmcPrzemyslaw Marczak2015-02-23-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, the mmc devices were always registered in the same order. So dwmmc channel 0 was registered as mmc 0, channel 1 as mmc 1, etc. In case of possibility to boot from more then one device, the CONFIG_SYS_MMC_ENV_DEV should always point to right mmc device. This can be achieved by init boot device as first, so it will be always registered as mmc 0. Thanks to this, the 'saveenv' command will work fine for all mmc boot devices. Exynos based boards usually uses mmc host channels configuration: - 0, or 0+1 for 8 bit - as a default boot device (usually eMMC) - 2 for 4bit - as an optional boot device (usually SD card slot) And usually the boot order is defined by OM pin configuration, which can be changed in a few ways, eg. - Odroid U3 - eMMC card insertion -> first boot from eMMC - Odroid X2/XU3 - boot priority jumper By this commit, Exynos dwmmc driver will check the OM pin configuration, and then try to init the boot device and register it as mmc 0. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Cc: Akshay Saraswat <akshay.s@samsung.com>
| * sunxi: mmc: Always declare High Capacity capabilityHans de Goede2015-02-23-5/+1
| | | | | | | | | | | | | | | | | | High Capacity (e)MMC cards work fine on sun4i / sun5i, and not having this capability set causes u-boot to not recognize the eMMC on an Utoo P66 A13 tablet, so always set it thereby fixing this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * mmc: exynos_dw_mmc: use the exynos specific data structureJaehoon Chung2015-02-23-13/+47
| | | | | | | | | | | | | | | | Clksel value is exynos specific value. It removed "clksel_val" into dwmci_host and created the "dwmci_exynos_priv_data" structure for exynos specific data. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * mmc: exynos_dw_mmc: set to clksel_val into board-init functionJaehoon Chung2015-02-23-0/+4
| | | | | | | | | | | | | | | | | | "clksel_val" is assigned to property of mmc or defined value. But it doesn't write at initial sequence. There is a reason that get the wrong source-clock value. This patch fixed it. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * mmc: dw_mmc: fixed the wrong bit controlJaehoon Chung2015-02-23-1/+1
| | | | | | | | | | | | If mode is not DDR-mode, then it needs to clear it. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
* | mmc: fsl_esdhc: Add support to force VSELECT setOtavio Salvador2015-02-23-0/+4
| | | | | | | | | | | | | | | | | | Some boards cannot do voltage negotiation but need to set the VSELECT bit forcely to ensure it to work at 1.8V. This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* | mmc: fsl_esdhc: Add CMD11 support to switch to 1.8VOtavio Salvador2015-02-23-7/+22
|/ | | | | | | This adds support to switch to 1.8V in case CMD11 succeeds. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Reviewed-by: Marek Vasut <marex@denx.de>
* x86: mmc: Move common FSP functions into a common fileSimon Glass2015-02-06-0/+43
| | | | | | | | | | | | Since these board functions seem to be the same for all boards which use FSP, move them into a common file. We can adjust this later if future FSPs need more flexibility. This creates a generic PCI MMC device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2015-02-02-0/+4
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| * omap3: mmc: add 1.8v bias setting for MMC1Albert ARIBAUD \(3ADEV\)2015-01-29-0/+4
| | | | | | | | Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2015-02-02-7/+7
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| * | sunxi: mmc: Add 'sunxi_' prefix to the static functionsSiarhei Siamashka2015-02-02-7/+7
| |/ | | | | | | | | | | | | | | | | | | This results in a much more readable callgraph, because now they can't be confused with the function having exactly the same name in the generic mmc code. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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