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* Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2016-02-02-3/+12
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| * mmc: atmel: Properly fix clock configurationGregory CLEMENT2016-01-27-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Timing issue occurs on eMMC not only when modifying the frequency but also for all the switch command(CMD6). According to the MMC spec waiting 8 clocks after a switch command would be the thing to do. This patch allows fixing CPU hang observed when trying to changing the bus width on a eMMC on SAMA5D4. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Tested-by: Marek Vasut <marex@denx.de> # on DENX MA5D4EV Acked-by: Marek Vasut <marex@denx.de> Tested-by: Andreas Bießmann <andreas.devel@googlemail.com> # on atngw100 Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> [fixed minor checkpatch warning] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | drivers: mmc: add driver for Microchip PIC32 SDHCI controller.Andrei Pistirica2016-02-01-1/+72
| | | | | | | | | | | | | | | | | | | | | | This driver implements platform specific glue and fixups for PIC32 internal SDHCI controller. Signed-off-by: Andrei Pistirica <andrei.pistirica@microchip.com> Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-01-27-5/+9
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| * | mmc: fsl_esdhc: set Abort command type for CMD12Yangbo Lu2016-01-27-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | According to SD spec, CMD12, CMD52 for writing I/O abort in CCCR need to be set an Abort command type when they are sent. So, we remove all chip-specific #ifdefs and make it available for all platforms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | mmc: fsl_esdhc: increase data transaction timeout to 500msYangbo Lu2016-01-27-1/+8
| |/ | | | | | | | | | | | | | | | | | | The MMC spec says "It is strongly recommended for hosts to implement more than 500ms timeout value even if the card indicates the 250ms maximum busy length." Even the previous value of 300ms is known to be insufficient for some cards. So, increase the timeout to 500ms. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | mmc: zynq_sdhci: Added qurik to disable high speedSiva Durga Prasad Paladugu2016-01-27-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add quirk to disable high speed incase the high speed was broken.This solves the issue where the the controller is used in High Speed Mode and the the hold time requirement for the JEDEC/MMC 4.41 specification is NOT met. This timing issue is not on all boards and hence provided config option to enable it when required. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Emil Lenchak <emill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | mmc: sdhci: Clear high speed if not supportedSiva Durga Prasad Paladugu2016-01-27-0/+4
| | | | | | | | | | | | | | | | | | Clear high speed bit if it was not supported by the driver. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Emil Lenchak <emill@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | sdhci: zynq: Remove hardcoded value zero as min frequencySiva Durga Prasad Paladugu2016-01-27-1/+6
|/ | | | | | | | | Remove hardcoded value zero as min frequency and use config option CONFIG_ZYNQ_SDHCI_MIN_FREQ defined in board config Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* rockchip: Use a separate clock ID for clocksSimon Glass2016-01-21-8/+5
| | | | | | | | | | At present we use the same peripheral ID for clocks and pinctrl. While this works it is probably better to use the device tree clock binding ID for clocks. We can use the clk_get_by_index() function to find this. Update the clock drivers and the code that uses them. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: mmc: Use a pwrseq device if availableSimon Glass2016-01-21-0/+47
| | | | | | | Use the pwrseq uclass to find a suitable power sequence for the MMC device. If this is enabled in the device tree, we will pick it up automatically. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: mmc: Try to honour the sequence orderSimon Glass2016-01-20-5/+15
| | | | | | | | | | | | At present we add driver-model MMC devices in the order we find them. The 'alias' order is not honoured. It is difficult to fix this for the case where we have holes in the sequence. But for the common case where the devices are numbered from 0 without any gaps, we can add the devices to the internal data structures in this order. Signed-off-by: Simon Glass <sjg@chromium.org>
* Add more SPDX-License-Identifier tagsTom Rini2016-01-19-7/+2
| | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
* mmc: rockchip: the non-removable property must point to emmchuang lin2016-01-15-0/+2
| | | | | | | | | the non-removable property point to sdcard before, it is wrong, it must point to emmc, correct it. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* mmc: store hwpart in the block deviceStephen Warren2016-01-13-6/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This will allow us to have multiple block device structs each referring to the same eMMC device, yet different HW partitions. For now, there is still a single block device per eMMC device. As before, this block device always accesses whichever HW partition was most recently selected. Clients wishing to make use of multiple block devices referring to different HW partitions can simply take a copy of this block device once it points at the correct HW partition, and use each one as they wish. This feature will be used by the next patch. In the future, perhaps get_device() could be enhanced to return a dynamically allocated block device struct, to avoid the client needing to copy it in order to maintain multiple block devices. However, this would require all users to be updated to free those block device structs at some point, which is rather a large change. Most callers of mmc_switch_part() wish to permanently switch the default MMC block device's HW partition. Enhance mmc_switch_part() so that it does this. This removes the need for callers to do this. However, common/env_mmc.c needs to save and restore the current HW partition. Make it do this more explicitly. Replace use of mmc_switch_part() with mmc_select_hwpart() in order to remove duplicate code that skips the call if that HW partition is already selected. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* block: pass block dev not num to read/write/erase()Stephen Warren2016-01-13-14/+23
| | | | | | | | | | | This will allow the implementation to make use of data in the block_dev structure beyond the base device number. This will be useful so that eMMC block devices can encompass the HW partition ID rather than treating this out-of-band. Equally, the existence of the priv field is crying out for this patch to exist. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* dm: Convert PCI MMC over to use DM PCI APISimon Glass2016-01-12-8/+7
| | | | | | | | | | | | | | At present pci_mmc_init() does not correctly use the PCI function since the list it passes is not terminated. The array size passed to pci_mmc_init() is actually not used correctly. Fix this and adjust the pci_mmc_init() to scan all available MMC devices. Adjust this code to use the new driver model PCI API. This should move over to the new MMC uclass at some point. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* mmc: update MMC_ERASE argument to match Linux kernel.Eric Nelson2016-01-04-1/+1
| | | | | | | | | | | | | | | | | | | Table 41 of the JEDEC standard for eMMC says that bit 31 of the command argument is obsolete when issuing the ERASE command (CMD38) on page 115 of this document: http://www.jedec.org/sites/default/files/docs/jesd84-B45.pdf The SD Card Association Physical Layer Simplified Specification also makes no mention of the use of bit 31. https://www.sdcard.org/downloads/pls/part1_410.pdf The Linux kernel distinguishes between secure (bit 31 set) and non-secure erase, and this patch copies the macro names from include/linux/mmc/core.h. Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Eric Nelson <eric@nelint.com> Tested-by: Hector Palacios <hector.palacios@digi.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-03-2/+13
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| * ARM: imx: fsl_esdhc: fix usage of low 4 bits of sysctl registerEric Nelson2016-01-03-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The low four bits of the SYSCTL register are reserved on the USDHC controller on i.MX6 and i.MX7 processors, but are used for clocking operations on earlier models. Guard against their usage by hiding the bit mask macros on those processors. These bits are used to prevent glitches when changing clocks on i.MX35 et al. Use the RSTA bit instead for i.MX6 and i.MX7. >From the i.MX6DQ RM: To prevent possible glitch on the card clock, clear the FRC_SDCLK_ON bit when changing clock divisor value(SDCLKFS or DVS in System Control Register) or setting RSTA bit. Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Hector Palacios <hector.palacios@digi.com>
* | arm: socfpga: fix up a questionable macro for SDMMCDinh Nguyen2015-12-20-2/+3
| | | | | | | | | | | | | | | | Move the macro into the socfpga_dwmci_clksel(). Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Marek Vasut <marex@denx.de> [fix parenthesis in the sdmmc_mask]
* | mmc: mmc: Don't use sprintf when using tiny-printfSjoerd Simons2015-12-13-1/+3
| | | | | | | | | | | | | | There is no sprintf implementation in tiny-printf, so don't try to use it when tiny-printf if used. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
* | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-12-07-37/+30
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| * | zynq: sdhci: Move driver to DMMichal Simek2015-12-07-12/+32
| | | | | | | | | | | | | | | | | | | | | Move driver to DM Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | zynq: sdhci: Remove zynq_sdhci_of_init()Michal Simek2015-12-07-27/+0
| | | | | | | | | | | | | | | | | | Prepare for using DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | zynq: sdhci: Calculate minimum frequency based on max frequencySiva Durga Prasad Paladugu2015-12-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Calculate the minimum sd clock based on max clock. This will be done by add_sdhci() if we pass minimum clock as zero. It also does based on SD host contoller version. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | mmc: dwmmc: socfpga: Convert to DMMarek Vasut2015-12-07-76/+60
|/ / | | | | | | | | | | | | | | | | | | | | Convert the SoCFPGA shim for registering the DWMMC driver to DM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
* | rockchip: mmc: get the fifo mode and fifo depth property from dtshuang lin2015-12-01-4/+17
| | | | | | | | | | | | | | | | rk3036 mmc do not have internal dma, so we use fifo mode when read and write data, we get the fifo mode and fifo depth property from dts, pass to dw_mmc driver. Signed-off-by: Lin Huang <hl@rock-chips.com>
* | rockchip: mmc: use non-removable property to distinguish emmc and sdcard ↵huang lin2015-12-01-2/+3
| | | | | | | | | | | | | | | | | | | | register emmc and sdcard have different register address, use non-removeable property to distinguish them. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | mmc: dw_mmc: support fifo mode in dwc mmc driverhuang lin2015-12-01-18/+67
| | | | | | | | | | | | | | | | some soc(rk3036 etc) use dw_mmc but do not have internal dma, so we implement fifo mode to read and write data. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | mmc: dw_mmc: move data transfer as a separate functionhuang lin2015-12-01-28/+37
| | | | | | | | | | | | | | | | the data transfer seem to long in the dwmci_send_cmd function, so move this block as a separate funciton. Signed-off-by: Lin Huang <hl@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* | mmc: socfpga_dw_mmc: Move drvsel and smplsel to dtsChin Liang See2015-11-30-8/+21
|/ | | | | | | | | | | | | | | | | socfpga_dw_mmc driver will obtain the drvsel and smplsel value from device tree instead of definition in config header file. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Marek Vasut <marex@denx.de>
* zynq: sdhci: Define max clock by macroMichal Simek2015-11-19-1/+1
| | | | | | | zc1571 with silicon can operate on 200MHz maximum frequency. Setup this frequency by default and fix setting for ep108. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* driver: dwmmc: Fix pointer conversion warnings for hikeyPrabhakar Kushwaha2015-11-12-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix below compilation warings happening for hikey_defconfig drivers/mmc/dw_mmc.c: In function ‘dwmci_set_idma_desc’: drivers/mmc/dw_mmc.c:43:20: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] desc->next_addr = (unsigned int)desc + sizeof(struct dwmci_idmac); ^ drivers/mmc/dw_mmc.c: In function ‘dwmci_prepare_data’: drivers/mmc/dw_mmc.c:61:35: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] dwmci_writel(host, DWMCI_DBADDR, (unsigned int)cur_idmac); ^ drivers/mmc/dw_mmc.c:73:9: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] (u32)bounce_buffer + (i * PAGE_SIZE)); ^ CC drivers/mmc/hi6220_dw_mmc.o drivers/mmc/hi6220_dw_mmc.c: In function ‘hi6220_dwmci_add_port’: drivers/mmc/hi6220_dw_mmc.c:51:17: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] host->ioaddr = (void *)regbase; Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* Merge git://git.denx.de/u-boot-samsungTom Rini2015-11-05-7/+7
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| * s5p sdhci: call pinmux for card's gpio pins before use themPrzemyslaw Marczak2015-11-02-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SD card detection depends on checking one pin state. But the pin was configured after card was detected, which is wrong. This commit fixes this, by moving call to pinmux before use the pin. Tested-on: Odroid U3 and Odroid X2. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | mmc: atmel: Add atmel sdhci supportWenyou Yang2015-11-03-0/+41
| | | | | | | | | | | | | | | | | | | | | | The SDHCI is introduced by sama5d2, named as Secure Digital Multimedia Card Controller(SDMMC). It supports the embedded MultiMedia Card (e.MMC) Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO V3.0 specification. It is compliant with the SD Host Controller Standard V3.0 specification. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | mmc: sdhci: Fix the SD clock stop sequenceWenyou Yang2015-11-03-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | According to the SDHC specification, stopping the SD Clock is by setting the SD Clock Enable bit in the Clock Control register at 0, instead of setting all bits at 0. Before stopping the SD clock, we need to make sure all SD transactions to complete, so add checking the CMD and DAT bits in the Presen State register, before stopping the SD clock. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
* | mmc: fsl_esdhc: enable EVDD automatic control for SD/MMC Legacy Adapter CardYangbo Lu2015-11-02-0/+3
| | | | | | | | | | | | | | | | | | When detecting SDHC Adapter Card Type 2(SD/MMC Legacy Adapter Card), enable EVDD automatic control via SDHC_VS. This could support SD card IO voltage switching for UHS-1 speed mode. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | mmc: fsl_esdhc: enable dat[4:7] for eMMC4.5 Adapter CardYangbo Lu2015-11-02-0/+3
| | | | | | | | | | | | | | | | If adapter card type identification is supported for platform, we would enable dat[4:7] for eMMC4.5 Adapter Card. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Powerpc: eSDHC: expand a fix to T4160Shaohui Xie2015-11-02-1/+2
| | | | | | | | | | | | | | | | commit b8e5b07225 "Powerpc: eSDHC: Fix mmc read write err in uboot of T4240QDS board", T4160 also needs this fix. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | mmc: atmel: Zap global 'initialized' variableMarek Vasut2015-11-01-4/+4
| | | | | | | | | | | | | | | | | | Global variables are bad. Get rid of this particular one, so we can correctly instantiate multiple atmel mci interfaces, without having them interfere with one another. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | mmc: atmel: Implement proper private dataMarek Vasut2015-11-01-15/+25
| | | | | | | | | | | | | | | | | | | | | | | | Instead of passing just the register area as a private data, introduce a proper struct atmel_mci_priv structure instead. This will become useful in the subsequent patch, where we eliminate the global variable from this driver. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> [fix free()] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | mmc: atmel: Fix clock configurationMarek Vasut2015-11-01-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | After silencing the prints which were generated when reconfiguring the clock of the SD/MMC bus, surprisingly, the driver stopped working such that every attempt to use the SD/MMC bus caused the CPU to get totally stuck hard. It turns out that the prints generated a short delay, which was necessary for the CPU to reconfigure the clock without getting stuck. Thus, this patch adds a short delay after the clock configuration instead. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | mmc: atmel: Silence debug outputMarek Vasut2015-11-01-6/+6
|/ | | | | | | | | | | | | This driver generates clearly debugging prints when changing clock speed, so silence those. Furthermore, the driver generates further prints in case a command fails to complete. The later case woud be useful, but for eMMC, command 8 can fail and it's not an error but a part of the specification. Thus, make this debug() as well. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> [fix checkpatch warnings] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* armv8/ls1043ardb: esdhc: Add esdhc support for ls1043ardbYangbo Lu2015-10-29-6/+6
| | | | | | | | This patch adds esdhc support for ls1043ardb. Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* drivers: mmc: omap_hsmmc: convert driver to adopt device driver modelMugunthan V N2015-10-22-1/+116
| | | | | | adopt omap_hsmmc driver to device driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
* ARM: k2g: add SD card and eMMC supportRoger Quadros2015-10-22-2/+5
| | | | | | | | Add MMC support for k2g Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
* Merge git://git.denx.de/u-boot-marvellTom Rini2015-10-20-0/+41
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| * mmc: mv_sdhci: Configure the SDHCI MBUS bridge windowsStefan Roese2015-10-21-0/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver did not yet configure the SDHCI MBUS bridge registers. Without this and with CONFIG_MMC_SDMA enabled, mmc hangs at random times. As DMA cannot complete correctly. Tested on db-88f6820-gp eval board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Dirk Eibach <eibach@gdsys.cc> Tested-by: Kevin Smith <kevin.smith@elecsyscorp.com>
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