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* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-04-10-4/+4
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| * fsl_esdhc: Deal with watermark level register related changesPriyanka Jain2011-04-10-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | P1010 and P1014 has v2.3 version of FSL eSDHC controller in which watermark level register description has been changed: 9-15 bits represent WR_WML[0:6], Max value = 128 represented by 0x00 25-31 bits represent RD_WML[0:6], Max value = 128 represented by 0x00 Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Blackfin: bfin_sdh: add support for multiblock operationsSonic Zhang2011-04-08-4/+5
| | | | | | | | | | | | | | Don't forget to count full data size for the multiblock operation request. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: bfin_sdh: set all timer bits before transferCliff Cai2011-04-08-1/+1
| | | | | | | | | | | | | | | | The timer register is 32bits, not 16bit, so 0xFFFF won't fill it. Write out -1 to make sure to fill the whole thing. Signed-off-by: Cliff Cai <cliff.cai@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: BF50x: new processor portMike Frysinger2011-04-08-1/+1
|/ | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* S5P: mmc: Resolved interrupt error during mmc_initChander Kashyap2011-03-27-1/+1
| | | | | | | | | | | | Blocksize was hardcoded to 512 bytes. But the blocksize varies depeding on various mmc subsystem commands (between 8 and 512). This hardcoding was resulting in interrupt error during data transfer. It is now calculated based upon the request sent by mmc subsystem. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* fsl_esdhc: Correcting esdhc timeout counter calculationPriyanka Jain2011-03-07-1/+15
| | | | | | | | | | | | | | | | | | | | | | | | - Timeout counter value is set as DTOCV bits in SYSCTL register For counter value set as timeout, Timeout period = (2^(timeout + 13)) SD Clock cycles - As per 4.6.2.2 section of SD Card specification v2.00, host should cofigure timeout period value to minimum 0.25 sec. - Number of SD Clock cycles for 0.25sec should be minimum (SD Clock/sec * 0.25 sec) SD Clock cycles = (mmc->tran_speed * 1/4) SD Clock cycles - Calculating timeout based on (2^(timeout + 13)) >= mmc->tran_speed * 1/4 Taking log2 both the sides and rounding up to next power of 2 => timeout + 13 = log2(mmc->tran_speed/4) + 1 Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Mingkai Hu <Mingkai.Hu@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Add the workaround for erratum ESDHC-A001 (enable on P2020)Kumar Gala2011-02-03-0/+5
| | | | | | | Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 4, 8, and 12. Program one more than the desired value: 4 -> 5, 8 -> 9, 12 -> 13. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Minor Coding Style Cleanup.Wolfgang Denk2011-02-02-1/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Davinci MMCSD SupportSandeep Paulraj2011-02-02-0/+405
| | | | | | | | | | Added support for MMC/SD cards for Davinci. This feature is enabled by CONFIG_DAVINCI_MMC and is dependant on CONFIG_MMC and CONFIG_GENERIC_MMC options. This is tested on DM355 and DM365 EVMs with both the available mmc controllers. Signed-off-by: Alagu Sankar <alagusankar@embwise.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080)Roy Zang2011-01-14-0/+5
| | | | | | | | | | | The default value of the SRS, VS18 and VS30 and ADMAS fields in the host controller capabilities register (HOSTCAPBLT) are incorrect. The default of these bits should be zero instead of one. Clear these bits out when we read HOSTCAPBLT. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Add the workaround for erratum ESDHC111 (enable on P4080)Jerry Huang2011-01-14-1/+9
| | | | | | | | | Do not issue a manual asynchronous CMD12. Instead, use a (software) synchronous CMD12 or AUTOCMD12 to abort data transfer. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Fix esdhc disabled problem on some platformsChenhui Zhao2011-01-14-6/+8
| | | | | | | | | | | | Some new platform's esdhc pins don't share with other function. The eSDHC shouldn't be disabled, even if "esdhc" isn't defined in hwconfig env variable. Use CONFIG_FSL_ESDHC_PIN_MUX to fix this problem. Signed-off-by: Chenhui Zhao <b26998@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Fix the voltage validation processLi Yang2010-12-18-5/+15
| | | | | | | | | | | The current code use all the voltage range support by the host controller to do the validation. This will cause problem when the host supports Low Voltage Range. Change the validation voltage to be based on board setup. Signed-off-by: Li Yang <leoli@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Fix max clock frequencyJerry Huang2010-12-18-1/+1
| | | | | | | | The max clock of MMC is 52MHz Signed-off-by: Jerry Huang <Changm-Ming.Huang@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Use mmc_set_clock to set initial speedJerry Huang2010-12-18-1/+1
| | | | | | | | | | | | | | After booting the u-boot, and first using some SD card (such as Sandisk 2G SD card), because the field 'clock' of struct mmc is zero, this will cause the read transfer is always active and SDHC DATA line is always active, therefore, driver can't handle the next command. Therefore, we use mmc_set_clock to setup both the data structure and HW to the initial clock speed of 400000Hz. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Set the eSHDC DMACTL[SNOOP] bit after resetting the controllerP.V.Suresh2010-12-13-4/+4
| | | | | | | | | eSDHC host controller reset results in clearing of snoop bit also. This patch sets the SNOOP bit after the completion of host controller reset. Without this patch mmc reads are not consistent. Signed-off-by: P.V.Suresh <pala@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* AT91: gen_atmel_mci.c: fix bug when Slot B is usedReinhard Meyer2010-12-07-0/+1
| | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* mmc: omap: timeout counter fixNishanth Menon2010-11-19-25/+82
| | | | | | | | | | | | | | Having a loop with a counter is no timing guarentee for timing accuracy or compiler optimizations. For e.g. the same loop counter which runs when the MPU is running at 600MHz will timeout in around half the time when running at 1GHz. or the example where GCC 4.5 compiles with different optimization compared to GCC 4.4. use timer to keep track of time elapse and we use an emperical number - 1sec for a worst case timeout. This should never happen, and is adequate imaginary condition for us to fail with timeout. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Switch from archive libraries to partial linkingSebastien Carlier2010-11-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, weak symbols were not overridden by non-weak symbols found in archive libraries when linking with recent versions of binutils. As stated in the System V ABI, "the link editor does not extract archive members to resolve undefined weak symbols". This commit changes all Makefiles to use partial linking (ld -r) instead of creating library archives, which forces all symbols to participate in linking, allowing non-weak symbols to override weak symbols as intended. This approach is also used by Linux, from which the gmake function cmd_link_o_target (defined in config.mk and used in all Makefiles) is inspired. The name of each former library archive is preserved except for extensions which change from ".a" to ".o". This commit updates references accordingly where needed, in particular in some linker scripts. This commit reveals board configurations that exclude some features but include source files that depend these disabled features in the build, resulting in undefined symbols. Known such cases include: - disabling CMD_NET but not CMD_NFS; - enabling CONFIG_OF_LIBFDT but not CONFIG_QE. Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
* mmc: Add multi-block read support to the generic mmc driverAlagu Sankar2010-11-04-71/+39
| | | | | | | | | | | | | | This patch adds multi-block read support for the generic MMC driver. Large reads are broken into chunks of 65535 blocks to ensure that the code works with controllers having a 16 bit block counter. This patch results in a significant performance improvement. Time to read a 45 MB file went from 36 seconds to 9 seconds on Overo Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org> Tested-by: Steve Sakoman <steve.sakoman@linaro.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* mmc: Clean up generic mmc driver multi-block write functionsSteve Sakoman2010-11-04-24/+14
| | | | | | | | | | | The current mmc write implementation is type ulong, but returns int values. Some of the printf's are terminated with /n/r, one has none. This patch fixes these issues and also removes some unnecessary local variables. Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-samsungWolfgang Denk2010-10-29-5/+14
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| * s5p_mmc: support 8-bit bus widthJaehoon Chung2010-10-19-5/+14
| | | | | | | | | | | | | | | | | | | | This Patch do support 8-bit bus width for s5p So we add parameter for bus_width (in s5p_mmc_init(), s5p_mmc_initialize()) If want to use 8-bit bus width, only change (0, 8) instead of (0, 4). Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* | Coding Style cleanupWolfgang Denk2010-10-27-1/+0
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | mmc: seperate block number into small parts for multi-write cmdLei Wen2010-10-27-15/+39
| | | | | | | | | | | | | | | | | | | | Constraint the mmc framework to only send no more than 65535 blocks in one go during the multi-write command. This constraint comes due to the limitation of 16bit width block counter register at some hardware. Signed-off-by: Lei Wen <leiwen@marvell.com> Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
* | PXA: pxa-regs.h cleanupMarek Vasut2010-10-19-46/+52
|/ | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* ARMV7: OMAP: Add new mmc driver compatible with CONFIG_GENERIC_MMCSukumar Ghorai2010-10-17-0/+416
| | | | | | | | | | | | | OMAP boards currently use a legacy mmc driver. This patch adds a new mmc driver which will work with the generic mmc driver in u-boot. This new driver will work with both OMAP3 and OMAP4 boards. This patch does not remove the old driver. It should remain in the tree until all boards that use it switch to the new driver. Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com> Tested-by: Steve Sakoman <steve@sakoman.com>
* MMC: Fix for capacity calculation on eMMCSukumar Ghorai2010-10-17-0/+11
| | | | | | | | | | The current mmc driver returns erroneous capacity information for eMMC. The capacity of eMMC devices is available only in the ext-CSD register. This patch add code to read the ext-CDSD register and correctly calculate eMMC capacity. Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com> Acked-by: Steve Sakoman <steve@sakoman.com>
* Blackfin: bfin_sdh: clean up send_cmdMike Frysinger2010-10-02-10/+15
| | | | | | | Simplify the command setup and status checking steps, and add a proper timeout to the status polling code to avoid possible infinite hangs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* mmc: fix compiler warningsWolfgang Denk2010-09-19-2/+2
| | | | | | | | | | | | | | | | Commit d2bf29e3 caused a number of compiler warnings: mmc.c: In function 'mmc_bwrite': mmc.c:97: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'long unsigned int' mmc.c:97: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'lbaint_t' mmc.c: In function 'mmc_bread': mmc.c:229: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'long unsigned int' mmc.c:229: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'lbaint_t' Fix these. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Lei Wen <leiwen@marvell.com>
* mmc: add boundary check for mmc operationLei Wen2010-09-18-0/+10
| | | | Signed-off-by: Lei Wen <leiwen@marvell.com>
* Merge branch 'at91' of git://git.denx.de/u-boot-atmelWolfgang Denk2010-09-08-4/+402
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| * AT91: MCI: add SD/MMC driver using mmc frameworkReinhard Meyer2010-09-03-4/+402
| | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-samsungWolfgang Denk2010-09-08-23/+13
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| * | S5P: Use accessor functions instead of SoC specific defines to access the ↵Minkyu Kang2010-08-17-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | base address This patch is intended to prepare the other S5P SoC. (s5pc210) If use SoC specific defines then can't share with other SoC. So, make the accessor functions for access the base address by common way. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
| * | S5P: mmc: use the standard debug macroMinkyu Kang2010-08-10-18/+12
| |/ | | | | | | | | | | | | Use the standard debug macro instead of the costom macro Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Cc: Wolfgang Denk <wd@denx.de>
* | mmc: omap3: fix block read functionGrazvydas Ignotas2010-08-12-26/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | The OMAP3 block read function is not following API and always returning 1 instead of read block count, fix it. Also to simplify code, merge it with with a helper function, which was only called from the block read function. After this patch ext2 filesystem can be used properly. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Tested-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | mmc: omap3: make local symbols staticGrazvydas Ignotas2010-08-12-25/+17
|/ | | | | | | | | Make driver local variables and functions static and remove them from the arch header. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Tested-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-samsungWolfgang Denk2010-08-04-0/+479
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| * S5P: support mmc driverMinkyu Kang2010-08-03-0/+479
| | | | | | | | | | | | | | | | This patch adds support mmc driver for s5p SoC Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* | Merge branch 'master' of ../masterWolfgang Denk2010-07-15-9/+9
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| * | Blackfin: bfin_sdh: convert to portmux frameworkMike Frysinger2010-07-13-9/+9
| |/ | | | | | | | | | | | | Rather than bang MMRs directly, use the new portmux framework to handle the details. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | mmc: add function prototype for mmc_set_dev in mmc.hSteve Sakoman2010-07-05-2/+2
| | | | | | | | | | | | | | | | | | | | this eliminates compiler warnings when cmd_mmc.c is built with CONFIG_SYS_MMC_SET_DEV the mmc_set_dev implementation in omap3_mmc.c is also tweaked to match the new prototype in parameter naming and type Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | ARMV7: Restructure OMAP mmc driver to allow code sharing between OMAP3 and OMAP4Steve Sakoman2010-07-05-4/+251
| | | | | | | | | | | | | | | | The architecture independent header is moved to drivers/mmc, and the architecture dependent headers reside in asm/arch-omap3 and asm/arch-omap4 Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | OMAP: mmc: add support for second and third mmc channelsSteve Sakoman2010-07-05-2/+37
|/ | | | | | | | | | | | | | This patch adds support for the second and third mmc channels on OMAP3 processors Boards wishing to use this feature should define CONFIG_SYS_MMC_SET_DEV in the board config Tested on Overo Signed-off-by: Steve Sakoman <steve@sakoman.com> Tested-by: Philip Balister <philip@opensdr.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* PXA: PXAMMC: Add Monahans supportMarek Vasut2010-06-13-3/+6
| | | | | | | This patch enables PXAMCI support on PXA3xx CPUs. This patch only enables MMC1 though, MMC2 and PXA31x MMC3 will need further patch to be operational. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* PXA: PXAMMC: Drop different delays for PXA27XMarek Vasut2010-06-13-8/+0
| | | | | | | | In case the delays were set to 10000, the MMC card on PXA27X boards (and PXA3xx boards) didn't initialize on first try. Increasing the delays and leaving just those for PXA25x and 26x (that is 200000) fixes this problem. Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* drivers/mmc/fsl_esdhc.c: fix compiler warningsWolfgang Denk2010-05-15-17/+17
| | | | | | | | | | | | | | | | | Commit 77c1458d caused the following compiler warnings: fsl_esdhc.c: In function 'esdhc_pio_read_write': fsl_esdhc.c:142: warning: assignment discards qualifiers from pointer target type fsl_esdhc.c: In function 'esdhc_setup_data': fsl_esdhc.c:169: warning: unused variable 'wml_value' fsl_esdhc.c: In function 'esdhc_pio_read_write': fsl_esdhc.c:164: warning: control reaches end of non-void function Fix these. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Dipen Dudhat <dipen.dudhat@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
* ppc/85xx: PIO Support for FSL eSDHC Controller DriverDipen Dudhat2010-04-23-2/+85
| | | | | | | On some Freescale SoC Internal DMA of eSDHC controller has bug. So PIO Mode has been introduced to do data transfer using CPU. Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
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