summaryrefslogtreecommitdiff
path: root/drivers/mmc
Commit message (Collapse)AuthorAgeLines
* FSL/eSDHC: enable the clock to detect the SD cardJerry Huang2012-07-13-0/+3
| | | | | | | | | | | | | | For FSL low-end processors (VVN2.2), in order to detect the SD card, we should enable PEREN, HCKEN and IPGEN to enable the clock. Otherwise, after booting the u-boot, and then inserting the SD card, the SD card can't be detected. For SDHC VVN2.3 IP, these bits are reserved, and SDCLKEN is used. And when accessing to these reserved bit, no any impact happened. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> CC: Andy Fleming <afleming@gmail.com> CC: Marek Vasut <marex@denx.de> Signed-off-by: Andy Fleming <afleming@freescale.com>
* SD/MMC: check the card status during erase operationJerry Huang2012-07-13-0/+5
| | | | | | | | | | | | | | | | | | | Use the function 'mmc_send_status' to check the card status. only when the card is ready, driver can send the next erase command to the card, otherwise, the erase will failed: => mmc erase 0 1 MMC erase: dev # 0, block # 0, count 1 ... 1 blocks erase: OK => mmc erase 0 2 MMC erase: dev # 0, block # 0, count 2 ... mmc erase failed 1 blocks erase: ERROR => mmc erase 0 4 MMC erase: dev # 0, block # 0, count 4 ... mmc erase failed 1 blocks erase: ERROR Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> CC: Andy Fleming <afleming@gmail.com> CC: Marek Vasut <marex@denx.de> Signed-off-by: Andy Fleming <afleming@freescale.com>
* mmc:fix Call mmc_init() when executing mmc_get_dev()Łukasz Majewski2012-07-13-1/+4
| | | | | | | | | | | | | | | | | | | | This code adds call to mmc_init(), for partition related commands (e.g. fatls, fatinfo etc.). It is safe to call mmc_init() multiple times since mmc->has_init flag prevents from multiple initialization. The FAT related code calls get_dev high level method and then uses elements from mmc->block_dev, which is uninitialized until the mmc_init (and thereof mmc_startup) is called. This problem appears on boards, which don't use mmc as the default place for envs Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* mmc: remove the hard setting for tran_speedJaehoon Chung2012-07-13-6/+7
| | | | | | | | | mmc_set_clock is set to the hard-coding. But i think good that use the tran_speed value. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* i.MX: fsl_esdhc: allow use with cache enabled.Eric Nelson2012-07-13-1/+16
| | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* mmc: tegra2: rename tegra2_mmc.* to tegra_mmc.*Tom Warren2012-07-07-7/+7
| | | | | | | | In anticipation of Tegra3 support, continue removing/renaming Tegra2-specific files. No functional changes (yet). Updated copyrights to 2012. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2012-05-20-7/+57
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: (167 commits) OMAP4/5: Change omap4_sdp, omap4_panda, omap5_evm maintainer ARM: omap3: Add CONFIG_SPL_BOARD_INIT for CONFIG_SPL_MMC_SUPPORT ARM: omap3: Set SPL stack size to 8KB, image to 54KB. arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx OMAP4: Set fdt_high for OMAP4 devices to enable booting with Device Tree omap4: do not enable auxiliary cores omap4: do not enable fs-usb module omap4: panda: disable uart2 pads during boot igep00x0: change mpurate from 500 to auto igep00x0: enable the use of a plain text file tegra2: trivially enable 13 mhz crystal frequency tegra: Enable keyboard for Seaboard tegra: Switch on console mux and use environment for console tegra: Add tegra keyboard driver tegra: fdt: Add keyboard definitions for Seaboard tegra: fdt: Add keyboard controller definition tegra: Add keyboard support to funcmux input: Add support for keyboard matrix decoding from an fdt input: Add generic keyboard input handler input: Add linux/input.h for key code support fdt: Add fdtdec functions to read byte array tegra: Enable LP0 on Seaboard tegra: fdt: Add EMC data for Tegra2 Seaboard tegra: i2c: Add function to find DVC bus fdt: tegra: Add EMC node to device tree tegra: Add EMC settings for Seaboard tegra: Turn off power detect in board init tegra: Set up warmboot code on Nvidia boards tegra: Setup PMC scratch info from ap20 setup tegra: Add warmboot implementation tegra: Set up PMU for Nvidia boards tegra: Add PMU to manage power supplies tegra: Add EMC support for optimal memory timings tegra: Add header file for APB_MISC register tegra: Add tegra_get_chip_type() to detect SKU tegra: Add flow, gp_padctl, fuse, sdram headers tegra: Add crypto library for warmboot code tegra: Add functions to access low-level Osc/PLL details tegra: Move ap20.h header into arch location Add AES crypto library i2c: Add TPS6586X driver Add abs() macro to return absolute value fdt: Add function to return next compatible subnode fdt: Add function to locate an array in the device tree i.MX28: Avoid redefining serial_put[cs]() i.MX28: Check if WP detection is implemented at all i.MX28: Add battery boot components to SPL i.MX28: Reorder battery status functions in SPL i.MX28: Add LRADC init to i.MX28 SPL i.MX28: Add LRADC register definitions i.MX28: Shut down the LCD controller before reset i.MX28: Add LCDIF register definitions i.MX28: Implement boot pads sampling and reporting i.MX28: Improve passing of data from SPL to U-Boot M28EVK: Add SD update command M28EVK: Implement support for new board V2.0 FEC: Abstract out register setup MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged i.MX28: Add delay after CPU bypass is cleared spi: mxs: Allow other chip selects to work spi: mxs: Introduce spi_cs_is_valid() mx53loco: Remove unneeded gpio_set_value() mx53loco: Add CONFIG_REVISION_TAG mx53loco: Turn on VUSB regulator mx53loco: Add mc34708 support and set mx53 frequency at 1GHz pmic: dialog: Avoid name conflicts imx: Add u-boot.imx as target for ARM9 i.MX SOCs i.MX2: Include asm/types.h in arch-mx25/imx-regs.h imx: usb: There is no such register i.MX25: usb: Set PORTSCx register imx: nand: Support flash based BBT i.MX25: This architecture has a GPIO4 too i.MX25: esdhc: Add mxc_get_clock infrastructure i.MX6: mx6q_sabrelite: add SATA bindings i.MX6: add enable_sata_clock() i.MX6: Add ANATOP regulator init mx28evk: add NAND support USB: ehci-mx6: Fix broken IO access M28: Scan only first 512 MB of DRAM to avoid memory wraparound Revert "i.MX28: Enable additional DRAM address bits" M28: Enable FDT support mx53loco: Add support for 1GHz operation for DA9053-based boards mx53loco: Allow to print CPU information at a later stage mx5: Add clock config interface imx-common: Factor out get_ahb_clk() i.MX6Q: mx6qsabrelite: Add keypress support to alter boot flow mx31pdk: Allow booting a zImage kernel mx6qarm2: Allow booting a zImage kernel mx6qsabrelite: Allow booting a zImage kernel mx28evk: Allow booting a zImage kernel m28evk: Allow to booting a dt kernel mx28evk: Allow to booting a dt kernel mx6qsabrelite: No need to set the direction for GPIO3_23 again pmic: Add support for the Dialog DA9053 PMIC MX53: mx53loco: Add SATA support MX53: Add support to ESG ima3 board SATA: add driver for MX5 / MX6 SOCs MX53: add function to set SATA clock to internal SATA: check for return value from sata functions MX5: Add definitions for SATA controller NET: fec_mxc.c: Add a way to disable auto negotiation Define UART4 and UART5 base addresses EXYNOS: Change bits per pixel value proper for u-boot. EXYNOS: support TRATS board display function LCD: support S6E8AX0 amoled driver based on EXYNOS MIPI DSI EXYNOS: support EXYNOS MIPI DSI interface driver. EXYNOS: support EXYNOS framebuffer and FIMD display drivers. LCD: add data structure for EXYNOS display driver EXYNOS: add LCD and MIPI DSI clock interface. EXYNOS: definitions of system resgister and power management registers. SMDK5250: fix compiler warning misc:pmic:samsung Convert TRATS target to use MAX8997 instead of MAX8998 misc:pmic:max8997 MAX8997 support for PMIC driver TRATS: modify the trats's configuration ARM: Exynos4: ADC: Universal_C210: Enable LDO4 power line for ADC measurement EXYNOS: Rename exynos5_tzpc structure to exynos_tzpc arm: ea20: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT arm: cam_enc_4xx: Change macro from BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT cm-t35: add I2C multi-bus support include/configs: Remove CONFIG_SYS_64BIT_STRTOUL include/configs: Remove CONFIG_SYS_64BIT_VSPRINTF omap3: Introduce weak misc_init_r omap730p2: Remove empty misc_init_r omap5912osk: Remove empty misc_init_r omap4+: Remove CONFIG_ARCH_CPU_INIT omap4: Remove CONFIG_SYS_MMC_SET_DEV OMAP3: pandora: drop console kernel argument OMAP3: pandora: revise GPIO configuration ...
| * i.MX28: Check if WP detection is implemented at allMarek Vasut2012-05-15-1/+2
| | | | | | | | | | | | | | | | | | | | | | If the WP function is NULL, simply assume the card is always RW. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * omap5: pbias ldo9 turn onBalaji T K2012-05-15-0/+33
| | | | | | | | | | | | | | Add omap5 pbias configuration for mmc1/sd lines and set voltage for sd data i/o lines Signed-off-by: Balaji T K <balajitk@ti.com>
| * OMAP4/5: Make the sysctrl structure commonSRICHARAN R2012-05-15-2/+2
| | | | | | | | | | | | | | | | | | Make the sysctrl structure common, so that it can be used in generic functions across socs. Also change the base address of the system control module, to include all the registers and not simply the io regs. Signed-off-by: R Sricharan <r.sricharan@ti.com>
| * ARM:OMAP+:MMC: Add parameters to MMC initJonathan Solnit2012-05-15-4/+20
| | | | | | | | | | | | | | | | | | | | Add parameters to the OMAP MMC initialization function so the board can mask host capabilities and set the maximum clock frequency. While the OMAP supports a certain set of MMC host capabilities, individual boards may be more restricted and the OMAP may need to be configured to match the board. The PRG_SDMMC1_SPEEDCTRL bit in the OMAP3 is an example. Signed-off-by: Jonathan Solnit <jsolnit@gmail.com>
* | mmc: support the sdhci instead of s5p_mmc for samsung-socJaehoon Chung2012-05-08-491/+99
| | | | | | | | | | | | | | | | | | | | | | | | In driver mmc, generic s5p_sdhci code is implemented. s5p_mmc file is dupulicated. we are good that use the generic sdhci. This patch supported the sdhci for Samsung-SoC. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Lei Wen<leiwen@marvell.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* | mmc: add the quirk to use the sdhci for samsung-socJaehoon Chung2012-05-08-0/+12
| | | | | | | | | | | | | | | | | | | | To support the Samsung-SoC, added the basically functions. Samsung-SoC didn't used the SDHCI_CTRL_HISPD. And added set_control_reg callback for s3c64xx. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Lei Wen<leiwen@marvell.com>
* | mmc: sdhci: add the quirk for broken r1b responseJaehoon Chung2012-05-08-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When response type is R1b, mask value is added the SDHCI_INT_DAT_END. but in while(), didn't check that flag. So sdhci controller didn't work fine. CMD6 didn't always complete. So add the quirks for broken r1b response and add the timeout value to prevent the infinite loop. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Lei Wen<leiwen@marvell.com>
* | i.MX28: Lower the amount of blocks transfered in one DMA cycleMarek Vasut2012-05-08-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Some MMC cards, like my ancient 32.0MB SanDisk RS-MMC cards had issue if b_max was set to 0x40 and DMA was enabled. Lower this value to 0x20, which allows these cards to work too. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | mmc: fsl_esdhc: Poll until card is not busy anymoreDirk Behme2012-05-08-1/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch imports parts of two patches from the Freescale U-Boot with the following commit messages: ENGR00156405 ESDHC: Add workaround for auto-clock gate errata ENGcm03648 http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=e436525a70fe47623d346bc7d9f08f12ff8ad787 The errata, not applicable to USDHC, causes ESDHC to shut off clock to the card when auto-clock gating is enabled for commands with busy signalling and no data phase. The card might require the clock to exit the busy state, so the workaround is to disable the auto-clock gate bits in SYSCTL register for such commands. The workaround also entails polling on DAT0 bit in the PRSSTAT register to learn when busy state is complete. Auto-clock gating is re-enabled at the end of busy state. ENGR00156670-1 ESDHC/USDHC: Remove delay before each cmd and some bug fixes http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/commit/drivers/mmc/imx_esdhc.c?h=imx_v2009.08_12.01.01&id=a77c6fec8596891be96b2cdbc742c9824844b92a Removed delay of 10 ms before each command. There should not be a need to have this delay after the ENGR00156405 patch that polls until card is not busy anymore before proceeding to next cmd. This patch imports the polling part of both patches. The auto-clock gating code don't apply for i.MX6 as implemented in these two patches. SYSCTL_RSTA was defined twice. Remove one definition. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Andy Fleming <afleming@freescale.com> CC: Fabio Estevam <fabio.estevam@freescale.com> CC: Stefano Babic <sbabic@denx.de>
* | mmc: omap: handle controller errors properlyGrazvydas Ignotas2012-05-08-2/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to OMAP3 TRM, when the controller reports certain errors, driver must perform a software reset. This is done by setting a bit in SYSCTL and waiting it to clear: - SRC on command timeout (CTO) - SRD on data errors (DTO, DCRC and DEB) This fixes a problem seen on OMAP3 pandora board with some cards that won't work with a message printed multiple times: timedout waiting on cmd inhibit to clear Code loosely based on Linux omap_hsmmc driver. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Tested-by: Tom Rini <trini@ti.com> Tested-by: Pali Rohár <pali.rohar@gmail.com>
* | mmc: omap: improve stat wait messageGrazvydas Ignotas2012-05-08-1/+2
| | | | | | | | | | | | | | | | The message didn't state that it's waiting for STAT to _clear_, and printing the STAT value itself can help to identify problems. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Acked-by: Tom Rini <trini@ti.com>
* | mmc: omap: follow TRM procedure to power on cardsGrazvydas Ignotas2012-05-08-5/+11
| | | | | | | | | | | | | | | | | | | | | | According to OMAP3 TRM, PBIASLITEPWRDNZ bits must be cleared while MMC power supply is being enabled and is ramping up (those bits might be left set by the previous bootloader). It doesn't say what happens if this procedure is violated, but better not to risk here and do things as required. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Acked-by: Tom Rini <trini@ti.com>
* | mmc:fix: Set mmc width according to MMC host capabilitiesŁukasz Majewski2012-05-08-1/+3
|/ | | | | | | | | | | This patch sets the MMC width according to the MMC host capabilities. It turned out, that there are some targets (e.g. GONI), which are able to read data from SPI only at 4 bit mode. This patch restricts the width number according to the MMC host. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Andy Fleming <afleming@gmail.com>
* Blackfin: bfin_sdh: drop dos part hardcodeMike Frysinger2012-04-22-1/+0
| | | | | | | | | No other driver sets up the part type to DOS in their init, and it doesn't seem to be needed as `mmcinfo` and `mmc part` stll work, so drop it. Reported-by: Marek Vasut <marex@denx.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* mmc: Fix warning if CONFIG_MMC_TRACE is enabledDirk Behme2012-04-21-1/+1
| | | | | | | | | | | | | | Fix the warning mmc.c: In function 'mmc_send_cmd': mmc.c:87: warning: assignment from incompatible pointer type in case CONFIG_MMC_TRACE is enabled. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> CC: Andy Fleming <afleming@freescale.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Marek Vasut <marex@denx.de>
* DMA: Split the APBH DMA init into block and channel initMarek Vasut2012-04-16-0/+5
| | | | | | | | | | | | | | | | | | | | | | | This fixes the issue where mxs_dma_init() was called either twice or never, without introducing any new init hooks. The idea is to allow each and every device using the APBH DMA block to configure and request only the channels it uses, instead of making it call init for all the channels as is now. The common DMA block init part, which only configures the block, is then called from CPUs arch_cpu_init() call. NOTE: This patch depends on: http://patchwork.ozlabs.org/patch/150957/ Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* i.MX28: Allow coexistence of PIO and DMA mode for SD/MMCMarek Vasut2012-04-16-1/+47
| | | | | | | | | | | | This SD DMA function of i.MX28 is still apparently too experimental to be enabled by default in 2012.04 release. Enable this feature only if the user plans to tinker with DCache or explicitly enables it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* drivers/mmc/mmc.c: Fix build warningAnatolij Gustschin2012-03-30-1/+1
| | | | | | | | | | | | Fix: mmc.c: In function 'mmc_bounce_buffer_start': mmc.c:132:13: warning: no return statement in function returning non-void [-Wreturn-type] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Andy Fleming <afleming@gmail.com> Cc: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* drivers/mmc/tegra2_mmc.c: fix GCC 4.6 warningAnatolij Gustschin2012-03-30-1/+1
| | | | | | | | | | | Fix: tegra2_mmc.c: In function 'mmc_send_cmd': tegra2_mmc.c:230:3: warning: 'mask' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Doug Anderson <dianders@chromium.org> Cc: Tom Warren <twarren@nvidia.com>
* i.MX28: Do data transfers via DMA in MMC driverMarek Vasut2012-03-29-30/+40
| | | | | | | | | This utilizes the newly introduced bounce buffers in the MMC layer. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Andy Fleming <afleming@gmail.com> Cc: Fabio Estevam <festevam@gmail.com>
* MMC: Implement generic bounce bufferMarek Vasut2012-03-29-3/+99
| | | | | | | | | | This implements generic bounce buffer at the end of MMC command submission chain. Therefore if unaligned data are passed, they are copied. This stuff should be pushed down into the MMC subsystem to squash all places generating these unaligned data. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Andy Fleming <afleming@gmail.com>
* ATMEL: remove old atmel_mci driverSven Schnelle2012-03-13-534/+0
| | | | | | | | All boards are using the gen_atmel_mci driver now, so no need to carry the old driver around. Signed-off-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* ATMEL: use generic mmc frameworkSven Schnelle2012-03-13-245/+0
| | | | | | | | | gen_atmel_mci works on AVR32 as well, so no need to use the legacy mmc driver. This also has the nice side effect of being able to use SDHC cards an those boards. Signed-off-by: Sven Schnelle <svens@stackframe.org> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* mmc: make mmc_send_status() more reliableJan Kloetzke2012-02-15-8/+12
| | | | | | | | | Align the card status polling with the Linux kernel and retry the command at least five times. Also some cards apparently mishandle the status bits, so make sure to check the card state too. Signed-off-by: Jan Kloetzke <jan.kloetzke@dspg.com> Cc: Andy Fleming <afleming@gmail.com>
* mmc: fix card busy pollingJan Kloetzke2012-02-15-8/+6
| | | | | | | | | | | | A MMC/SD card may always go into the programming state (and hence be busy) after a block write. Therefore always check the card state, even after single block writes. On the other hand there is no need to check the card status after a read. Also make sure that errors during busy polling are propagated upwards. Signed-off-by: Jan Kloetzke <jan.kloetzke@dspg.com> Cc: Andy Fleming <afleming@gmail.com>
* Tegra: mmc: Fixed handling of interrupts in timeouts.Tom Warren2012-02-15-0/+4
| | | | | | | | | | | | | We are seeing occasional timeouts in the Tegra mmc code when we are reading from external MMC cards. These don't seem to be detrimental if they are handled properly. This CL properly clears the "normal interrupt status register" (norintsts) in error conditions. If we don't do this, when we come back into mmc_send_cmd() the register will still contain status from the last transaction. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* omap_hsmmc: Wait for CMDI to be clearTom Rini2012-02-15-2/+3
| | | | | | | | | | | | | | | | | Before we can send a command we need both the DATI (command inhibit on mmc_dat line) bit and CMDI (command inhibit on mmc_cmd line) are clear. The previous behavior of only checking on DATI was insufficient on some cards and incorrect behavior in any case. This makes the code check for both bits being clear and makes the error print more clear as to what happened. DATI_CMDDIS is removed as it was unused elsewhere in the code and stood for 'DATI is set, cmds are disabled still'. Fix originally spotted by Peter Bigot. Tested-by: Peter A. Bigot <bigotp@acm.org> Tested-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Andreas Müller <schnitzeltony@googlemail.com>
* mmc: access mxcmmc from mx31 boardsHelmut Raiger2012-02-12-5/+3
| | | | | | | | | | | | | | | | | This patch modifies mxcmmc.c to be used not only by i.MX27 but also by i.MX31 boards. Both use the same SD controller, but have different clock set-ups. The i.MX27 imx_get_XXXclock functions are made static to generic.c and a public mxc_get_clock() function is provided. Pins, base address and prototypes for an i.MX31 specific board_init_mmc() are provided. Some of the i.MX27 clock getters are unused and marked as such to avoid warnings (./MAKEALL -s mx27), but the code was left in for future use. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
* tegra: mmc: Support operation with dcache enabledSimon Glass2012-02-12-0/+16
| | | | | | | | | | | When the data cache is enabled we must flush on write and invalidate on read. We also check that buffers are aligned to data cache lines boundaries. With recent work in U-Boot this should generally be the case but the warnings will catch problems. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* fsl_esdhc: fix PIO mode transfersIra Snyder2012-01-08-1/+2
| | | | | | | | | | | | | | | | The pointer to the registers used to control the Freescale ESDHC MMC controller is not initialized correctly when using PIO mode. This is fixed by initializing the pointer in the same way as all other sites within the driver. Examining the commit history shows that this was broken at introduction due to a code change in upstream U-Boot to support the mx51 processor family. Reported-by: Jim Lentz <JLentz@zhone.com> Cc: Andy Fleming <afleming@freescale.com> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
* mmc: tegra2: Implement card-detect hook.Thierry Reding2012-01-08-19/+13
| | | | | | | | | | On Tegra2, card-detection is implemented by passing the card-detection GPIOs to the MMC driver at initialization time. Instead of implementing the board_mmc_getcd() function, use the card-detect hook and allow boards to override it by providing their own board_mmc_getcd() implementation. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
* mmc: fsl_esdhc: Implement card-detect hook.Thierry Reding2012-01-08-17/+12
| | | | | | | | | | | | | | | | This card-detect hook probably doesn't work. Perhaps somebody with more knowledge about the hardware can comment on this. I think that perhaps even the complete code from esdhc_init() could go into the getcd() function instead or mmc_getcd() needs to be called at some later time after mmc_init(), which, however, would require many other drivers to change. In addition to implementing the hook, this patch also removes the call to the board_mmc_getcd() function which is now called from the MMC framework and is no longer required here. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Jason Liu <jason.hui@linaro.org>
* mmc: Implement card detection.Thierry Reding2012-01-08-0/+31
| | | | | | | | | | | Check for card detect each time an MMC/SD device is initialized. If card detection is not implemented, this code behaves as before and continues assuming a card is present. If no card is detected, has_init is reset for the MMC/SD device (to force initialization next time) and an error is returned. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Jason Liu <jason.hui@linaro.org>
* mmc: Change board_mmc_getcd() function prototype.Thierry Reding2012-01-08-5/+7
| | | | | | | | | | | | | | | | | | | | | The new API no longer uses the extra cd parameter that was used to store the card presence state. Instead, this information is returned via the function's return value. board_mmc_getcd() returns -1 to indicate that no card-detection mechanism is implemented; 0 indicates that no card is present and 1 is returned if it was detected that a card is present. The rationale for this change can be found in the following email thread: http://lists.denx.de/pipermail/u-boot/2011-November/110180.html In summary, the old API was not consistent with the rest of the MMC API which always passes a struct mmc as the first parameter. Furthermore the cd parameter was used to mean "card absence" in some implementations and "card presence" in others. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Jason Liu <jason.hui@linaro.org>
* drivers/mmc/mv_sdhci.c: Fix build warningAnatolij Gustschin2012-01-08-2/+1
| | | | | | | | | | | | | Fix: mv_sdhci.c: In function 'mv_sdh_init': mv_sdhci.c:47:22: warning: the comparison will always evaluate as 'true' for the address of 'mv_sdhci_writeb' will never be NULL [-Waddress] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Lei Wen <leiwen@marvell.com> Cc: Andy Fleming <afleming@freescale.com> Acked-by: Lei Wen <leiwen@marvell.com>
* ftsdc010: improve performance and capabilityMacpaul Lin2012-01-08-85/+103
| | | | | | | | | | This patch improve the performance by spliting flag examination code in ftsdc010_send_cmd() into 3 functions. This patch also reordered the function which made better capability to some high performance cards against to the next version of ftsdc010 hardware. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* mmc: add host_caps checking avoid switch card improperlyMacpaul Lin2012-01-08-0/+10
| | | | | | | | | | | Add a host capability checking to avoid the mmc stack switch the card to HIGHSPEED mode when the card supports HIGHSPEED while the host doesn't. This patch avoid furthur transaction problem when the mmc/sd card runs different mode to the host. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* i.mx: fsl_esdhc: add the i.mx6q supportJason Liu2012-01-08-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmc host controller on the i.mx6q is called usdhc which is redesigned based on the freescale esdhc controller. The usdhc controller is almost compatible with esdhc except it adds one mix register to support debug/SD3.0 and move the low bit 0-6 of XFERTYP register to the mix control reg low bit 0-6. Thus on i.mx6q, we have the following compared with the previous soc: (can refer to RM of chapter 56.3.3) i.mx6q: mix control: bit 31 - bit 7: Added for debug/SD3.0 support bit 6 - bit 0: move in the XFERTYP register bit 6-0 on previous soc XFERTYP register: bit 31 - bit 7: the same as before, bit 6 - bit 0: no-use previous soc mix control: no XFERTYP register: bit 31 - bit 0: xfertype information Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* tegra2: Move tegra2_mmc_init() prototype to public header.Thierry Reding2011-12-24-2/+0
| | | | | | | | | | | | | tegra2_mmc_init() is implemented by the Tegra2 MMC driver. Since most of the Tegra2-based boards will need to call it, this commit exports it in the new public asm/arch/mmc.h header file to prevent each board from providing its own prototype. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* PXA: Kill last remnants of set_GPIO_mode functionMarek Vasut2011-12-19-5/+0
| | | | | | | | GPIO configuration shall never be done inside a driver, never. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* tegra2: Modify MMC driver to handle power and cd GPIOsStephen Warren2011-12-09-7/+39
| | | | | | | | | | | | | | | | | | | | | | | Pass the GPIO numbers for power and card detect to tegra2_mmc_init(), and modify that function to perform all required GPIO initialization. This removes the need for board files to perform these operations. Move board_mmc_getcd() into tegra2_mmc.c now that the driver knows which GPIOs to use. Update affected call-sites in seaboard.c and harmony.c. Note that this change should make all SD ports work on Harmony, since the required GPIO setup is now being performed. v4: Fix prototype of tegra2_mmc_init() in board.h to match driver change. Remove prototype of gpio_config_mmc() from board.h Signed-off-by: Stephen Warren <swarren@nvidia.com> Cc: Andy Fleming <afleming@gmail.com> Tested-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* PXA: Rename CONFIG_PXA2[57]X to CONFIG_CPU_PXA2[57]XMarek Vasut2011-12-06-5/+6
| | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
* Revert "mmc: retry the cmd8 to meet 74 clocks requirement in the spec"Macpaul Lin2011-11-25-14/+2
| | | | | | | | | | | | | | | | | | | | This reverts commit 02f3029f1810b99869254d0cf0a71946a008a728. This patch add 3 times retry to CMD8 because the Marvell mmc controller doesn't obey the power ramp up process in the SD specification 6.4.1. (Please refer to figure 6.1 and 6.2 in the specification.) The CMD0 should be send after power ramp up has been finished. However, the Marvell mmc contorller must do power ramp up after the first CMD0 command has been send. This patch also affect existing platforms like Nokia N900 and other platforms. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Acked-by: Lei Wen <leiwen@marvell.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com>
generated by cgit v1.1 at 2024-12-23 06:56:47 +0000