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| * | mmc: set correct block size value in bfin sdh driverSonic Zhang2014-10-03-3/+4
| |/ | | | | | | | | | | | | | | Wait data transfer till the data end bit other than the data block end bit is set. Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* | samsung: Enable device tree for s5p_goniSimon Glass2014-10-08-2/+0
|/ | | | | | | | | Change this board to add a device tree. This also adds a pinmux header file although it is not used as yet. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* cosmetic: replace MIN, MAX with min, maxMasahiro Yamada2014-09-24-1/+1
| | | | | | | The macro MIN, MAX is defined as the aliase of min, max, respectively. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* kconfig: add blank Kconfig filesMasahiro Yamada2014-09-24-0/+0
| | | | | | | | This would be useful to start moving various config options. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* ls102xa: esdhc: Add esdhc support for LS102xAWang Huan2014-09-08-2/+2
| | | | | | | | | | | For LS1, esdhc is big-endian IP. Accessing the registers should be in big-endian mode. So we use esdhc_read32() to read Host controller capabilities register for LS1. For LS1, when using CMD12, cmdtype need to be set to ABORT, otherwise, next read command will hang. Signed-off-by: Alison Wang <alison.wang@freescale.com>
* socfpga: cleanup socfpga_dw_mmcPavel Machek2014-08-30-4/+4
| | | | | | | Cleanups as suggested by wd on mailing list. Signed-off-by: Pavel Machek <pavel@denx.de> Acked-by: Chin Liang See <clsee@altera.com>
* socfpga: fix clock manager register definitionPavel Machek2014-08-29-2/+2
| | | | | | | | | Structure defining clock manager hardware was wrong, leading to wrong registers being accessed and hang in MMC init. This fixes structure to match hardware. Signed-off-by: Pavel Machek <pavel@denx.de>
* MMC: atmel_mci: enable high speed mode supportBo Shen2014-08-01-1/+6
| | | | | | | | If the MCI IP version >= 0x300, it supports hight speed mode option, this patch enable it. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* MMC: atmel_mci: refactor setting the mode registerBo Shen2014-08-01-14/+42
| | | | | | | | The mode register is different between MCI IP version. So, according to MCI IP version to set the mode register. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* mmc/dw_mmc: Fix clock divider calculation error for bypass modeChin Liang See2014-08-01-1/+4
| | | | | | | | | | | | To fix the clock divider calculation error when the controller clock same as the operating frequency. This is known as bypass mode. In this mode, the divider should be 0. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Mischa Jonker <mjonker@synopsys.com>
* mmc: s3c: Add SD driverMarek Vasut2014-08-01-0/+322
| | | | | | | | | | | | | | Implement SD driver for the S3C24xx family. This implementation is currently only capable of using the PIO transfers, DMA is not supported. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Vladimir Zapolskiy <vz@mleia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flagLubomir Rintel2014-08-01-1/+1
| | | | | | | | Seems like the controller doesn't support the flag. None of the hi-speed cards I've tried could be read, while they successfully worked with the quirk enabled. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Tested-by: Stephen Warren <swarren@wwwdotorg.org>
* ARM: kirkwood: add mvsdio driverDrEagle2014-08-01-0/+362
| | | | | | | | | This patch add Marvell kirkwood MVSDIO/MMC driver and enable it for Sheevaplugs and OpenRD boards. Signed-off-by: Gerald Kerma <drEagle@doukki.net> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'Albert ARIBAUD2014-07-28-134/+7
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| * sunxi: Remove mmc DMA supportHans de Goede2014-07-06-134/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the dma descriptors on the stack, and then exits while the dma transfer is in progress, so the dma engine is reading stack memory which at that point may be re-used. So far we've gotten away with this by luck, but recent u-boot changes have shifted the stack start address by 16 bytes, which combined with dma alignment now exposes this problem. Since we end up just busy waiting for the dma engine anyway, this commit fixes things by simply removing the dma code, resulting in smaller bug-free code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | mmc: prevent some warnings with make W=1Jeroen Hofstee2014-07-18-4/+4
| | | | | | | | | | | | | | | | Add missing prototypes for global functions and make local functions static. cc: panto@antoniou-consulting.com Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* | dirvers: mmc: use __weakJeroen Hofstee2014-07-18-11/+9
|/ | | | | use weak instead of alias to prevent some clang warnings. Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* includes: move openssl headers to include/u-bootJeroen Hofstee2014-06-19-1/+1
| | | | | | | | | | | | commit 18b06652cd "tools: include u-boot version of sha256.h" unconditionally forced the sha256.h from u-boot to be used for tools instead of the host version. This is fragile though as it will also include the host version. Therefore move it to include/u-boot to join u-boot/md5.h etc which were renamed for the same reason. cc: Simon Glass <sjg@chromium.org> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* mmc: free allocated memory on initialization errorsDarwin Rambo2014-06-12-2/+6
| | | | | | | | Cleanup to balance malloc/free calls. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* mmc: return meaningful error codes from mmc_select_hwpartStephen Warren2014-06-12-3/+4
| | | | | | | | | | | | Rather than just returning -1 everywhere, try to return something meaningful from mmc_select_hwpart(). Note that most other MMC functions don't do this, including functions called from mmc_select_hwpart(), so I'm not sure how effective this will be. Still, it's one less place with hard-coded -1. Suggested-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
* Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2014-06-02-103/+172
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| * mmc: s5p_sdhci: add the s5p_sdhci_core_init functionJaehoon Chung2014-05-16-25/+17
| | | | | | | | | | | | | | | | | | | | | | To reuse the code, added the s5p_sdhci_core_init function. Before applied this patch, didn't use the 8-bit mode at exynos baord. Because it didn't set "MMC_MODE_8BIT". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * mmc: exynos_dw_mmc: enable the DDR modeJaehoon Chung2014-05-16-0/+1
| | | | | | | | | | | | | | | | | | Set the ddr mode capability by default. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * mmc: dw_mmc: support the DDR modeJaehoon Chung2014-05-16-2/+10
| | | | | | | | | | | | | | | | | | Support the DDR mode at dw-mmc controller Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * mmc: support the DDR mode for eMMCJaehoon Chung2014-05-16-3/+13
| | | | | | | | | | | | | | Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * mmc: remove the unnecessary define and fix the wrong bit controlJaehoon Chung2014-05-16-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Lukasz Majeski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * mmc: exynos_dw_mmc: restore the property into hostJaehoon Chung2014-05-16-73/+131
| | | | | | | | | | | | | | | | | | | | Restore the platdata(property of dt) into host struct. Then data's information is maintained and reused anywhere. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | mmc: atmel_mci: fix print incorrect buffer content for debugWu, Josh2014-05-27-2/+3
| | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> [fix checkpatch line length warning] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | sunxi: mmc supportIan Campbell2014-05-25-0/+504
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Mon, 2014-05-05 at 14:18 +0200, Stefan Roese wrote: > > + case 1: > > +#if CONFIG_MMC1_PG > Are you sure that this is correct and shouldn't be: > > +#ifdef CONFIG_MMC1_PG > > ? It's "correct" in so far as it works (the boards.cfg config stuff #defines things to 1), but I think you are right that it isn't the preferred style. But... > A quick scan through this patch series shows that this define > is not set at all. Perhaps its outdated? Or is it used to support > some other sunxi SoC? Not sure, perhaps it should be removed for > now. ...I had thought that it was to support some other board which wasn't being upstreamed right now, so eventually useful and harmless for now, but I've just checked and it isn't actually used by any of the boards in u-boot-sunxi.git. So rather than fix it to use #ifdef lets drop it. Rather than resend the entire series, here is v5.1 of this patch. > Other than this please add my: > > Reviewed-by: Stefan Roese <sr@denx.de> Thanks! 8<--------------------------------- >From 20704e35a41664de5f516ed0e02981ac06085102 Mon Sep 17 00:00:00 2001 From: Ian Campbell <ijc@hellion.org.uk> Date: Fri, 7 Mar 2014 04:29:39 +0000 Subject: [PATCH v5.1 7/8] sunxi: mmc support This adds support for the MMC controller on the Allwinner A20 (sun7i) processor. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net> Signed-off-by: Luke Leighton <lkcl@lkcl.net> Signed-off-by: Oliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wills Wang <wills.wang.open@gmail.com> Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Tom Cubie <Mr.hipboi@gmail.com> Cc: Aaron Maoye <leafy.myeh@allwinnertech.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Reviewed-by: Tom Rini <trini@ti.com>
* | esdhc/usdhc: Fix warning when CONFIG_SYS_FSL_ESDHC_USE_PIO is not setTom Rini2014-05-23-0/+3
| | | | | | | | | | | | | | | | In 7168977 we made calls to check_and_invalidate_dcache_range() conditional on !CONFIG_SYS_FSL_ESDHC_USE_PIO. Only define this function in this case as well. Signed-off-by: Tom Rini <trini@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2014-05-23-16/+366
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| * | mmc: provide a select_hwpart implementation for get_device()Stephen Warren2014-05-23-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | This enables specifying which eMMC HW partition to target for any U-Boot command that uses the generic get_partition() function to parse its command-line arguments. Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | eMMC: add support for operations in RPMB partitionPierre Aubert2014-05-23-0/+324
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds functions for read, write and authentication key programming for the Replay Protected Memory Block partition in the eMMC. Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
| * | mmc: Handle switch error status bit in MMC card statusAndrew Gabbasov2014-05-23-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | MMC switch command for unsupported feature (e.g. bus width) sets a switch error bit in card status. This bit should be checked, and, if it's set, no access with new controller settings should be performed. Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
| * | mmc: postponed needless timer initializationMateusz Zalega2014-05-23-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mmc_init() doesn't call get_timer() anymore if MMC is already initialized. <panto> Minor formatting fix. Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
| * | esdhc/usdhc: Fix PIO mode bug in fsl_esdhc driverYe.Li2014-05-22-14/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When configure the fsl_esdhc driver to PIO mode by defining "CONFIG_SYS_FSL_ESDHC_USE_PIO", the SD/MMC read and write will fail. Two bugs in the driver to cause the issue: 1. The read buffer was invalidated after reading from DATAPORT register, which should be only applied to DMA mode. The valid data in cache was overwritten by physical memory. 2. The watermarks are not set in PIO mode, will cause according state not be set. Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* | | Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD2014-05-20-1/+1
|\ \ \ | |/ / | | / | |/ |/| | | | | | | | | Conflicts: boards.cfg Conflicts were trivial once u-boot-arm/master boards.cfg was reformatted (commit 6130c146) to match u-boot/master's own reformatting (commit 1b37fa83).
| * powerpc/85xx: Add T4240RDB board supportChunhe Lan2014-05-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T4240RDB board Specification ---------------------------- Memory subsystem: 6GB DDR3 128MB NOR flash 2GB NAND flash Ethernet: Eight 1G SGMII ports Four 10Gbps SFP+ ports PCIe: Two PCIe slots USB: Two USB2.0 Type A ports SDHC: One SD-card port SATA: One SATA port UART: Dual RJ45 ports Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> [York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]
* | ARM: tegra: set CONFIG_SYS_MMC_MAX_DEVICEStephen Warren2014-05-13-5/+8
|/ | | | | | | | | | | | | | | | | | If CONFIG_API is ever to be enabled on Tegra, this define must be set, since api/api_storage.c uses it. A couple of annoyting things about CONFIG_SYS_MMC_MAX_DEVICE 1) It isn't documented in README. The same is true for a lot of similar defines used by api_storage.c. 2) It doesn't represent MAX_DEVICE but rather NUM_DEVICES, since the valid values are 0..n-1 not 0..n. However, I this patch does not address those shortcomings. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* driver: Add support of image load for MMC & SPI in SPLPrabhakar Kushwaha2014-04-22-0/+26
| | | | | | | Add support of loading image, binary for MMC and SPI during SPL boot. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* driver/mmc: fix compile warningsPrabhakar Kushwaha2014-04-22-1/+5
| | | | | | | | | | | | | | Fix following compile warnings fsl_esdhc_spl.c: In function 'mmc_boot': fsl_esdhc_spl.c:35:10: warning: unused variable 'byte_num' [-Wunused-variable] fsl_esdhc_spl.c:35:7: warning: unused variable 'i' [-Wunused-variable] fsl_esdhc_spl.c:34:8: warning: unused variable 'val' [-Wunused-variable] fsl_esdhc_spl.c:33:6: warning: unused variable 'blklen' [-Wunused-variable] fsl_esdhc_spl.c:105:7: warning: 'tmp_buf' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-08-506/+605
|\ | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile include/configs/trats.h include/configs/trats2.h include/mmc.h
| * mmc:eSDHC: Workaround for data timeout issue on Txxx SoCHaijun.Zhang2014-04-02-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. The Data timeout counter value in eSDHC_SYSCTL register is not working as it should be, so add quirks to enable this workaround to fix it to the max value 0xE. 2. Add CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround. * Update of patch for change mmc interface by Pantelis Antoniou <panto@antoniou-consulting.com> Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: fsl_esdhc: add controller reset in case of data related errors tooAndrew Gabbasov2014-04-02-27/+36
| | | | | | | | | | | | | | | | The controller reset is performed now if command error occurs. This commit adds the reset for the case of data related errors too. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: fsl_esdhc: fix calculation of timeout for data transactionsAndrew Gabbasov2014-04-02-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calculation of the timeout value should be based on actual clock value, written to controller registers. Since mmc->tran_speed is either the maximum allowed speed, or the preliminary value, that is be not yet set to registers, the actual timeout, taken by the controller, based on its clock settings, may be much longer than expected, based on mmc->tran_speed value. In particular it happens at early initialization stage, when typical value of mmc->tran_speed is 20MHz or 26MHz, while actual clock setting, configured in the controller, is 400kHz. It's more correct to use mmc->clock value for timeout calculation instead. Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: Add 'mmc rst-function' sub-commandTom Rini2014-04-02-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | Some eMMC chips may need the RST_n_FUNCTION bit set to a non-zero value in order for warm reset of the system to work. Details on this being required will be part of the eMMC datasheet. Also add using this command to the dra7xx README. * Whitespace fix by panto Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: sh_mmcif: Fix warning by unused variableNobuhiro Iwamatsu2014-04-02-2/+1
| | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * mmc: sh_mmcif: Fix compile errorNobuhiro Iwamatsu2014-04-02-1/+1
| | | | | | | | | | | | | | | | | | | | BY commit "mmc: Split mmc struct, rework mmc initialization (v2)", sh_mmcif has compile error. This fixes compile error. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Pantelis Antoniou <panto@antoniou-consulting.com> Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
| * blackfin: mmc: Correct mmc_host_is_spi and bfin_sdh.cTom Rini2014-03-28-1/+1
| | | | | | | | | | | | | | | | In the recent mmc cleanup, the mmc_host_is_spi macro was broken and bfin_sdh.c had mmc->bus_width turned into mmc_bus_width(mmc), both of which were incorrect. Signed-off-by: Tom Rini <trini@ti.com>
| * mmc: Split mmc struct, rework mmc initialization (v2)Pantelis Antoniou2014-03-24-385/+403
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The way that struct mmc was implemented was a bit of a mess; configuration and internal state all jumbled up in a single structure. On top of that the way initialization is done with mmc_register leads to a lot of duplicated code in drivers. Typically the initialization got something like this in every driver. struct mmc *mmc = malloc(sizeof(struct mmc)); memset(mmc, 0, sizeof(struct mmc); /* fill in fields of mmc struct */ /* store private data pointer */ mmc_register(mmc); By using the new mmc_create call one just passes an mmc config struct and an optional private data pointer like this: struct mmc = mmc_create(&cfg, priv); All in tree drivers have been updated to the new form, and expect mmc_register to go away before long. Changes since v1: * Use calloc instead of manually calling memset. * Mark mmc_register as deprecated. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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