arm-boot/u-boot-imx.git - U-boot NXP imx6

	Commit message (Collapse)	Author	Age	Lines
*	arm: socfpga: fix up a questionable macro for SDMMC	Dinh Nguyen	2015-12-20	-2/+3
\| \| \| \| \| \| \| \|	Move the macro into the socfpga_dwmci_clksel(). Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Marek Vasut <marex@denx.de> [fix parenthesis in the sdmmc_mask]
*	mmc: dwmmc: socfpga: Convert to DM	Marek Vasut	2015-12-07	-76/+60
\| \| \| \| \| \| \| \| \| \| \|	Convert the SoCFPGA shim for registering the DWMMC driver to DM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
*	mmc: socfpga_dw_mmc: Move drvsel and smplsel to dts	Chin Liang See	2015-11-30	-8/+21
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	socfpga_dw_mmc driver will obtain the drvsel and smplsel value from device tree instead of definition in config header file. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Dinh Nguyen <dinh.linux@gmail.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Pantelis Antoniou <pantelis.antoniou@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Marek Vasut <marex@denx.de>
*	mmc: dw_mmc: Probe the MMC from OF	Marek Vasut	2015-09-04	-13/+68
\| \| \| \| \| \| \| \| \| \| \| \| \|	Rework the driver to probe the MMC controller from Device Tree and make it mandatory. There is no longer support for probing from the ancient qts-generated header files. This patch now also removes previous temporary workaround. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com>
*	arm: socfpga: mmc: Pick the clock from clock manager	Pavel Machek	2014-10-06	-4/+11
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	Make the SoCFPGA MMC stub pick clock via the clock manager frequency accessors instead of hard-coding the frequency. Also fix calloc() misuse. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com>
*	socfpga: cleanup socfpga_dw_mmc	Pavel Machek	2014-08-30	-4/+4
\| \| \| \| \| \| \|	Cleanups as suggested by wd on mailing list. Signed-off-by: Pavel Machek <pavel@denx.de> Acked-by: Chin Liang See <clsee@altera.com>
*	socfpga: fix clock manager register definition	Pavel Machek	2014-08-29	-2/+2
\| \| \| \| \| \| \| \| \|	Structure defining clock manager hardware was wrong, leading to wrong registers being accessed and hang in MMC init. This fixes structure to match hardware. Signed-off-by: Pavel Machek <pavel@denx.de>
*	socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA	Chin Liang See	2014-01-09	-0/+68
	To add the DesignWare MMC driver support for Altera SOCFPGA. It required information such as clocks and bus width from platform specific files (SOCFPGA handoff files) Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>