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path: root/drivers/mmc/mv_sdhci.c
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* mv_sdhci: fix warnings on 64-bit buildsRob Herring2015-03-18-2/+2
| | | | | | | | Change addresses to unsigned long to be compatible with 64-bit builds. Regardless of fixing warnings, the device is still only 32-bit capable. Signed-off-by: Rob Herring <robh@kernel.org> Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
* mmc: sdhci: return error when failed add_sdhci().Jaehoon Chung2013-05-06-2/+1
| | | | | | | | | If failed the add_host(), it is reasonable that return value of add_sdhci(). Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* drivers/mmc/mv_sdhci.c: Fix build warningAnatolij Gustschin2012-01-08-2/+1
| | | | | | | | | | | | | Fix: mv_sdhci.c: In function 'mv_sdh_init': mv_sdhci.c:47:22: warning: the comparison will always evaluate as 'true' for the address of 'mv_sdhci_writeb' will never be NULL [-Waddress] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Lei Wen <leiwen@marvell.com> Cc: Andy Fleming <afleming@freescale.com> Acked-by: Lei Wen <leiwen@marvell.com>
* mmc: mv_sdhci: Fix host version read for Armada100Ajay Bhargav2011-11-25-1/+4
| | | | | | | | sdhci_readw does not work for host version read in Armada100 series SoCs. This patch fix this issue by making a sdhci_readl call to get host version. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* mmc: mv_sdhci: fix 8bus width access for 88SV331xV5Lei Wen2011-11-03-0/+33
| | | | | | | | | | | | Marvell 88SV331xV5 platform's sdhci host control is not very standard with the spec in the 8bit handling. It need to set its private register to switch to the 8bit mode which is not included in the standard sdhci registers. This patch mainly hacks the writeb method, and set its private register if it find the driver is going to switch to the 8bit mode. Signed-off-by: Lei Wen <leiwen@marvell.com>
* MMC: add marvell sdhci driverLei Wen2011-07-15-0/+21
This could support both armada100 and pantheon serial in the mainline, while this driver also be tested to support upcoming mg, mmp2 and mmp3 hardware. Signed-off-by: Lei Wen <leiwen@marvell.com> Acked-by: Andy Fleming <afleming@freescale.com>