summaryrefslogtreecommitdiff
path: root/drivers/mmc/fsl_esdhc.c
Commit message (Collapse)AuthorAgeLines
* fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080)Roy Zang2011-01-14-0/+5
| | | | | | | | | | | The default value of the SRS, VS18 and VS30 and ADMAS fields in the host controller capabilities register (HOSTCAPBLT) are incorrect. The default of these bits should be zero instead of one. Clear these bits out when we read HOSTCAPBLT. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Add the workaround for erratum ESDHC111 (enable on P4080)Jerry Huang2011-01-14-1/+9
| | | | | | | | | Do not issue a manual asynchronous CMD12. Instead, use a (software) synchronous CMD12 or AUTOCMD12 to abort data transfer. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Fix esdhc disabled problem on some platformsChenhui Zhao2011-01-14-6/+8
| | | | | | | | | | | | Some new platform's esdhc pins don't share with other function. The eSDHC shouldn't be disabled, even if "esdhc" isn't defined in hwconfig env variable. Use CONFIG_FSL_ESDHC_PIN_MUX to fix this problem. Signed-off-by: Chenhui Zhao <b26998@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Fix the voltage validation processLi Yang2010-12-18-5/+15
| | | | | | | | | | | The current code use all the voltage range support by the host controller to do the validation. This will cause problem when the host supports Low Voltage Range. Change the validation voltage to be based on board setup. Signed-off-by: Li Yang <leoli@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Fix max clock frequencyJerry Huang2010-12-18-1/+1
| | | | | | | | The max clock of MMC is 52MHz Signed-off-by: Jerry Huang <Changm-Ming.Huang@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Use mmc_set_clock to set initial speedJerry Huang2010-12-18-1/+1
| | | | | | | | | | | | | | After booting the u-boot, and first using some SD card (such as Sandisk 2G SD card), because the field 'clock' of struct mmc is zero, this will cause the read transfer is always active and SDHC DATA line is always active, therefore, driver can't handle the next command. Therefore, we use mmc_set_clock to setup both the data structure and HW to the initial clock speed of 400000Hz. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Set the eSHDC DMACTL[SNOOP] bit after resetting the controllerP.V.Suresh2010-12-13-4/+4
| | | | | | | | | eSDHC host controller reset results in clearing of snoop bit also. This patch sets the SNOOP bit after the completion of host controller reset. Without this patch mmc reads are not consistent. Signed-off-by: P.V.Suresh <pala@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* drivers/mmc/fsl_esdhc.c: fix compiler warningsWolfgang Denk2010-05-15-17/+17
| | | | | | | | | | | | | | | | | Commit 77c1458d caused the following compiler warnings: fsl_esdhc.c: In function 'esdhc_pio_read_write': fsl_esdhc.c:142: warning: assignment discards qualifiers from pointer target type fsl_esdhc.c: In function 'esdhc_setup_data': fsl_esdhc.c:169: warning: unused variable 'wml_value' fsl_esdhc.c: In function 'esdhc_pio_read_write': fsl_esdhc.c:164: warning: control reaches end of non-void function Fix these. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Dipen Dudhat <dipen.dudhat@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
* ppc/85xx: PIO Support for FSL eSDHC Controller DriverDipen Dudhat2010-04-23-2/+85
| | | | | | | On some Freescale SoC Internal DMA of eSDHC controller has bug. So PIO Mode has been introduced to do data transfer using CPU. Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
* fsl_esdhc: Only modify the field we are changing in WMLRoy Zang2010-04-07-5/+4
| | | | | | | | | When we set the read or write watermark in WML we should maintain the rest of the register as is, rather than using some hard coded value. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Add function to reset the eSDHC controllerJerry Huang2010-04-07-0/+17
| | | | | | | | | | | | To support multiple block read command we must set abort or use auto CMD12. If we booted from eSDHC controller neither of these are used and thus we need to reset the controller to allow multiple block read to function. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_esdhc: Always stop clock before changing frequencyKumar Gala2010-04-07-8/+3
| | | | | | | | We need to stop the clocks on 83xx/85xx as well as imx. No need to make this code conditional to just imx. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Stefano Babic <sbabic@denx.de>
* fsl_esdhc: add support for mx51 processorStefano Babic2010-03-07-48/+101
| | | | | | | | | The esdhc controller in the mx51 processor is quite the same as the one in some powerpc processors (MPC83xx, MPC85xx). This patches adapts the driver to support the arm mx51. Signed-off-by: Stefano Babic <sbabic@denx.de>
* fsl_esdhc: Add device tree fixupsAnton Vorontsov2009-07-16-0/+19
| | | | | | | | | | | This patch implements fdt_fixup_esdhc() function that is used to fixup the device tree. The function adds status = "disabled" propery if esdhc pins muxed away, otherwise it fixups clock-frequency for esdhc nodes. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
* mmc: drop unnecessary castsRabin Vincent2009-06-02-5/+5
| | | | | | Now that response is a uint, we can drop all the casts. Signed-off-by: Rabin Vincent <rabin@rab.in>
* Add support for the Freescale eSDHC found on 8379 and 8536 SoCsAndy Fleming2009-02-16-0/+348
This uses the new MMC framework Some contributions by Dave Liu <daveliu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-12-27 22:01:03 +0000