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* cosmetic: fsl_pmic: cosmetic for the help messageJason Liu2011-09-30-1/+1
| | | | | | | | | | | | This is cosmetic patch for the help message: Before: pmic dump [numregs] dump registers After: pmic dump [numregs] - dump registers Signed-off-by: Jason Liu <jason.hui@linaro.org> Acked-by: Stefano Babic <sbabic@denx.de>
* Convert ISO-8859 files to UTF-8Albert ARIBAUD2011-08-04-1/+1
| | | | | | | | There was a mix of UTF-8 and ISO-8859 files in the U-Boot source tree, which could cause issues with the patchwork review system. This commit converts all ISO-8859 files to UTF-8. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* Minor coding style cleanup.Wolfgang Denk2011-05-19-2/+2
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* powerpc/8xxx: Fix LAW init to respect pre-initialized entriesKumar Gala2011-04-04-0/+20
| | | | | | | | | | If some pre-boot or earlier stage bootloader (NAND SPL) has setup LAW entries consider them good and mark them used. In the NAND SPL case we skip re-initializing based on the law_table since the SPL phase already did that. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_law: Fix LAW printing functionKumar Gala2011-02-22-1/+1
| | | | | | | | | | | | | We had an extra '0x' in the output of the LAWAR header that would cause output like: LAWBAR11: 0x00000000 LAWAR0x11: 0x80f0001d intead of: LAWBAR11: 0x00000000 LAWAR11: 0x80f0001d Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Add basic support for Freescale's mc9sdz60Stefano Babic2011-02-02-2/+54
| | | | | | | | The patch adds helper funtions for basic access to the registers of the MC9sdz60 chip (multifunctional device with RTC and CAN) via I2C interface. Signed-off-by: Stefano Babic <sbabic@denx.de>
* fsl_pmic: add I2C interface supportLiu Hui-R643432011-02-02-5/+40
| | | | | | This patch add I2C interface for fsl_pmic driver support Signed-off-by: Jason Liu <r64343@freescale.com>
* powerpc/8xxx: Introduce 85xx, 86xx, QorIQ config headersKumar Gala2011-01-19-21/+1
| | | | | | | | | | | Add new headers that capture common defines for a given SoC/processor rather than duplicating that information in board config.h and random other places. Eventually this should be handled by Kconfig & defconfigs Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
* powerpc/p2040: Add various p2040 specific informationKumar Gala2011-01-19-2/+2
| | | | | | | | | | Add P2040 SoC specific information: * SERDES Table * Added p2040 to cpu_type_list and SVR list * Added number of LAWs for p2040 * Set CONFIG_MAX_CPUS to 4 for p2040 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add Support for Freescale P1014 ProcessorPoonam Aggrwal2011-01-19-1/+1
| | | | | | | | | | | | The P1014 is similar to the P1010 processor with the following differences: - 16bit DDR with ECC. (P1010 has 32bit DDR w/o ECC) - no eCAN interface. (P1010 has 2 eCAN interfaces) - Two SGMII interface (P1010 has 3 SGMII) - No secure boot Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add Support for Freescale P1010 ProcessorPoonam Aggrwal2011-01-19-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Key Features include of the P1010: * e500v2 core frequency operation of 500 to 800 MHz * Power consumption less than 5.0 W at 800 MHz core speed * Dual SATA 3 Gbps controllers with integrated PHY * Dual PCI Express controllers * Three 10/100/1000 Mbps enhanced triple-speed Ethernet controllers (eTSECs) * TCP/IP acceleration and classification capabilities * IEEE 1588 support * Lossless flow control * RGMII, SGMII * DDR3 with support for a 32-bit data interface (40 bits including ECC), up to 800 MHz data rate 32/16-bit DDR3 memory controller * Dedicated security engine featuring trusted boot * TDM interface * Dual controller area networks (FlexCAN) controller * SD/MMC card controller supporting booting from Flash cards * USB 2.0 host and device controller with an on-chip, high-speed PHY * Integrated Flash controller (IFC) * Power Management Controller (PMC) * Four-channel, general-purpose DMA controller * I2C controller * Serial peripheral interface (SPI) controller with master and slave support * System timers including a periodic interrupt timer, real-time clock, software watchdog timer, and four general-purpose timers * Dual DUARTs Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Switch from archive libraries to partial linkingSebastien Carlier2010-11-17-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Before this commit, weak symbols were not overridden by non-weak symbols found in archive libraries when linking with recent versions of binutils. As stated in the System V ABI, "the link editor does not extract archive members to resolve undefined weak symbols". This commit changes all Makefiles to use partial linking (ld -r) instead of creating library archives, which forces all symbols to participate in linking, allowing non-weak symbols to override weak symbols as intended. This approach is also used by Linux, from which the gmake function cmd_link_o_target (defined in config.mk and used in all Makefiles) is inspired. The name of each former library archive is preserved except for extensions which change from ".a" to ".o". This commit updates references accordingly where needed, in particular in some linker scripts. This commit reveals board configurations that exclude some features but include source files that depend these disabled features in the build, resulting in undefined symbols. Known such cases include: - disabling CMD_NET but not CMD_NFS; - enabling CONFIG_OF_LIBFDT but not CONFIG_QE. Signed-off-by: Sebastien Carlier <sebastien.carlier@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2010-10-13-3/+7
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| * MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51Stefano Babic2010-09-30-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The actual SPI driver for i.MX31 and i.MX51 controller use a wrong byte ordering, because it is supposed to work only with Freescale's devices, as the Power Controllers (PMIC). The driver is not suitable for general purposes, because the buffers passed to spi_xfer must be 32-bit aligned, as it is used mainly to send integer to PMIC devices. The patch drops any kind of limitation and makes the driver useful with devices controlled sending commands composed by single bytes (or by a odd number of bytes), such as spi flash, sensor, etc. Because the byte ordering is changed, any current driver using this controller must be adapted, too. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | led_display: split led display support into generic and hw-dependent partsIlya Yanok2010-10-12-0/+58
|/ | | | | | | | | | | Split the display command into generic interface and hardware-specific realization for PDSP188x LED display found on hmi1001 and manroland boards. Simple interface for LED displays is defined in include/led-display.h and described in doc/README.LED_display. Driver-specific implementation was moved into drivers/misc/pdsp188x.c file (enabled with CONFIG_PDSP188x set). Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* cmd_usage(): simplify return code handlingWolfgang Denk2010-07-24-20/+13
| | | | | | | | | | | | | | | | Lots of code use this construct: cmd_usage(cmdtp); return 1; Change cmd_usage() let it return 1 - then we can replace all these ocurrances by return cmd_usage(cmdtp); This fixes a few places with incorrect return code handling, too. Signed-off-by: Wolfgang Denk <wd@denx.de>
* powerpc/p3041: Add various p3041 related definesKumar Gala2010-07-20-1/+2
| | | | | | | | | | | There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p3041 to cpu_type_list and SVR list * Added number of LAWs for p3041 * Set CONFIG_MAX_CPUS to 4 for p3041 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/p5020: Add various p5020 related defines (and p5010)Kumar Gala2010-07-20-1/+1
| | | | | | | | | | | There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p5020 & p5010 to cpu_type_list and SVR list * Added number of LAWs for p5020 * Set CONFIG_MAX_CPUS to 2 for p5020 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_law.c: Add print_laws() for FSL_CORENET platforms.Becky Bruce2010-07-16-0/+6
| | | | | | | Add printing of LAWBARH/LAWBARL for FSL_CORENET platforms. Signed-off-by: Becky Bruce <Beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* drivers/misc/fsl_law.c: Rearrange code to avoid duplicationBecky Bruce2010-07-16-77/+48
| | | | | | | | The current code redefines functions based on FSL_CORENET_ vs not - create macros/inlines instead that hide the differences. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* gpio_led: add gpio_request to __led_initThomas Chou2010-07-12-8/+4
| | | | | | | | This patch adds the gpio usage request. The polarity is changed to positive as suggested by Mike Frysinger. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* Make sure that argv[] argument pointers are not modified.Wolfgang Denk2010-07-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The hush shell dynamically allocates (and re-allocates) memory for the argument strings in the "char *argv[]" argument vector passed to commands. Any code that modifies these pointers will cause serious corruption of the malloc data structures and crash U-Boot, so make sure the compiler can check that no such modifications are being done by changing the code into "char * const argv[]". This modification is the result of debugging a strange crash caused after adding a new command, which used the following argument processing code which has been working perfectly fine in all Unix systems since version 6 - but not so in U-Boot: int main (int argc, char **argv) { while (--argc > 0 && **++argv == '-') { /* ====> */ while (*++*argv) { switch (**argv) { case 'd': debug++; break; ... default: usage (); } } } ... } The line marked "====>" will corrupt the malloc data structures and usually cause U-Boot to crash when the next command gets executed by the shell. With the modification, the compiler will prevent this with an error: increment of read-only location '*argv' N.B.: The code above can be trivially rewritten like this: while (--argc > 0 && **++argv == '-') { char *arg = *argv; while (*++arg) { switch (*arg) { ... Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* misc: add gpio based status led driverThomas Chou2010-05-28-0/+31
| | | | | | | | | This patch adds a status led driver followed the GPIO access conventions of Linux. The led mask is used to specify the gpio pin. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Tested-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* MX: Added Freescale Power Management DriverStefano Babic2010-05-05-0/+201
| | | | | | | | | The patch add supports for the Freescale's Power Management Controller (known as Atlas) used together with i.MX31/51 processors. It was tested with a MC13783 (MX31) and MC13892 (MX51). Signed-off-by: Stefano Babic <sbabic@denx.de>
* 85xx: Added various P1012/P1013/P1021/P1022 definesKumar Gala2010-04-07-1/+3
| | | | | | | | | | | | | | There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added P1012/P1013/P1021/P1022 to cpu_type_list and SVR list * Added number of LAWs for P1012/P1013/P1021/P1022 * Set CONFIG_MAX_CPUS to 2 for P1021/P1022 * PCI port config Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* TWL4030: make LEDs selectable for twl4030_led_init()Grazvydas Ignotas2010-01-04-11/+7
| | | | | | | | | | | | Not all boards have both LEDs hooked, so enabling both on boards with single LED will just waste power. Make it possible to choose LEDs by adding argument to twl4030_led_init(). Using this turn on only LEDB for pandora, leave both LEDs on for all other boards, as it was before this patch. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
* ppc/85xx: get_law_entry isn't used in CONFIG_NAND_SPLKumar Gala2009-09-30-0/+4
| | | | | | | Don't include get_law_entry as part of the NAND_SPL build since the code isnt used. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/p4080: Add various p4080 related defines (and p4040)Kumar Gala2009-09-24-0/+2
| | | | | | | | | | | There are various locations that we have chip specific info: * Makefile for which ddr code to build * Added p4080 & p4040 to cpu_type_list and SVR list * Added number of LAWs for p4080 * Set CONFIG_MAX_CPUS to 8 for p4080 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/p4080: Add support for CoreNet style platform LAWsKumar Gala2009-09-24-11/+115
| | | | | | | | | | | | | | | | On CoreNet based platforms the LAW address is split between an high & low register and we no longer shift the address. Also, the target IDs on CoreNet platforms have been completely re-assigned. Additionally, added a new find_law() API to which LAW an address hits in. This is need for the CoreNet style boot release code since it will need to determine what the target ID should be set to for boot window translation. Finally, enamed LAWAR_EN to LAW_EN and moved to header so we can use it elsewhere. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* ppc/85xx: add boot from NAND/eSDHC/eSPI supportMingkai Hu2009-09-15-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MPC8536E is capable of booting form NAND/eSDHC/eSPI, this patch implements these three bootup methods in a unified way - all of these use the general cpu/mpc85xx/start.S, and load the main image to L2SRAM which lets us use the SPD to initialize the SDRAM. For all three bootup methods, the bootup process can be divided into two stages: the first stage will initialize the corresponding controller, configure the L2SRAM, then copy the second stage image to L2SRAM and jump to it. The second stage image is just like the general U-Boot image to configure all the hardware and boot up to U-Boot command line. When boot from NAND, the eLBC controller will first load the first stage image to internal 4K RAM buffer because it's also stored on the NAND flash. The first stage image, also call 4K NAND loader, will initialize the L2SRAM, load the second stage image to L2SRAM and jump to it. The 4K NAND loader's code comes from the corresponding nand_spl directory, along with the code twisted by CONFIG_NAND_SPL. When boot from eSDHC/eSPI, there's no such a first stage image because the CPU ROM code does the same work. It will initialize the L2SRAM according to the config addr/word pairs on the fixed address and initialize the eSDHC/eSPI controller, then load the second stage image to L2SRAM and jump to it. The macro CONFIG_SYS_RAMBOOT is used to control the code to produce the second stage image for all different bootup methods. It's set in the board config file when one of the bootup methods above is selected. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: add register read-back to set_law()Timur Tabi2009-09-08-1/+2
| | | | | | | | | After programming a new LAW, we should read-back the LAWAR register so that we sync the writes. Otherwise, code that attempts to use the new LAW-mapped memory might fail right away. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Added single core members of FSL P1xx/P2xx processors seriesPoonam Aggrwal2009-08-28-1/+2
| | | | | | | | P1011 - Single core variant of P1020 P2010 - Single core variant of P2020 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Added P1020 Processor Support.Poonam Aggrwal2009-08-28-1/+1
| | | | | | | | | | | | | | P1020 is another member of QorIQ series of processors which falls in ULE category. It is an e500 based dual core SOC. Being a scaled down version of P2020 it has following differences: - 533MHz - 800MHz core frequency. - 256Kbyte L2 cache - Ethernet controllers with classification capabilities. Also the SOC is pin compatible with P2020 Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* OMAP3 Move twl4030 power and led functionsTom Rix2009-07-29-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | Because twl4030 now has its own device files, move exiting omap3 power_init_r to a new location. power_init_r is the only function in board/omap3/common. It initializes the twl4030 power for the board and enables the led. The power part of the the function is moved to twl4030_power_init in drivers/power/twl4030.c The power compilation is conditional on the existing config variable CONFIG_TWL4030_POWER. The led part is moved to twl4030_led_init in the new file drivers/misc/twl4030_led.c The led compilation is conditional on the new config variable CONFIG_TWL4030_LED The directory board/omap3/common was removed because power_init_r was the only function in it. Signed-off-by: Tom Rix <Tom.Rix@windriver.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Heiko Schocher <hs@denx.de>
* General help message cleanupWolfgang Denk2009-06-12-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many of the help messages were not really helpful; for example, many commands that take no arguments would not print a correct synopsis line, but "No additional help available." which is not exactly wrong, but not helpful either. Commit ``Make "usage" messages more helpful.'' changed this partially. But it also became clear that lots of "Usage" and "Help" messages (fields "usage" and "help" in struct cmd_tbl_s respective) were actually redundant. This patch cleans this up - for example: Before: => help dtt dtt - Digital Thermometer and Thermostat Usage: dtt - Read temperature from digital thermometer and thermostat. After: => help dtt dtt - Read temperature from Digital Thermometer and Thermostat Usage: dtt Signed-off-by: Wolfgang Denk <wd@denx.de>
* fsl_law: Fix bug in calculation of LAW sizingKumar Gala2009-04-04-0/+3
| | | | | | | | In set_ddr_laws() when we determined how much of the size requested to be mapped was covered by the the first LAW we needed to recalculate the size based on what was actually mapped. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* MPC85xx: Add MPC8569 CPU supportHaiying Wang2009-03-30-1/+1
| | | | | | | | | There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage, then invalidate it after LBCR bit 13 is set. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Move ali512x.hGraeme Russ2009-03-20-1/+1
| | | | | | Moved ali512x.h from include/asm-i386/ic/ to /include Signed-off-by: Graeme Russ <graeme.russ at gmail.com>
* mpc85xx: Add support for the P2020Srikanth Srinivasan2009-02-16-1/+2
| | | | | | | | | | | Added various p2020 processor specific details: * SVR for p2020, p2020E * immap updates for LAWs and DDR on p2020 * LAW defines related to p2020 Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Command usage cleanupPeter Tyser2009-01-28-1/+1
| | | | | | | | Remove command name from all command "usage" fields and update common/command.c to display "name - usage" instead of just "usage". Also remove newlines from command usage fields. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Standardize command usage messages with cmd_usage()Peter Tyser2009-01-28-2/+2
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Add support for Maxim's DS4510 I2C devicePeter Tyser2009-01-24-0/+425
| | | | | | | | | | | | | Initial support for the DS4510, a CPU supervisor with integrated EEPROM, SRAM, and 4 programmable non-volatile GPIO pins. The CONFIG_DS4510 define enables support for the device while the CONFIG_CMD_DS4510 define enables the ds4510 command. The additional CONFIG_DS4510_INFO, CONFIG_DS4510_MEM, and CONFIG_DS4510_RST defines add additional sub-commands to the ds4510 command when defined. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* fsl_law clear enable before changing.Ed Swarthout2008-10-18-0/+1
| | | | | | | Debug sessions may have left enabled laws. Changing lawbar with an unkown enabled tgtid could cause problems. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-39/+39
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* mpc85xx: Add support for the MPC8536Kumar Gala2008-08-27-1/+1
| | | | | | | | | | | The MPC8536 Adds SDHC and SATA controllers to the PQ3 family. We also have SERDES init code for the 8536. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Dejan Minic <minic@freescale.com> Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Dave Liu <daveliu@freescale.com>
* FSL DDR: Provide a generic set_ddr_laws()Kumar Gala2008-08-27-0/+39
| | | | | | | Provide a helper function that will setup the last available LAWs (upto 2) for DDR. Useful for SPD/dyanmic DDR setting code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* drivers/misc: Move conditional compilation to MakefileJean-Christophe PLAGNIOL-VILLARD2008-08-13-16/+3
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* FSL LAW: Add new interface to use the last free LAWKumar Gala2008-06-11-0/+19
| | | | | | | | LAWs have the concept of priority so its useful to be able to allocate the lowest (highest number) priority. We will end up using this with the new DDR code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* FSL LAW: Keep track of LAW allocationsKumar Gala2008-06-11-7/+39
| | | | | | | | | | | | | | | Make it so we keep track of which LAWs have allocated and provide a function (set_next_law) which can allocate a LAW for us if one is free. In the future we will move to doing more "dynamic" LAW allocation since the majority of users dont really care about what LAW number they are at. Also, add CONFIG_MPC8540 or CONFIG_MPC8560 to those boards which needed them Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Big white-space cleanup.Wolfgang Denk2008-05-21-4/+4
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
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