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| * | i2c: switch from AT91 legacy to ATMEL legacyAndreas Bießmann2013-11-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Since the required API is gpio which is enclosed with CONFIG_ATMEL_LEGACY use that switch here. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Heiko Schocher <hs@denx.de>
* | | i2c: samsung: register i2c busses for Exynso5420 and Exynos5250Naveen Krishna Ch2013-12-06-48/+176
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds the U_BOOT_I2C_ADAP_COMPLETE defines for channels on Exynos5420 and Exynos5250 and also adds support for init function for hsi2c channels Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
* | | arm: omap: i2c: don't zero cnt in i2c_writeNikita Kiryanov2013-12-05-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Writing zero into I2Ci.I2C_CNT register causes random I2C failures in OMAP3 based devices. This seems to be related to the following advisory which apears in multiple erratas for OMAP3 SoCs (OMAP35xx, DM37xx), as well as OMAP4430 TRM: Advisory: I2C Module Does Not Allow 0-Byte Data Requests Details: When configured as the master, the I2C module does not allow 0-byte data transfers. Note: Programming I2Ci.I2C_CNT[15:0]: DCOUNT = 0 will cause undefined behavior. Workaround(s): No workaround. Do not use 0-byte data requests. The writes in question are unnecessary from a functional point of view. Most of them are done after I/O has finished, and the only one that preceds I/O (in i2c_probe()) is also unnecessary because a stop bit is sent before actual data transmission takes place. Therefore, remove all writes that zero the cnt register. Cc: Heiko Schocher <hs@denx.de> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Tom Rini <trini@ti.com> Cc: Lubomir Popov <lpopov@mm-sol.com> Cc: Enric Balletbo Serra <eballetbo@gmail.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Lubomir Popov <lpopov@mm-sol.com>
* | | i2c: fti2c010: serial out r/w address in MSB orderKuo-Jung Su2013-12-05-8/+18
| | | | | | | | | | | | | | | | | | | | | | | | For a eeprom with a 2-bytes address (e.g., Ateml AT24C1024B), the r/w address should be serial out in MSB order. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Heiko Schocher <hs@denx.de>
* | | i2c: fti2c010: migrate to new i2c modelKuo-Jung Su2013-12-05-166/+133
| | | | | | | | | | | | | | | | | | | | | Replace the legacy i2c model with the new one. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Heiko Schocher <hs@denx.de>
* | | i2c: fti2c010: cosmetic: coding style cleanupKuo-Jung Su2013-12-05-15/+16
| | | | | | | | | | | | | | | | | | | | | Coding style cleanup Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Heiko Schocher <hs@denx.de>
* | | driver:i2c:s3c24x0: fix clock init for hsi2cPiotr Wilczek2013-12-05-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix clock value initialisation for Exynos other than Exynos5 for hsi2c. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Heiko Schocher <hs@denx.de>
* | | driver:i2c:s3c24x0: adapt driver to new i2cPiotr Wilczek2013-12-05-57/+97
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adapts the s3c24x0 driver to the new i2c framework. Config file is modified for all the boards that use the driver. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com> CC: Heiko Schocher <hs@denx.de> CC: Inderpal Singh <inderpal.singh@linaro.org> CC: David Müller <d.mueller@elsoft.ch> CC: Chander Kashyap <k.chander@samsung.com> CC: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Reviewed-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
* | designware_i2c: remove 10msec delay in i2c_xfer_finishAlexey Brodkin2013-11-13-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This delay applies to any data transfer on I2C bus. For example 1kB data read with per-byte access (which happens if environment is stored in I2C EEPROM) takes more than 10 seconds. Moreover data bus driver has to care about bus state and data transfer, but not about internal states of attached devices. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> cc: Armando Visconti <armando.visconti@st.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Vipin KUMAR <vipin.kumar@st.com> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Mischa Jonker <mjonker@synopsys.com>
* | designware_i2c: disable i2c controller during target address setupAlexey Brodkin2013-11-13-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As it is stated in DesignWare I2C databook: writes to IC_TAR (0x4) register succeed only when IC_ENABLE[0] is set to 0. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> cc: Armando Visconti <armando.visconti@st.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Vipin KUMAR <vipin.kumar@st.com> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Mischa Jonker <mjonker@synopsys.com>
* | i2c, omap1510: remove i2c driverHeiko Schocher2013-11-13-278/+0
| | | | | | | | | | | | | | | | remove omap1510 i2c driver, as there is no board which uses it Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Jian Zhang <jzhang@ti.com>
* | i2c, zynq: convert zynq i2c driver to new multibus/multiadapter frameworkHeiko Schocher2013-11-13-14/+17
| | | | | | | | | | | | | | | | | | - add zync i2c driver to new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Michal Simek <michal.simek@xilinx.com>
* | i2c, omap24xx: convert driver to new mutlibus/mutliadapter frameworkHeiko Schocher2013-11-13-66/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add omap24xx driver to new multibus/multiadpater support - adapted all config files, which uses this driver Tested on the am335x based siemens boards rut, dxr2 and pxm2 posted here: http://patchwork.ozlabs.org/patch/263211/ Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Tom Rini <trini@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Thomas Weber <weber@corscience.de> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Nishanth Menon <nm@ti.com> Cc: Pali Rohár <pali.rohar@gmail.com> Cc: Peter Barada <peter.barada@logicpd.com> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Michael Jones <michael.jones@matrix-vision.de> Cc: Raphael Assenat <raph@8d.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Stefano Babic <sbabic@denx.de>
* | i2c: mxs_i2c: Squash endless loopMarek Vasut2013-11-13-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The endless waiting for a bit to be set can cause a hang, add a timeout so we prevent such situation. A testcase for such a hang is below. The testcase assumes a device to be present at address 0x50 and a device to NOT be present at address 0x42 . Also note that the "sleep 1" induced delays are imperative for this bug to manifest . i2c read 0x42 0x0.2 0x10 0x42000000 ; sleep 1 ; \ i2c read 0x50 0x0.2 0x10 0x42000000 ; sleep 1 ; \ i2c read 0x42 0x0.2 0x10 0x42000000 The expected result of the above command is: Error reading the chip. Error reading the chip. While without this patch, we observe a hang in the last read from 0x42 precisely when waiting for this bit to be set. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | i2c: sh_i2c: Update to new CONFIG_SYS_I2C frameworkNobuhiro Iwamatsu2013-11-13-164/+132
|/ | | | | | | | This updates to new I2C framwwork on sh_i2c. And this also updates boards(kzm9g and ecovec) that using sh_i2c. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* drivers: convert makefiles to Kbuild styleMasahiro Yamada2013-10-31-46/+24
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* i2c: eliminate warnings in i2c_reloc_fixup functionMasahiro Yamada2013-10-17-7/+5
| | | | | | | | The prototype of handlers had changed. This commit uses cast with (void *) rather than the handler-specific prototype. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* i2c: s3c24xx: add hsi2c controller supportNaveen Krishna Ch2013-10-17-51/+616
| | | | | | | | | | | Add support for hsi2c controller available on exynos5420. Note: driver currently supports only fast speed mode 100kbps Change-Id: I02555b1dc8f4ac21c50aa5158179768563c92f43 Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: R. Chandrasekar <rc.sekar@samsung.com>
* exynos: i2c: Change FDT bus setup code to enumerate ports correctlySimon Glass2013-10-17-7/+19
| | | | | | | | | | | | | | | | | | | | | | At present the i2c ports are enumerated in a strange way - the fdtdec_find_aliases_for_id() function is used, but then the ID returned is ignored and the ports are renumbered. The effect is the same provided that the device tree has the ports in the same order, or uses aliases, and has no gaps, but it is not correct. Adjust the code to use the function as intended. This will allows device tree aliases to change the device order if required. As a result, the i2c_busses variable is dropped. We can't be sure that there are no 'holes' in the list of buses, so must check the whole array. Note: it seems that non-FDT operation is now broken in this drive and will need to be reinstated for upstream. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/59369 Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
* exynos: i2c: Fix i2c driver to handle NACKs properlyNaveen Krishna Ch2013-10-17-124/+90
| | | | | | | | | | | | | The Exynos5 i2c driver does not handle NACKs properly. This change: - fixes the NACK processing problem (do not continue transaction if address cycle was NACKed) - eliminates a fair amount of duplicate code Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Simon Glass <sjg@google.com> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
* Fix: nommu I2C adapter relocation errorJens Scharsig (BuS Elektronik)2013-10-17-4/+0
| | | | | | | | | | NoMMU systems have a access violation problem with i2c_reloc_fixup. Blame for it is a double relocation of the adapter itself. The i2c_adap_p is already relocated, if i2c_reloc_fixup is called. This patch removes the relocation of i2c_adap_p from i2c_reloc_fixup to fix this. Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
* i2c: sh_i2c: Avoid using I2C prior to relocationNobuhiro Iwamatsu2013-10-17-2/+8
| | | | | | | If user uses the I2C in before the relocation, board of sh and rmobile will not start. This will solve this problem. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* i2c, core: optimze i2c_set_bus_num()Heiko Schocher2013-10-17-8/+10
| | | | | | | | | | check first, if we are on the bus, we want to enable. If so, return immediately, do not calc max adapter number, nor check other things. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
* i2c: Add support for Renesas rcarNobuhiro Iwamatsu2013-10-17-0/+289
| | | | | | | This supports i2c controller for Renesas rcar. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* i2c: Zynq: Support for TI PCA9548 bus multiplexerMichael Burr2013-10-17-0/+5
| | | | | | | | (Interface is not quite the same as Phillips PCA9547.) Signed-off-by: Michael Burr <michael.burr@logicpd.com> Cc: Heiko Schocher <hs@denx.de> Cc: Michal Simek <monstr@monstr.eu>
* i2c: mxc: move to new subsystemtrem2013-10-17-60/+79
| | | | Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
* drivers: s3c44b0_i2c: delete an unused driverMasahiro Yamada2013-09-19-300/+0
| | | | | | | | | | Since commit 5dc5f36 removed B2 board support, there are no boards enabling s3c44b0_i2c. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Andrea Scian <andrea.scian@dave-tech.it> Acked-by: Heiko Schocher <hs@denx.de>
* fsl_i2c: add workaround for the erratum I2C A004447Chunhe Lan2013-08-20-3/+11
| | | | | | | | | | | | | | | | | | | | | | | This workaround is for the erratum I2C A004447. Device reference manual provides a scheme that allows the I2C master controller to generate nine SCL pulses, which enable an I2C slave device that held SDA low to release SDA. However, due to this erratum, this scheme no longer works. In addition, when I2C is used as a source of the PBL, the state machine is not able to recover. At the same time, delete the reduplicative definition of SVR_VER and SVR_REV. The SVR_REV is the low 8 bits rather than the low 16 bits of svr. And we use the CONFIG_SYS_FSL_A004447_SVR_REV macro instead of hard-code value 0x10, 0x11 and 0x20. The CONFIG_SYS_FSL_A004447_SVR_REV = 0x00 represents that one version of platform has this I2C errata. So enable this errata by IS_SVR_REV(svr, maj, min) function. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Heiko Schocher <hs@denx.de>
* fsl_i2c: generate nine pulses on SCL if the I2C bus is hungChunhe Lan2013-08-20-2/+57
| | | | | | | | | | When the code detected that the bus is hung (e.g. SDA stuck low), send 9 pulses on SCL to try to fixup the bus. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Heiko Schocher <hs@denx.de>
* tegra: Avoid using I2C prior to relocationSimon Glass2013-08-13-0/+4
| | | | | | | | | Tegra recently moved to the new I2C framework, which sets up I2C prior to relocation, and prior to calling i2c_init_board(). This causes a crash on Tegra boards. Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* i2c: soft: Fix typo in CONFIG_SYS_I2C_SOFT_SPEEDMarek Vasut2013-08-03-4/+4
| | | | | | | | | | | | | | | | In case only the CONFIG_SYS_I2C_SPEED is set in configuration file, the CONFIG_SYS_I2C_SOFT_SPEED is defined as CONFIG_SYS_I2C_SPEED. The CONFIG_SYS_I2C_SOFT_SPEED is then used throughout the driver. Unfortunatelly, due to a typo in the driver, instead of defining CONFIG_SYS_I2C_SOFT_SPEED, an CONFIG_SYS_SOFT_I2C_SPEED was defined and therefore the driver failed to compile. The same applies for CONFIG_SYS_I2C_SOFT_SLAVE , where the swap happens as well. This patch fixes the issue. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
* drivers/i2c: Update fti2c010.[ch], i2c_core.c to use SPDX identifiersTom Rini2013-07-25-17/+3
| | | | | Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2013-07-24-333/+1236
|\ | | | | | | | | | | | | | | | | | | | | The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
| * i2c: add Faraday FTI2C010 I2C controller supportKuo-Jung Su2013-07-23-0/+451
| | | | | | | | | | | | | | | | | | Faraday FTI2C010 is a multi-function I2C controller which supports both master and slave mode. This patch simplily implements the master mode only. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Heiko Schocher <hs@denx.de>
| * I2C: mxc_i2c: Add support for Vybrid VF610 platformAlison Wang2013-07-23-7/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for Vybrid VF610 platform. There are some differences between i.MX6 and Vybrid for I2C controller. (1) The registers' offset are different. (2) The I2C clock divider values are different. (3) In I2C control register, the enable/disable/reset bit is inverted for Vybrid comparing to i.MX6. (4) In I2C status register, the interrupt flag bit is cleared by writing "1" for Vybrid. For i.MX6, this bit is cleared by writing "0". (5) In I2C status register, the arbitration lost flag bit is cleared by writing "1" for Vybrid. For i.MX6, this bit is cleared by writing "0". Signed-off-by: Alison Wang <b18965@freescale.com>
| * i2c, ppc4xx_i2c: switch to new multibus/multiadapter supportDirk Eibach2013-07-23-98/+97
| | | | | | | | | | | | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Heiko Schocher <hs@denx.de> Cc: Stefan Roese <sr@denx.de> Tested-by: Stefan Roese <sr@denx.de>
| * tegra: i2c: Enable new CONFIG_SYS_I2C frameworkSimon Glass2013-07-23-49/+33
| | | | | | | | | | | | | | | | This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra i2c driver to support this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Schocher <hs@denx.de>
| * tegra: i2c: Add function to know about current busSimon Glass2013-07-23-17/+61
| | | | | | | | | | | | | | | | | | | | Rather than using a variable in various places, add a single function, tegra_i2c_get_bus(), which returns a pointer to information about a bus. This will make it easier to move to the new i2c framework. Signed-off-by: Simon Glass <sjg@chromium.org>
| * i2c, fsl_i2c: switch to new multibus/multiadapter supportHeiko Schocher2013-07-23-134/+86
| | | | | | | | | | | | | | | | | | - added to fsl_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
| * i2c, soft-i2c: switch to new multibus/multiadapter supportHeiko Schocher2013-07-23-48/+58
| | | | | | | | | | | | | | | | | | - added to soft_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
| * i2c: add i2c_core and prepare for new multibus supportHeiko Schocher2013-07-23-0/+415
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This Patch introduce the new i2c_core file, which holds the I2C core functions, for the rework of the multibus/ multiadapter support. Also adds changes in i2c.h for the new I2C multibus/multiadapter support. This new support can be activated with the CONFIG_SYS_I2C define. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
* | Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-376/+23
|/ | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* i2c: fsl_i2c: i2c_read(): dont try to write address w/ alen=0Reinhard Pfau2013-07-16-3/+6
| | | | | | | | | if alen is 0: no longer start a write cycle before reading data. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Andy Fleming <afleming@freescale.com>
* EXYNOS: Resolve the i2c compilation errorAmar2013-07-10-8/+1
| | | | | | | | | | | | | | | | This patch resolves the below mentioned compilation error of i2c driver for non-FDT case Compilation error: s3c24x0_i2c.c: In function 'board_i2c_init': s3c24x0_i2c.c:544:18: error: 'CONFIG_MAX_I2C_NUM' undeclared (first use in this function) s3c24x0_i2c.c:544:18: note: each undeclared identifier is reported only once for each function it appears in s3c24x0_i2c.c:545:3: warning: implicit declaration of function Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Amar <amarendra.xt@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: I2C: Add FDT and non-FDT support for I2CAmar2013-06-24-2/+10
| | | | | | | | | This patch updates the function board_i2c_init() to add support for both FDT and non-FDT for I2C, and initialise the I2C channels. Signed-off-by: Amar <amarendra.xt@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: OMAP: I2C: New read, write and probe functionsLubomir Popov2013-06-10-191/+299
| | | | | | | | | | | | | | | | | | | New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4 (4430/60/70), OMAP5 (5430) and AM335X (3359); should work on older OMAPs and derivatives as well. The only anticipated exception would be the OMAP2420, which shall require driver modification. - Rewritten i2c_read to operate correctly with all types of chips (old function could not read consistent data from some I2C slaves). - Optimised i2c_write. - New i2c_probe, performs write access vs read. The old probe could hang the system under certain conditions (e.g. unconfigured pads). - The read/write/probe functions try to identify unconfigured bus. - Status functions now read irqstatus_raw as per TRM guidelines (except for OMAP243X and OMAP34XX). - Driver now supports up to I2C5 (OMAP5). Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Heiko Schocher <hs@denx.de>
* i2c: zynq: Add support for Xilinx ZynqMichal Simek2013-04-30-0/+307
| | | | | | | | | Support Xilinx Zynq i2c controller. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-03-18-5/+37
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Albert's rework of the linker scripts conflicted with Simon's making everyone use __bss_end. We also had a minor conflict over README.scrapyard being added to in mainline and enhanced in u-boot-arm/master with proper formatting. Conflicts: arch/arm/cpu/ixp/u-boot.lds arch/arm/cpu/u-boot.lds arch/arm/lib/Makefile board/actux1/u-boot.lds board/actux2/u-boot.lds board/actux3/u-boot.lds board/dvlhost/u-boot.lds board/freescale/mx31ads/u-boot.lds doc/README.scrapyard include/configs/tegra-common.h Build tested for all of ARM and run-time tested on am335x_evm. Signed-off-by: Tom Rini <trini@ti.com>
| * Tegra: I2C: Add T114 clock support to tegra_i2c driverTom Warren2013-03-14-5/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
* | I2C: S3C24X0: Bug fixes in i2c_transferRajeshwari Shinde2013-03-12-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch corrects the following issues 1) Write the correct M/T Stop value to I2CSTAT after i2c write. According to the spec, after finish the data transmission, we should write a M/T Stop (I2C_MODE_MT | I2C_TXRX_ENA) to I2CSTAT instead of a M/R Stop (I2C_MODE_MR | I2C_TXRX_ENA). 2) Not split the write to I2CSTAT into 2 steps in i2c read. According to the spec, we should write the combined M/R Start value to I2CSTAT after setting the slave address to I2CDS 3) Fix the mistake of making an equality check to an assignment. In the case of I2C write with the zero-length address, while tranfering the data, it should be an equality check (==) instead of an assignment (=). Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
generated by cgit v1.1 at 2024-11-06 17:31:57 +0000