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* dm: fsl_i2c: Use clearer parameter namesmario.six@gdsys.cc2016-05-17-31/+32
| | | | Signed-off-by: Mario Six <mario.six@gdsys.cc>
* dm: fsl_i2c: Rename I2C register structuremario.six@gdsys.cc2016-05-17-57/+66
| | | | Signed-off-by: Mario Six <mario.six@gdsys.cc>
* i2c: designware_i2c: Optionally check enable status registerStefan Roese2016-05-17-0/+9
| | | | | | | | | | | | | Some platforms don't implement the enable status register at offset 0x9c. The SPEAr600 platform is one of them. The recently added check to this status register can't be performend on these platforms. This patch introduces a new config option that can be enabled on such platforms not supporting this register. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
* i2c: muxes: Add support for TI PCA954X muxMichal Simek2016-05-17-0/+90
| | | | | | | | | | | | | Add support for common TI i2c mux which is available on ZynqMP zcu102 board. DM i2c mux core code is selecting/deselecting bus before/after every command is performed that's why only one channel is active at a time. That's also the reason why deselect is just disable all available channels. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* i2c: cdns: Support different bus speedsMichal Simek2016-05-17-7/+69
| | | | | | | | | | 400kHz is maximum freq which can be used on Xilinx ZynqMP. Support it with standard divider calculator. Input freq is hardcoded to 100MHz input freq till we have clock driver which can provide this information for exact configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* i2c: cdns: Moving speed setup from probe to set_bus_speed functionMichal Simek2016-05-17-37/+11
| | | | | | | | set_bus_speed is the right function where bus speed should be setup. This move enable option to remove probe and remove functions which are empty. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* i2c: cdns: Read address from DT in ofdata_to_platdataMichal Simek2016-05-17-4/+12
| | | | | | | | Extract reading IP base address in function which is designed for it. Also enable option to read more information from DT in this function. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* Fix spelling of "occurred".Vagrant Cascadian2016-05-02-1/+1
| | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* i2c: designware_i2c: Add support for PCI(e) based I2C cores (x86)Stefan Roese2016-04-25-12/+106
| | | | | | | | | | | | | | | | This patch adds support for the PCI(e) based I2C cores. Which can be found for example on the Intel Bay Trail SoC. It has 7 I2C controllers implemented as PCI devices. This patch also adds the fixed values for the timing registers for BayTrail which are taken from the Linux designware I2C driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* i2c: designware_i2c: Add DM supportStefan Roese2016-04-25-26/+123
| | | | | | | | | | | | This patch adds DM support to the designware I2C driver. It currently supports DM and the legacy I2C support. The legacy support should be removed, once all platforms using it have DM enabled. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
* i2c: designware_i2c: Prepare for DM driver conversionStefan Roese2016-04-25-83/+90
| | | | | | | | | | | | This patch prepares the designware I2C driver for the DM conversion. This is mainly done by removing struct i2c_adapter from the functions that shall be used by the DM driver version as well. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
* i2c: designware_i2c: Integrate set_speed() into dw_i2c_set_bus_speed()Stefan Roese2016-04-25-24/+13
| | | | | | | | | | | Integrating set_speed() into dw_i2c_set_bus_speed() will make the conversion to DM easier for this driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
* i2c: designware_i2c: Add dw_i2c_enable() helper functionStefan Roese2016-04-25-20/+27
| | | | | | | | | | | | | | | dw_i2c_enable() is used to dis-/en-able the I2C controller. It makes sense to add such a function, as the controller is dis-/en-abled multiple times in the code. Additionally, this function now checks, if the controller is really dis-/en-abled. This code is copied from the Linux I2C driver version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* i2c: designware_i2c: Add ic_enable_status to ic_regs structStefan Roese2016-04-25-33/+35
| | | | | | | | | | | | Add the ic_enable_status register to the i2c_regs struct. Additionally the register offsets are added, to better check, if the offset matches the register description in the datasheet. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de>
* dm: i2c: Add driver for Cadence I2C IPMoritz Fischer2016-04-13-0/+343
| | | | | | | | | | | This is a possible drop in replacement for drivers/i2c/zynq-i2c.c Since this is cadence IP it has been renamed to cdns-i2c, to make sense with the compatible string. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Reviewed-by: Heiko Schocher <hs@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* i2c: uniphier: use devm_get_addr() to get base addressMasahiro Yamada2016-04-01-13/+10
| | | | | | | | | Currently, fdtdec_get_addr_size() does not support the address translation, so it cannot handle device trees with non-straight "ranges" properties. (This would be a problem with DTS for UniPhier ARMv8 SoCs.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* omap24xx_i2c: Implement CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOWGuy Thouret2016-03-28-0/+34
| | | | | Signed-off-by: Guy Thouret <guy.thouret@wems.co.uk> Cc: Heiko Schocher <hs@denx.de>
* dm: i2c: mxc_i2c: implement i2c_idle_busPeng Fan2016-03-28-9/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement i2c_idle_bus in driver, then setup_i2c can be dropped for boards which enable DM_I2C/DM_GPIO/PINCTRL. The i2c_idle_bus force bus idle flow follows setup_i2c in arch/arm/imx-common/i2c-mxv7.c This patch is an implementation following linux kernel patch: " commit 1c4b6c3bcf30d0804db0d0647d8ebeb862c6f7e5 Author: Gao Pan <b54642@freescale.com> Date: Fri Oct 23 20:28:54 2015 +0800 i2c: imx: implement bus recovery Implement bus recovery methods for i2c-imx so we can recover from situations where SCL/SDA are stuck low. Once i2c bus SCL/SDA are stuck low during transfer, config the i2c pinctrl to gpio mode by calling pinctrl sleep set function, and then use GPIO to emulate the i2c protocol to send nine dummy clock to recover i2c device. After recovery, set i2c pinctrl to default group setting. " See Documentation/devicetree/bindings/i2c/i2c-imx.txt for detailed description. 1. Introuduce scl_gpio/sda_gpio/bus in mxc_i2c_bus. 2. Discard the __weak attribute for i2c_idle_bus and implement it, since we have pinctrl driver/driver model gpio driver. We can use device tree, but not let board code to do this. 3. gpio state for mxc_i2c is not a must, but it is recommended. If there is no gpio state, driver will give tips, but not fail. 4. The i2c controller was first probed, default pinctrl state will be used, so when need to use gpio function, need to do "pinctrl_select_state(dev, "gpio")" and after force bus idle, need to switch back "pinctrl_select_state(dev, "default")". This is example about how to use the gpio force bus idle function: " &i2c1 { clock-frequency = <100000>; pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; pinctrl-1 = <&pinctrl_i2c1_gpio>; scl-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; sda-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; status = "okay"; [....] }; [.....] pinctrl_i2c1_gpio: i2c1grp_gpio { fsl,pins = < MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x1b8b0 MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x1b8b0 >; }; " Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com>
* mvtwsi: Fix breakage introduced by "Fix mvtwsi not working on sun6i and ↵Hans de Goede2016-01-26-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | newer sunxi SoCs" "Fix mvtwsi not working on sun6i and newer sunxi SoCs" includes the following: @@ -189,7 +200,8 @@ static int twsi_start(struct i2c_adapter *adap, int expected_status) /* globally set TWSIEN in case it was not */ twsi_control_flags |= MVTWSI_CONTROL_TWSIEN; /* assert START */ - writel(twsi_control_flags | MVTWSI_CONTROL_START, &twsi->control); + twsi_control_flags |= MVTWSI_CONTROL_START | MVTWSI_CONTROL_CLEAR_IFLG; + writel(twsi_control_flags, &twsi->control); /* wait for controller to process START */ return twsi_wait(adap, expected_status); } The modification of twsi_control_flags done here was introduced while merging to fix a line > 80 chars, but twsi_control_flags is a global variable and should not be modified like this here, this commit fixes this, restoring mvtwsi functionality. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* x86: ivybridge: Use the I2C driver to perform SMbus initSimon Glass2016-01-24-0/+24
| | | | | | | | Move the init code into the I2C driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: i2c: Add a stub driver for Intel I2C/SMbusSimon Glass2016-01-24-0/+61
| | | | | | | | | | | This is used on most Intel platforms. We don't have a driver for it yet, but add a stub to handle the init. For now this targets ivybridge so we may want to add a device tree binding and generalise it when other platforms are supported. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: i2c: Allow muxes to be enabled for SPL separatelySimon Glass2016-01-21-3/+12
| | | | | | | Since I2C muxes are seldom needed in SPL, and the code for this increases the size somewhat, add a separate option to enable I2C muxes for SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: i2c: Update the driver to use the new clock IDSimon Glass2016-01-21-16/+22
| | | | | | We can use the new clk_get_by_index() function to get the correct clock. Signed-off-by: Simon Glass <sjg@chromium.org>
* sunxi: Add support for the I2C controller which is part of the PRCMJelle van der Waa2016-01-21-0/+11
| | | | | | | | | | | Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: Minor cleanups] Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 2 checkpatch warnings: WARNING: please, no space before tabs Signed-off-by: Heiko Schocher <hs@denx.de>
* i2c: mvtwsi: Fix mvtwsi not working on sun6i and newer sunxi SoCsHans de Goede2016-01-21-4/+16
| | | | | | | | | | | | | | | On sun6i and newer IFLG is a write-clear bit which is cleared by writing 1, rather then a normal r/w bit which is cleared by writing 0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 3 checkpatch warnings in drivers/i2c/mvtwsi.c: WARNING: line over 80 characters ERROR: code indent should use tabs where possible WARNING: please, no spaces at the start of a line Signed-off-by: Heiko Schocher <hs@denx.de>
* Add more SPDX-License-Identifier tagsTom Rini2016-01-19-13/+1
| | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: mvebu: Move SoC selection (A38X vs AXP) into KconfigStefan Roese2016-01-14-1/+1
| | | | | | | | | | | | | | | | | | Until now, the SoC selection for the ARCH_MVEBU platforms has been done in the config header. Using CONFIG_ARMADA_XP in a non-clear way. As it needed to get selected for AXP and A38x based boards. This patch now changes this to move the SoC selection to Kconfig. And also uses CONFIG_ARCH_MVEBU as a common define for both AXP and A38x. This makes things a bit clearer - especially for new board additions. Additionally the defines CONFIG_SYS_MVEBU_DDR_AXP and CONFIG_SYS_MVEBU_DDR_A38X are replaced with the already available CONFIG_ARMADA_38X and CONFIG_ARMADA_XP. And CONFIG_DDR3 is removed, as its not referenced anywhere. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-03-2/+10
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| * i2c: mxc: add a condition in case the parameter is NULLGong Qianyu2016-01-03-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This could avoid executing the code that only applies to i.MX platforms. The bus_i2c_init() is called before relocation and will assgin value to a static variable. If U-Boot is then still running in a flash device, it's theoretically not allowed to write data to flash without an erasing operation. For i.MX platforms, the U-Boot is always running in DDR. Actually it causes asynchronous error when the ARM64 system error report is enabled and the flash write protect is set. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | Kconfig: i2c: Fix indentationMichal Simek2015-12-11-7/+7
| | | | | | | | | | | | | | Use tabs instead of space for indentation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Kconfig: i2c: Fix typo Suport -> SupportMichal Simek2015-12-11-1/+1
| | | | | | | | | | | | | | Fix typo in command description. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | i2c, avr32: fix compiler warning "input is not relaxable"Heiko Schocher2015-11-23-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | compiling U-Boot for avr32 boards shows since commit 3d1957f0ea01 "dm: i2c: Add support for multiplexed I2C buses" this warning: Building current source for 4 boards (4 threads, 8 jobs per thread) avr32: + atstk1002 +(atstk1002) drivers/i2c/built-in.o: warning: input is not relaxable avr32: + grasshopper +(grasshopper) drivers/i2c/built-in.o: warning: input is not relaxable avr32: + atngw100 +(atngw100) drivers/i2c/built-in.o: warning: input is not relaxable avr32: + atngw100mkii +(atngw100mkii) drivers/i2c/built-in.o: warning: input is not relaxable 0 4 0 /4 0:00:16 : atngw100mkii Fix it. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Roger Meier <r.meier@siemens.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Move console definitions into a new console.h fileSimon Glass2015-11-19-0/+1
| | | | | | | | The console includes a global variable and several functions that are only used by a small subset of U-Boot files. Before adding more functions, move the definitions into their own header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* i2c: soft_i2c: Fix bus indizesDirk Eibach2015-11-12-10/+10
| | | | | | | Since busses are sorted in alphabetical order, introducing more than nine busses led to unexpected behaviour. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* hrcon: Add fan controllersDirk Eibach2015-11-12-0/+28
| | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* hrcon: Add support for the DH variantDirk Eibach2015-11-12-0/+28
| | | | | | hrcon DH(dual head) has two video outputs per FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* i2c: ihs_i2c: Fix hold_bus controlDirk Eibach2015-11-12-1/+1
| | | | | | | | Bus has to be held for repeated start regardless of read/write access. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de>
* i2c: ihs_i2c: Use macro bestpracticesDirk Eibach2015-11-12-10/+14
| | | | | | | Reinhard Pfau complained that macros in ihs_i2c do not follow best practices. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de>
* i2c: ihs_i2c: Dual channel supportDirk Eibach2015-11-12-13/+63
| | | | | | | Support two i2c masters per FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-10-30-2/+2
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| * armv8/fsl_lsch3: Change arch to fsl-layerscapeMingkai Hu2015-10-29-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | i2c: Instantiate I2C controllers when selectedMichal Simek2015-10-28-0/+4
|/ | | | | | | | Do not enable both I2C controllers by default. Enable them only when they are selected. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* I2C: mxc_i2c: make I2C1 and I2C2 optionalAlbert ARIBAUD \\(3ADEV\\)2015-10-02-0/+6
| | | | | | | | | | | | | | | | | | | The driver assumed that I2C1 and I2C2 were always enabled, and if they were not, then an asynchronous abort was (silently) raised, to be caught much later on in the Linux kernel. Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4 are. To make the change binary-invariant, declare I2C1 and I2C2 in every include/configs/ file which defines CONFIG_SYS_I2C_MXC. Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed (CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE) config options. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* arm: Remove unused ST-Ericsson u8500 archStefan Roese2015-09-15-780/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This arch does not seem to be supported / used at all in the current U-Boot mainline source tree any more. So lets remove the core u8500 code and code that was only referenced by this platform. Please note that this patch also removes these config options: - CONFIG_PL011_SERIAL_RLCR - CONFIG_PL011_SERIAL_FLUSH_ON_INIT As they only seem to be referenced by u8500 based boards. Without any such board in the current code, these config option don't make sense any more. Lets remove them as well. If someone still wants to use this platform, then please send patches to re-enable support by adding at least one board that references this code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: John Rigby <john.rigby@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tom Rini <trini@konsulko.com> Cc: Heiko Schocher <hs@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* rockchip: Add I2C driverSimon Glass2015-09-02-0/+401
| | | | | | | Add an I2C driver for the Rockchip RK3288, using driver model. It should work for other Rockchip SoCs also. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Use dev_get_addr() where possibleSimon Glass2015-08-31-5/+3
| | | | | | | | | | This is a convenient way for a driver to get the hardware address of a device, when regmap or syscon are not being used. Change existing callers to use it as an example to others. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* of: clean up OF_CONTROL ifdef conditionalsMasahiro Yamada2015-08-18-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* i2c: lpc32xx: correct sanity check for requested bus speedVladimir Zapolskiy2015-08-18-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | LPC32xx has 3 I2C bus controllers, 2 of them are used as generic ones and their parent clock is HCLK and CLK_HI/CLK_LO registers are 10 bit wide. This means that if HCLK is 104MHz, then minimal configurable I2C clock speed is about 51KHz. Only USB OTG I2C bus controller CLK registers are 8 bit wide, thus in assumption that peripheral clock is 13MHz it allows to set the minimal bus speed about 25.5KHz. Check for negative half clock value is removed since it is always false. The change fixes the following problem for I2C busses 0 and 1: => i2c dev 0 Setting bus to 0 => i2c speed 100000 Setting bus speed to 100000 Hz Failure changing bus speed (-22) Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
* i2c: lpc32xx: add support for OTG I2CSylvain Lemieux2015-08-18-3/+17
| | | | | | | | Updated the LPC32xx I2C driver to support the OTG I2C that is part of the USB module. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Acked-by: Marek Vasut <marex@denx.de>
* i2c: lpc32xx: fix write timeoutSylvain Lemieux2015-08-17-0/+2
| | | | | | Fix a condition that generate watchdog timeout inside "lpc32xx_i2c_write" when parameters alen = 0 and len = 0. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
generated by cgit v1.1 at 2024-11-07 19:46:38 +0000