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* mvtwsi: Fix breakage introduced by "Fix mvtwsi not working on sun6i and ↵Hans de Goede2016-01-26-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | newer sunxi SoCs" "Fix mvtwsi not working on sun6i and newer sunxi SoCs" includes the following: @@ -189,7 +200,8 @@ static int twsi_start(struct i2c_adapter *adap, int expected_status) /* globally set TWSIEN in case it was not */ twsi_control_flags |= MVTWSI_CONTROL_TWSIEN; /* assert START */ - writel(twsi_control_flags | MVTWSI_CONTROL_START, &twsi->control); + twsi_control_flags |= MVTWSI_CONTROL_START | MVTWSI_CONTROL_CLEAR_IFLG; + writel(twsi_control_flags, &twsi->control); /* wait for controller to process START */ return twsi_wait(adap, expected_status); } The modification of twsi_control_flags done here was introduced while merging to fix a line > 80 chars, but twsi_control_flags is a global variable and should not be modified like this here, this commit fixes this, restoring mvtwsi functionality. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* x86: ivybridge: Use the I2C driver to perform SMbus initSimon Glass2016-01-24-0/+24
| | | | | | | | Move the init code into the I2C driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: i2c: Add a stub driver for Intel I2C/SMbusSimon Glass2016-01-24-0/+61
| | | | | | | | | | | This is used on most Intel platforms. We don't have a driver for it yet, but add a stub to handle the init. For now this targets ivybridge so we may want to add a device tree binding and generalise it when other platforms are supported. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dm: i2c: Allow muxes to be enabled for SPL separatelySimon Glass2016-01-21-3/+12
| | | | | | | Since I2C muxes are seldom needed in SPL, and the code for this increases the size somewhat, add a separate option to enable I2C muxes for SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: i2c: Update the driver to use the new clock IDSimon Glass2016-01-21-16/+22
| | | | | | We can use the new clk_get_by_index() function to get the correct clock. Signed-off-by: Simon Glass <sjg@chromium.org>
* sunxi: Add support for the I2C controller which is part of the PRCMJelle van der Waa2016-01-21-0/+11
| | | | | | | | | | | Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: Minor cleanups] Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 2 checkpatch warnings: WARNING: please, no space before tabs Signed-off-by: Heiko Schocher <hs@denx.de>
* i2c: mvtwsi: Fix mvtwsi not working on sun6i and newer sunxi SoCsHans de Goede2016-01-21-4/+16
| | | | | | | | | | | | | | | On sun6i and newer IFLG is a write-clear bit which is cleared by writing 1, rather then a normal r/w bit which is cleared by writing 0. Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 3 checkpatch warnings in drivers/i2c/mvtwsi.c: WARNING: line over 80 characters ERROR: code indent should use tabs where possible WARNING: please, no spaces at the start of a line Signed-off-by: Heiko Schocher <hs@denx.de>
* Add more SPDX-License-Identifier tagsTom Rini2016-01-19-13/+1
| | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
* arm: mvebu: Move SoC selection (A38X vs AXP) into KconfigStefan Roese2016-01-14-1/+1
| | | | | | | | | | | | | | | | | | Until now, the SoC selection for the ARCH_MVEBU platforms has been done in the config header. Using CONFIG_ARMADA_XP in a non-clear way. As it needed to get selected for AXP and A38x based boards. This patch now changes this to move the SoC selection to Kconfig. And also uses CONFIG_ARCH_MVEBU as a common define for both AXP and A38x. This makes things a bit clearer - especially for new board additions. Additionally the defines CONFIG_SYS_MVEBU_DDR_AXP and CONFIG_SYS_MVEBU_DDR_A38X are replaced with the already available CONFIG_ARMADA_38X and CONFIG_ARMADA_XP. And CONFIG_DDR3 is removed, as its not referenced anywhere. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-03-2/+10
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| * i2c: mxc: add a condition in case the parameter is NULLGong Qianyu2016-01-03-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This could avoid executing the code that only applies to i.MX platforms. The bus_i2c_init() is called before relocation and will assgin value to a static variable. If U-Boot is then still running in a flash device, it's theoretically not allowed to write data to flash without an erasing operation. For i.MX platforms, the U-Boot is always running in DDR. Actually it causes asynchronous error when the ARM64 system error report is enabled and the flash write protect is set. Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | Kconfig: i2c: Fix indentationMichal Simek2015-12-11-7/+7
| | | | | | | | | | | | | | Use tabs instead of space for indentation. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Kconfig: i2c: Fix typo Suport -> SupportMichal Simek2015-12-11-1/+1
| | | | | | | | | | | | | | Fix typo in command description. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | i2c, avr32: fix compiler warning "input is not relaxable"Heiko Schocher2015-11-23-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | compiling U-Boot for avr32 boards shows since commit 3d1957f0ea01 "dm: i2c: Add support for multiplexed I2C buses" this warning: Building current source for 4 boards (4 threads, 8 jobs per thread) avr32: + atstk1002 +(atstk1002) drivers/i2c/built-in.o: warning: input is not relaxable avr32: + grasshopper +(grasshopper) drivers/i2c/built-in.o: warning: input is not relaxable avr32: + atngw100 +(atngw100) drivers/i2c/built-in.o: warning: input is not relaxable avr32: + atngw100mkii +(atngw100mkii) drivers/i2c/built-in.o: warning: input is not relaxable 0 4 0 /4 0:00:16 : atngw100mkii Fix it. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Roger Meier <r.meier@siemens.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Move console definitions into a new console.h fileSimon Glass2015-11-19-0/+1
| | | | | | | | The console includes a global variable and several functions that are only used by a small subset of U-Boot files. Before adding more functions, move the definitions into their own header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* i2c: soft_i2c: Fix bus indizesDirk Eibach2015-11-12-10/+10
| | | | | | | Since busses are sorted in alphabetical order, introducing more than nine busses led to unexpected behaviour. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* hrcon: Add fan controllersDirk Eibach2015-11-12-0/+28
| | | | Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* hrcon: Add support for the DH variantDirk Eibach2015-11-12-0/+28
| | | | | | hrcon DH(dual head) has two video outputs per FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
* i2c: ihs_i2c: Fix hold_bus controlDirk Eibach2015-11-12-1/+1
| | | | | | | | Bus has to be held for repeated start regardless of read/write access. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de>
* i2c: ihs_i2c: Use macro bestpracticesDirk Eibach2015-11-12-10/+14
| | | | | | | Reinhard Pfau complained that macros in ihs_i2c do not follow best practices. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de>
* i2c: ihs_i2c: Dual channel supportDirk Eibach2015-11-12-13/+63
| | | | | | | Support two i2c masters per FPGA. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-10-30-2/+2
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| * armv8/fsl_lsch3: Change arch to fsl-layerscapeMingkai Hu2015-10-29-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | There are two LS series processors are built on ARMv8 Layersacpe architecture currently, LS2085A and LS1043A. They are based on ARMv8 core although use different chassis, so create fsl-layerscape to refactor the common code for the LS series processors which also paves the way for adding LS1043A platform. Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Signed-off-by: Hou Zhiqiang <B48286@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | i2c: Instantiate I2C controllers when selectedMichal Simek2015-10-28-0/+4
|/ | | | | | | | Do not enable both I2C controllers by default. Enable them only when they are selected. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* I2C: mxc_i2c: make I2C1 and I2C2 optionalAlbert ARIBAUD \\(3ADEV\\)2015-10-02-0/+6
| | | | | | | | | | | | | | | | | | | The driver assumed that I2C1 and I2C2 were always enabled, and if they were not, then an asynchronous abort was (silently) raised, to be caught much later on in the Linux kernel. Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4 are. To make the change binary-invariant, declare I2C1 and I2C2 in every include/configs/ file which defines CONFIG_SYS_I2C_MXC. Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed (CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE) config options. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* arm: Remove unused ST-Ericsson u8500 archStefan Roese2015-09-15-780/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This arch does not seem to be supported / used at all in the current U-Boot mainline source tree any more. So lets remove the core u8500 code and code that was only referenced by this platform. Please note that this patch also removes these config options: - CONFIG_PL011_SERIAL_RLCR - CONFIG_PL011_SERIAL_FLUSH_ON_INIT As they only seem to be referenced by u8500 based boards. Without any such board in the current code, these config option don't make sense any more. Lets remove them as well. If someone still wants to use this platform, then please send patches to re-enable support by adding at least one board that references this code. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: John Rigby <john.rigby@linaro.org> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tom Rini <trini@konsulko.com> Cc: Heiko Schocher <hs@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* rockchip: Add I2C driverSimon Glass2015-09-02-0/+401
| | | | | | | Add an I2C driver for the Rockchip RK3288, using driver model. It should work for other Rockchip SoCs also. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Use dev_get_addr() where possibleSimon Glass2015-08-31-5/+3
| | | | | | | | | | This is a convenient way for a driver to get the hardware address of a device, when regmap or syscon are not being used. Change existing callers to use it as an example to others. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* of: clean up OF_CONTROL ifdef conditionalsMasahiro Yamada2015-08-18-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* i2c: lpc32xx: correct sanity check for requested bus speedVladimir Zapolskiy2015-08-18-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | LPC32xx has 3 I2C bus controllers, 2 of them are used as generic ones and their parent clock is HCLK and CLK_HI/CLK_LO registers are 10 bit wide. This means that if HCLK is 104MHz, then minimal configurable I2C clock speed is about 51KHz. Only USB OTG I2C bus controller CLK registers are 8 bit wide, thus in assumption that peripheral clock is 13MHz it allows to set the minimal bus speed about 25.5KHz. Check for negative half clock value is removed since it is always false. The change fixes the following problem for I2C busses 0 and 1: => i2c dev 0 Setting bus to 0 => i2c speed 100000 Setting bus speed to 100000 Hz Failure changing bus speed (-22) Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
* i2c: lpc32xx: add support for OTG I2CSylvain Lemieux2015-08-18-3/+17
| | | | | | | | Updated the LPC32xx I2C driver to support the OTG I2C that is part of the USB module. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Acked-by: Marek Vasut <marex@denx.de>
* i2c: lpc32xx: fix write timeoutSylvain Lemieux2015-08-17-0/+2
| | | | | | Fix a condition that generate watchdog timeout inside "lpc32xx_i2c_write" when parameters alen = 0 and len = 0. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
* i2c: lpc32xx: fix read timeoutSylvain Lemieux2015-08-17-5/+5
| | | | | | Fix a condition that generate watchdog timeout inside "lpc32xx_i2c_read" when parameters alen != 0 and len = 0. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
* i2c: lpc32xx: use api to get hclk instead of fix valueSylvain Lemieux2015-08-17-1/+1
| | | | | | The HCLK is not constant and can take different value; use the api function to get the value of the HCLK for the I2C clock high and low computation. Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
* drivers: hierarchize drivers Kconfig menuMasahiro Yamada2015-08-12-0/+8
| | | | | | | | | | | The menuconfig for drivers are getting more and more cluttered and unreadable because too many entries are displayed in a single flat menu. Use hierarchic menu for each category. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Update to apply again in a few places, drop USB hunk] Signed-off-by: Tom Rini <trini@konsulko.com>
* cros_ec: Support the LDO access method used by springSimon Glass2015-08-05-0/+91
| | | | | | | | | | | | | | | | | | | | | | | Add a driver to support the special LDO access used by spring. This is a custom method in the cros_ec protocol - it does not use an I2C pass-through. There are two implementation choices: 1. Write a special LDO driver which can talk across the EC. Duplicate all the logic from TPS65090 for retrying when the LDO fails to come up. 2. Write a special I2C bus driver which pretends to be a TPS65090 and transfers reads and writes using the LDO message. Either is distasteful. The latter method is chosen since it results in less code duplication and a fairly simple (30-line) implementation of the core logic. The crosec 'ldo' subcommand could be removed (since i2c md/mw will work instead) but is retained as a convenience. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: cros_ec: Convert the I2C tunnel code to use driver modelSimon Glass2015-08-05-0/+53
| | | | | | | | | | | | | | | | | | | The Chrome OS EC supports tunnelling through to an I2C bus on the EC. This currently uses a copy of the I2C command code and a special 'crosec' sub-command. With driver model we can define an I2C bus which tunnels through to the EC, and use the normal 'i2c' command to access it. This simplifies the code and removes some duplication. Add an I2C driver which tunnels through to the EC. Adjust the EC code to support binding child devices so that it can be set up. Adjust the existing I2C xfer function to fit driver model better. For now the old code remains to allow things to still work. It will be removed in a later patch once the new flow is fully enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* exynos: i2c: Tidy up the driver model codeSimon Glass2015-08-05-36/+103
| | | | | | | | | | | | | | | | | | The existing driver model implementation uses the old non-driver-model code to operate, but has become impossibly tangled as a result. The actual algorithm is quite simple. Also the normal-speed and high-speed buses are quite different and it doesn't seem that useful to put them in the same driver. Finally, there is a bug which breaks communication with the Maxim sound codec and may cause problems with other device. Rewrite the driver model code for normal-speed operation so that it is easier to understand, and fix the bug. Add a TODO to split the drivers. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* exynos: i2c: Fix code style with ReadWriteByte()Simon Glass2015-08-05-7/+7
| | | | | | | | This function should not use mixed case, and it is simpler to use clrbits_le32() when clearing bits. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* i2c: Add a mux for GPIO-based I2C bus arbitrationSimon Glass2015-08-05-0/+157
| | | | | | | | | | | | | | | | | | | | | | | | While I2C supports multi-master buses this is difficult to get right. The implementation on the master side in software is quite complex. Clock-stretching and the arbitrary time that an I2C transaction can take make it difficult to share the bus fairly in the face of high traffic. When one or more masters can be reset independently part-way through a transaction it is hard to know the state of the bus. This driver provides a scheme based on two 'claim' GPIOs, one driven by the AP (Application Processor, meaning the main CPU) and one driven by the EC (Embedded Controller, a small CPU aimed at handling system tasks). With these they can communicate and reliably share the bus. This scheme has minimal overhead and involves very little code. It is used on snow to permit the EC and the AP to share access to the main system PMIC and battery. The scheme can survive reboots by either side without difficulty. This scheme has been tested in the field with millions of devices. Since U-Boot runs on the AP, the terminology used is 'our' claim GPIO, meaning the AP's, and 'their' claim GPIO, meaning the EC's. This terminology is used by the device tree bindings in Linux also. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Add support for multiplexed I2C busesSimon Glass2015-08-05-0/+216
| | | | | | | | | | | | | | | | | Add a new I2C_MUX uclass. Devices in this class can multiplex between several I2C buses, selecting them one at a time for use by the system. The multiplexing mechanism is left to the driver to decide - it may be controlled by GPIOs, for example. The uclass supports only two methods: select() and deselect(). The current mux state is expected to be stored in the mux itself since it is the only thing that knows how to make things work. The mux can record the current state and then avoid switching unless it is necessary. So select() can be skipped if the mux is already in the correct state. Also deselect() can be made a nop if required. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: i2c: Add a function to transfer messagesSimon Glass2015-08-05-0/+11
| | | | | | | | | | | Sometimes it is useful to be able to transfer a raw I2C message. This happens when the chip address needs to be set manually, or when the data to be sent/received is in another buffer. Add a function to provide access to this. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* dm: i2c: Add a message debug functionSimon Glass2015-08-05-0/+16
| | | | | | | Add a way to dump the contents of an I2C message for debugging purposes. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-08-02-1/+2
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| * Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2015-07-17-1/+1
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| * | i2c: fix vf610 supportAlbert ARIBAUD \(3ADEV\)2015-07-10-1/+2
| | | | | | | | | | | | | | | | | | | | | Add support in mxc_i2c driver, iomux_v3 and vf610 architecture for the four I2C instances available in VF610. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
* | | i2c: tegra: Build warning fixes for 64-bitThierry Reding2015-07-27-2/+2
| |/ |/| | | | | | | | | | | | | | | Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | exynos: i2c: Correct bug in pinmux selectionSimon Glass2015-07-10-1/+1
|/ | | | | | | | | | | | When driver model is not used the current code does not correctly select the pinmux for the I2C bus. This bug was introduced by this commit: 8dfcbaa dm: i2c: s3c24x0: adjust to dm-i2c api Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* dm: i2c: Add compatibility functions for dm_i2c_reg_read/write()Simon Glass2015-06-10-0/+21
| | | | | | | | Add the legacy i2c_reg_read/write() functions to the compatibility layer so that they can be used when CONFIG_DM_I2C_COMPAT is defined. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2015-05-30-11/+7
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