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* MLK-10215 Add elan init in i.MX6SL-EVK boardl5.0.0_1.0.0-betaHaibo Chen2015-03-05-0/+14
| | | | | | | | | | | | | | | | | | | | EPDC board contain a elan touch screen, this screen is a i2c slave. If this EPDC board connect to i.MX6SL-EVK board, after uboot boot up, if we do i2c operation, like i2c probe, then the i2c bus block. This is due to the elan touch screen i2c slave. This device needs to do some initialization opearation before its i2c operation, otherwise this i2c device pull down the i2c clk line, and make the i2c bus hang. This means elan needs a special flow on i2c before its address is acked, otherwise the i2c bus will be hang. This patch is a workaround, it add a void function which is defined as a weak symbol in i2c driver, and it is called before every i2c operation. In mx6slevk, this function was overwrite to execute elan initialization. So that, for mx6slevk board, it will initialize elan before every i2c operation, but for other boards, it just work as before. Signed-off-by: Haibo Chen <haibo.chen@freescale.com>
* i2c: sh_i2c: bugfix: i2c probe command does not workTetsuyuki Kobayashi2014-04-14-1/+3
| | | | | | | | | | | | | | | | | | | | This is regression of commit 2035d77d i2c: sh_i2c: Update to new CONFIG_SYS_I2C framework Before commit 2035d77d, i2c probe command works properly on kzm9g board. KZM-A9-GT# i2c probe Valid chip addresses: 0C 12 1D 32 39 3D 40 60 After commit 2035d77d, i2c probe command does not work. KZM-A9-GT# i2c probe Valid chip addresses: 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F sh_i2c_probe() calls sh_i2c_read(), but read length is 0. So acutally it does not read device at all. This patch prepares dummy buffer and read data into it. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* drivers: i2c: delete an unused source fileMasahiro Yamada2014-03-31-387/+0
| | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Heiko Schocher <hs@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-02-26-0/+731
|\ | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/config.mk board/ti/am43xx/mux.c include/configs/am43xx_evm.h Signed-off-by: Tom Rini <trini@ti.com>
| * i2c: kona: Add Kona I2C driverDarwin Rambo2014-02-22-0/+731
| | | | | | | | | | | | | | | | Add support for the Kona I2C controller found on Broadcom mobile SoCs. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Steve Rae <srae@broadcom.com> Reviewed-by: Tim Kryger <tkryger@linaro.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-02-20-3/+0
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| * ARM: IXP: Remove the IXP architecture supportMarek Vasut2014-02-06-3/+0
| | | | | | | | | | | | | | | | | | The architecture is unmaintained and dead, remove it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michael Schwingen <michael@schwingen.org> Cc: Tom Rini <trini@ti.com>
* | designware_i2c: remove inclusion of <asm/arch/hardware.h>Alexey Brodkin2014-02-20-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | As soon as all boards have their CONFIG_SYS_I2C_BASE defined in configuration files instead of "asm/arch/hardware.h" it's safe to remove the inclusion in question and make driver platform-independent. Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vipin Kumar <vipin.kumar@st.com> Cc: Armando Visconti <armando.visconti@st.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | OMAP24xx I2C: Add support for set-speedHannes Petermaier2014-02-20-50/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds support for set-speed on the OMAP24xx I2C Adapter. Changes to omap24_i2c_write(...) for polling ARDY Bit from IRQ-Status. Otherwise on a subsequent call the transfer of last byte from the predecessor is aborted and therefore lost. For exmaple when i2c_write(...) is followed by a i2c_setspeed(...) (which has to deactivate and activate master for changing psc,...). Minor cosmetical changes. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Cc: Heiko Schocher <hs@denx.de>
* | i2c: i2c-mxs: Wait for I2C to empty queueMarek Vasut2014-02-20-7/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure the I2C write queue is empty before leaving the mxs_i2c_write(). If we start and I2C write and only wait for ACK, the MXS I2C IP block may enter next operation while still processing the write aftermath internally. This will in turn disrupt one or more subsequent transfer(s). A testcase for this issue is as such. This testcase is also interesting because the first I2C_WRITE which becomes disruptive happens in the 'i2c read' command. The 'i2c read' command first uses I2C_WRITE to send I2C address of the chip and then uses I2C_READ to read data from the chip. After this command completes, the 'i2c probe' will use sequence of I2C_WRITE commands to probe the I2C bus. The problem is that the first I2C_WRITE disrupted the I2C IP block operation and this sideeffect propagates all the way to this next I2C_WRITE used by the 'i2c probe' call. The result is the 'i2c probe' receives an ACK on I2C address 0x00, even if this ACK was owned by the previous I2C_WRITE operation. Note that the 'i2c read' command must read from a valid I2C chip address. Wrong: > i2c probe Valid chip addresses: 50 51 > i2c read 0x50 0x0.2 0x10 0x42000000 > i2c probe Valid chip addresses: 00 50 51 With this patch > i2c probe Valid chip addresses: 50 51 > i2c read 0x50 0x0.2 0x10 0x42000000 > i2c probe Valid chip addresses: 50 51 Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <festevam@gmail.com>
* | designware_i2c: Enhance DesignWare I2C driver address supportChin Liang See2014-02-20-32/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Enhance the DesignWare I2C driver to support address length more than 1 byte. This enhancement is required as some I2C slave device such as EEPROM chip might have 16 bit address byte. Signed-off-by: Chin Liang See <clsee@altera.com> Acked-by: Alexey Brodkin <Alexey.Brodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> cc: Armando Visconti <armando.visconti@st.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de>
* | blackfin: make i2c driver blackfin independantScott Jiang2014-02-20-71/+80
| | | | | | | | | | | | | | | | | | The ADI twi peripheral is not binding to Blackfin processor only. Access i2c registers by standard io functions. Fix coding style. Signed-off-by: Scott Jiang <scott.jiang.linux@gmail.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* | blackfin: rename bfin-twi_i2c driver to adi_i2cSonic Zhang2014-02-20-0/+378
| | | | | | | | | | | | | | The ADI twi peripheral is not binding to Blackfin processor only. Change to a generic name. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* | blackfin: add spi and i2c specific get clock functionsSonic Zhang2014-02-20-1/+2
| | | | | | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* | blackfin: the sclk MHz in i2c driver should be divided by 1000 other than 1024Sonic Zhang2014-02-20-1/+1
| | | | | | | | Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* | i2c: zynq: Add support for the second i2c controllerMichael Burr2014-02-20-17/+27
| | | | | | | | | | | | | | Initialize the second i2c controller. Signed-off-by: Michael Burr <michael.burr@logicpd.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | i2c: zynq: Support for 0-length register addressMichael Burr2014-02-20-19/+23
|/ | | | | | | | | | Fixed bug with alen == 0 in 'i2c_write', 'i2c_read' Further minor corrections: - Write 'address' register before 'data' register. - Write 'transfer_size' register before 'address' register. Signed-off-by: Michael Burr <michael.burr@logicpd.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* i2c: fti2c010: fix compiler warning on paddr[]Kuo-Jung Su2014-01-13-2/+2
| | | | | | | | | | | | This fixes the following compiler warnings: fti2c010.c: In function 'fti2c010_read': fti2c010.c:204:8: warning: 'paddr' may be used uninitialized in this function [-Wuninitialized] fti2c010.c: In function 'fti2c010_write': fti2c010.c:266:8: warning: 'paddr' may be used uninitialized in this function [-Wuninitialized] Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Heiko Schocher <hs@denx.de>
* drivers/designware_i2c - add suppor of CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOWAlexey Brodkin2014-01-13-0/+38
| | | | | | | | | | | | | | | | | | | Since we agreed on legacy implementation of "eeprom_{read|write}" (http://patchwork.ozlabs.org/patch/295825/) I had to fix/make it work again DesignWare I2C driver for cases when 1 EEPROM IC fake I2C with anumber of "built-in" ICs with different chip addresses. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> cc: Armando Visconti <armando.visconti@st.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Vipin KUMAR <vipin.kumar@st.com> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Mischa Jonker <mjonker@synopsys.com> Cc: Kuo-Jung Su <dantesu@faraday-tech.com>
* i2c: Fix i2c speed commandDarwin Rambo2014-01-13-1/+1
| | | | | | | | | | | | | This corrects i2c core to interpret the value returned by i2c_set_bus_speed as a success indicator rather than the actual speed that was set. When i2c_set_bus_speed returns a failure code, the speed is unknown so the adapter speed is set to zero. Signed-off-by: Darwin Rambo <drambo@broadcom.com> Reviewed-by: Tim Kryger <tim.kryger@linaro.org> Reviewed-by: Steve Rae <srae@broadcom.com> Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
* rcar_i2c: Clear status before start master receiveNobuhiro Iwamatsu2014-01-13-0/+2
| | | | | Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* rcar_i2c: Fix receiving wait conditionHisashi Nakamura2014-01-13-2/+2
| | | | | Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* i2c: tegra: Add the fifth bus on SoC with more than 4 busesAlban Bedel2013-12-18-0/+5
| | | | | | | | | Create the i2c adapter object for the fifth bus on SoC with more than 4 buses. This allow using all the bus available on T30. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-12-10-1/+1
|\ | | | | | | | | | | | | | | Conflicts: board/samsung/trats2/trats2.c include/configs/exynos5250-dt.h Signed-off-by: Tom Rini <trini@ti.com>
| * Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-12-10-528/+283
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compulab/cm_t335/u-boot.lds
| * | i2c: switch from AT91 legacy to ATMEL legacyAndreas Bießmann2013-11-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Since the required API is gpio which is enclosed with CONFIG_ATMEL_LEGACY use that switch here. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Heiko Schocher <hs@denx.de>
* | | i2c: samsung: register i2c busses for Exynso5420 and Exynos5250Naveen Krishna Ch2013-12-06-48/+176
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds the U_BOOT_I2C_ADAP_COMPLETE defines for channels on Exynos5420 and Exynos5250 and also adds support for init function for hsi2c channels Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
* | | arm: omap: i2c: don't zero cnt in i2c_writeNikita Kiryanov2013-12-05-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Writing zero into I2Ci.I2C_CNT register causes random I2C failures in OMAP3 based devices. This seems to be related to the following advisory which apears in multiple erratas for OMAP3 SoCs (OMAP35xx, DM37xx), as well as OMAP4430 TRM: Advisory: I2C Module Does Not Allow 0-Byte Data Requests Details: When configured as the master, the I2C module does not allow 0-byte data transfers. Note: Programming I2Ci.I2C_CNT[15:0]: DCOUNT = 0 will cause undefined behavior. Workaround(s): No workaround. Do not use 0-byte data requests. The writes in question are unnecessary from a functional point of view. Most of them are done after I/O has finished, and the only one that preceds I/O (in i2c_probe()) is also unnecessary because a stop bit is sent before actual data transmission takes place. Therefore, remove all writes that zero the cnt register. Cc: Heiko Schocher <hs@denx.de> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Tom Rini <trini@ti.com> Cc: Lubomir Popov <lpopov@mm-sol.com> Cc: Enric Balletbo Serra <eballetbo@gmail.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Lubomir Popov <lpopov@mm-sol.com>
* | | i2c: fti2c010: serial out r/w address in MSB orderKuo-Jung Su2013-12-05-8/+18
| | | | | | | | | | | | | | | | | | | | | | | | For a eeprom with a 2-bytes address (e.g., Ateml AT24C1024B), the r/w address should be serial out in MSB order. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Heiko Schocher <hs@denx.de>
* | | i2c: fti2c010: migrate to new i2c modelKuo-Jung Su2013-12-05-166/+133
| | | | | | | | | | | | | | | | | | | | | Replace the legacy i2c model with the new one. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Heiko Schocher <hs@denx.de>
* | | i2c: fti2c010: cosmetic: coding style cleanupKuo-Jung Su2013-12-05-15/+16
| | | | | | | | | | | | | | | | | | | | | Coding style cleanup Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Heiko Schocher <hs@denx.de>
* | | driver:i2c:s3c24x0: fix clock init for hsi2cPiotr Wilczek2013-12-05-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Fix clock value initialisation for Exynos other than Exynos5 for hsi2c. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Heiko Schocher <hs@denx.de>
* | | driver:i2c:s3c24x0: adapt driver to new i2cPiotr Wilczek2013-12-05-57/+97
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adapts the s3c24x0 driver to the new i2c framework. Config file is modified for all the boards that use the driver. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com> CC: Heiko Schocher <hs@denx.de> CC: Inderpal Singh <inderpal.singh@linaro.org> CC: David Müller <d.mueller@elsoft.ch> CC: Chander Kashyap <k.chander@samsung.com> CC: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Reviewed-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
* | designware_i2c: remove 10msec delay in i2c_xfer_finishAlexey Brodkin2013-11-13-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This delay applies to any data transfer on I2C bus. For example 1kB data read with per-byte access (which happens if environment is stored in I2C EEPROM) takes more than 10 seconds. Moreover data bus driver has to care about bus state and data transfer, but not about internal states of attached devices. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> cc: Armando Visconti <armando.visconti@st.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Vipin KUMAR <vipin.kumar@st.com> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Mischa Jonker <mjonker@synopsys.com>
* | designware_i2c: disable i2c controller during target address setupAlexey Brodkin2013-11-13-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As it is stated in DesignWare I2C databook: writes to IC_TAR (0x4) register succeed only when IC_ENABLE[0] is set to 0. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Tom Rini <trini@ti.com> cc: Armando Visconti <armando.visconti@st.com> Cc: Stefan Roese <sr@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Vipin KUMAR <vipin.kumar@st.com> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Mischa Jonker <mjonker@synopsys.com>
* | i2c, omap1510: remove i2c driverHeiko Schocher2013-11-13-278/+0
| | | | | | | | | | | | | | | | remove omap1510 i2c driver, as there is no board which uses it Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Jian Zhang <jzhang@ti.com>
* | i2c, zynq: convert zynq i2c driver to new multibus/multiadapter frameworkHeiko Schocher2013-11-13-14/+17
| | | | | | | | | | | | | | | | | | - add zync i2c driver to new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Michal Simek <michal.simek@xilinx.com>
* | i2c, omap24xx: convert driver to new mutlibus/mutliadapter frameworkHeiko Schocher2013-11-13-66/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add omap24xx driver to new multibus/multiadpater support - adapted all config files, which uses this driver Tested on the am335x based siemens boards rut, dxr2 and pxm2 posted here: http://patchwork.ozlabs.org/patch/263211/ Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Tom Rini <trini@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Thomas Weber <weber@corscience.de> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Nishanth Menon <nm@ti.com> Cc: Pali Rohár <pali.rohar@gmail.com> Cc: Peter Barada <peter.barada@logicpd.com> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Michael Jones <michael.jones@matrix-vision.de> Cc: Raphael Assenat <raph@8d.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Stefano Babic <sbabic@denx.de>
* | i2c: mxs_i2c: Squash endless loopMarek Vasut2013-11-13-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The endless waiting for a bit to be set can cause a hang, add a timeout so we prevent such situation. A testcase for such a hang is below. The testcase assumes a device to be present at address 0x50 and a device to NOT be present at address 0x42 . Also note that the "sleep 1" induced delays are imperative for this bug to manifest . i2c read 0x42 0x0.2 0x10 0x42000000 ; sleep 1 ; \ i2c read 0x50 0x0.2 0x10 0x42000000 ; sleep 1 ; \ i2c read 0x42 0x0.2 0x10 0x42000000 The expected result of the above command is: Error reading the chip. Error reading the chip. While without this patch, we observe a hang in the last read from 0x42 precisely when waiting for this bit to be set. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | i2c: sh_i2c: Update to new CONFIG_SYS_I2C frameworkNobuhiro Iwamatsu2013-11-13-164/+132
|/ | | | | | | | This updates to new I2C framwwork on sh_i2c. And this also updates boards(kzm9g and ecovec) that using sh_i2c. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* drivers: convert makefiles to Kbuild styleMasahiro Yamada2013-10-31-46/+24
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* i2c: eliminate warnings in i2c_reloc_fixup functionMasahiro Yamada2013-10-17-7/+5
| | | | | | | | The prototype of handlers had changed. This commit uses cast with (void *) rather than the handler-specific prototype. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* i2c: s3c24xx: add hsi2c controller supportNaveen Krishna Ch2013-10-17-51/+616
| | | | | | | | | | | Add support for hsi2c controller available on exynos5420. Note: driver currently supports only fast speed mode 100kbps Change-Id: I02555b1dc8f4ac21c50aa5158179768563c92f43 Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: R. Chandrasekar <rc.sekar@samsung.com>
* exynos: i2c: Change FDT bus setup code to enumerate ports correctlySimon Glass2013-10-17-7/+19
| | | | | | | | | | | | | | | | | | | | | | At present the i2c ports are enumerated in a strange way - the fdtdec_find_aliases_for_id() function is used, but then the ID returned is ignored and the ports are renumbered. The effect is the same provided that the device tree has the ports in the same order, or uses aliases, and has no gaps, but it is not correct. Adjust the code to use the function as intended. This will allows device tree aliases to change the device order if required. As a result, the i2c_busses variable is dropped. We can't be sure that there are no 'holes' in the list of buses, so must check the whole array. Note: it seems that non-FDT operation is now broken in this drive and will need to be reinstated for upstream. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/59369 Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
* exynos: i2c: Fix i2c driver to handle NACKs properlyNaveen Krishna Ch2013-10-17-124/+90
| | | | | | | | | | | | | The Exynos5 i2c driver does not handle NACKs properly. This change: - fixes the NACK processing problem (do not continue transaction if address cycle was NACKed) - eliminates a fair amount of duplicate code Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-by: Simon Glass <sjg@google.com> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
* Fix: nommu I2C adapter relocation errorJens Scharsig (BuS Elektronik)2013-10-17-4/+0
| | | | | | | | | | NoMMU systems have a access violation problem with i2c_reloc_fixup. Blame for it is a double relocation of the adapter itself. The i2c_adap_p is already relocated, if i2c_reloc_fixup is called. This patch removes the relocation of i2c_adap_p from i2c_reloc_fixup to fix this. Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
* i2c: sh_i2c: Avoid using I2C prior to relocationNobuhiro Iwamatsu2013-10-17-2/+8
| | | | | | | If user uses the I2C in before the relocation, board of sh and rmobile will not start. This will solve this problem. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* i2c, core: optimze i2c_set_bus_num()Heiko Schocher2013-10-17-8/+10
| | | | | | | | | | check first, if we are on the bus, we want to enable. If so, return immediately, do not calc max adapter number, nor check other things. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
* i2c: Add support for Renesas rcarNobuhiro Iwamatsu2013-10-17-0/+289
| | | | | | | This supports i2c controller for Renesas rcar. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* i2c: Zynq: Support for TI PCA9548 bus multiplexerMichael Burr2013-10-17-0/+5
| | | | | | | | (Interface is not quite the same as Phillips PCA9547.) Signed-off-by: Michael Burr <michael.burr@logicpd.com> Cc: Heiko Schocher <hs@denx.de> Cc: Michal Simek <monstr@monstr.eu>
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