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* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-03-18-5/+37
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Albert's rework of the linker scripts conflicted with Simon's making everyone use __bss_end. We also had a minor conflict over README.scrapyard being added to in mainline and enhanced in u-boot-arm/master with proper formatting. Conflicts: arch/arm/cpu/ixp/u-boot.lds arch/arm/cpu/u-boot.lds arch/arm/lib/Makefile board/actux1/u-boot.lds board/actux2/u-boot.lds board/actux3/u-boot.lds board/dvlhost/u-boot.lds board/freescale/mx31ads/u-boot.lds doc/README.scrapyard include/configs/tegra-common.h Build tested for all of ARM and run-time tested on am335x_evm. Signed-off-by: Tom Rini <trini@ti.com>
| * Tegra: I2C: Add T114 clock support to tegra_i2c driverTom Warren2013-03-14-5/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | T114 has a slightly different I2C clock, with a new (extra) divisor in standard/fast mode and HS mode. Tested on my Dalmore, and the I2C clock is 100KHz +/- 3Hz on my Saleae Logic analyzer. Added a new entry in compat_names for T114 I2C since it differs from the previous Tegra SoCs. A flag is set when T114 I2C HW is found so new features like the extra clock divisor can be used. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
* | I2C: S3C24X0: Bug fixes in i2c_transferRajeshwari Shinde2013-03-12-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch corrects the following issues 1) Write the correct M/T Stop value to I2CSTAT after i2c write. According to the spec, after finish the data transmission, we should write a M/T Stop (I2C_MODE_MT | I2C_TXRX_ENA) to I2CSTAT instead of a M/R Stop (I2C_MODE_MR | I2C_TXRX_ENA). 2) Not split the write to I2CSTAT into 2 steps in i2c read. According to the spec, we should write the combined M/R Start value to I2CSTAT after setting the slave address to I2CDS 3) Fix the mistake of making an equality check to an assignment. In the case of I2C write with the zero-length address, while tranfering the data, it should be an equality check (==) instead of an assignment (=). Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
* | I2C: S3C24X0: Remove the dead codeRajeshwari Shinde2013-03-12-7/+0
|/ | | | | | | | This revomes the code under #if 0 in the s3c24x0_i2c driver. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_dataSimon Glass2013-02-04-3/+4
| | | | | | | Move these fields into arch_global_data and tidy up. This is needed for both ppc and m68k since they share the i2c driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* i2c: mxs: Staticize the functions in the driverMarek Vasut2013-01-29-4/+4
| | | | | | | | The local functions in the mxs i2c driver are not marked static, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de>
* Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-01-14-1/+91
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| * I2C: S3C24X0: Resolve build error for VCMA9Rajeshwari Shinde2013-01-14-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch resolves the following build errors for I2C driver in VCMA9: In file included from s3c24x0_i2c.c:40:0: s3c24x0_i2c.h:38:17: error: field 'id' has incomplete type s3c24x0_i2c.c:70:39: error: 'CONFIG_MAX_I2C_NUM' undeclared here (not in a function) s3c24x0_i2c.c:70:31: warning: 'i2c_bus' defined but not used [-Wunused-variable] s3c24x0_i2c.c:72:12: warning: 'i2c_busses' defined but not used [-Wunused-variable] Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * I2C: Driver changes for FDT supportRajeshwari Shinde2013-01-08-1/+90
| | | | | | | | | | | | | | | | | | | | Functions added to get the I2C bus number and reset I2C bus using FDT node. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-01-08-6/+14
|\ \ | |/ |/| | | | | This required manual merging drivers/mtd/nand/Makefile and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
| * omap24xx_i2c: Handle wait_for_bb errorVincent Stehlé2012-12-10-6/+14
| | | | | | | | | | | | | | | | We add a return code to wait_for_bb() to be able to report errors to the callers properly. We in turn handle this new error code in i2c_read, i2c_write and i2c_probe. Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
* | designware_i2c.h: Define IC_CLK only if not already defined in config fileArmando Visconti2012-12-11-0/+2
| | | | | | | | Signed-off-by: Armando Visconti <armando.visconti@st.com>
* | designware_i2c.h: Fixed the correct values for SCL low/high timeArmando Visconti2012-12-11-3/+3
| | | | | | | | Signed-off-by: Armando Visconti <armando.visconti@st.com>
* | designware_i2c: Fixed the setting of the i2c bus speedArmando Visconti2012-12-11-15/+13
| | | | | | | | | | | | | | | | There are three couple (hcnt/lcnt) of registers for each speed (SS/FS/HS). The driver needs to set the proper couple of regs according to what speed we are setting. Signed-off-by: Armando Visconti <armando.visconti@st.com>
* | designware_i2c: Added s/w generation of stop bitArmando Visconti2012-12-11-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the newer versions of designware i2c IP there is the possibility of configuring it with IC_EMPTYFIFO_HOLD_MASTER_EN=1, which basically requires the s/w to generate the stop bit condition directly, as the h/w will not automatically generate it when TX_FIFO is empty. To avoid generation of an extra 0x0 byte sent as data, the IC_STOP command must be sent along with the last IC_CMD. This patch always writes bit[9] of ic_data_cmd even in the older versions, assuming that it is a noop there. Signed-off-by: Armando Visconti <armando.visconti@st.com>
* | designware_i2c.c: Added the support for MULTI_BUSArmando Visconti2012-12-11-1/+81
| | | | | | | | | | | | | | This patch adds the capability to switch between 10 different I2C busses (from 0 to 9). Signed-off-by: Armando Visconti <armando.visconti@st.com>
* | drivers:i2c: Modify I2C driver for Exynos4Piotr Wilczek2012-12-11-7/+12
| | | | | | | | | | | | | | | | This patch modifies the S3C i2c driver to support both Exynos4 and Exynos5 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com>
* | omap24xx_i2c: Handle OMAP5 like OMAP2,3,4Vincent Stehlé2012-12-11-5/+10
| | | | | | | | | | | | | | | | | | | | | | OMAP5 has 8b i2c data register field, like OMAP2, 3 and 4. Handle in the same way. This fixes the following error on OMAP5: OMAP5430 EVM # mmc rescan timed out in wait_for_bb: I2C_STAT=1410 twl6035: could not turn on LDO9. Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
* | mxs: i2c: Implement algorithm to set up arbitrary i2c speedMarek Vasut2012-12-11-53/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This algorithm computes the values of TIMING{0,1,2} registers for the MX28 I2C block. This algorithm was derived by using a scope, but the result seems correct. The resulting values programmed into the registers do not correlate with the contents in datasheet. When using the values from the datasheet, the I2C clock were completely wrong. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Wolfgang Denk <wd@denx.de>
* | mxs: i2c: Restore speed setting after block resetMarek Vasut2012-12-11-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | The I2C block reset configures the I2C bus speed to strange value. Read the I2C speed from the block before reseting the block and restore it afterwards, so the I2C operates correctly. This issue can be replicated by doing unsuccessful I2C transfer, after such transfer finishes, the I2C block clock speed is misconfigured. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | i2c: mxs: Fix TIMING2 register valueMarek Vasut2012-12-11-2/+2
| | | | | | | | | | | | | | | | | | | | | | According to FSL, the value in the TIMING2 register shall be 0x00300030 instead of what's written in the datasheet. This new value correlates with older STMP36xx datasheet. Issues were detected in Linux when this register was misconfigured, so write this correct value. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | i2c: mxs: Use i2c_set_bus_speed() in i2c_init()Marek Vasut2012-12-11-15/+1
| | | | | | | | | | | | | | | | | | Use i2c_set_bus_speed() in i2c_init() within the mxs i2c driver to avoid duplication of code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | i2c: mxs: Implement i2c_get/set_bus_speed()Marek Vasut2012-12-11-0/+45
| | | | | | | | | | | | | | | | | | This patch implements the setup and retrieval functions for the I2C bus speed on the MXS I2C IP. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | i2c: mxs: Abstract out the MXS I2C speed setupMarek Vasut2012-12-11-20/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch pulls out the I2C speed setup from the i2c_init() call and implements the bus configuration lookup table with register values that needs to be programmed into the I2C IP to run at particular speed. This patch is a first step towards implementing run-time I2C bus speed configuration for the MXS I2C IP. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* | i2c: Staticize local functions in mxc i2c driverMarek Vasut2012-12-11-2/+2
| | | | | | | | | | | | | | | | | | Some functions in the MXC i2c driver were not static, fix this by making them so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | soft_i2c: add necessary includes for AVR32Andreas Bießmann2012-12-11-0/+3
|/ | | | Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-10-26-3/+0
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| * arm: Remove support for lpc2292Marek Vasut2012-10-26-3/+0
| | | | | | | | | | | | This stuff has been rotting in the tree for a year now. Remove it. Signed-off-by: Marek Vasut <marex@denx.de>
* | drivers/i2c/fsl_i2c.c: sparse fixKim Phillips2012-10-25-1/+1
|/ | | | | | | fsl_i2c.c:217:14: warning: symbol 'get_i2c_clock' was not declared. Should it be static? Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Heiko Schocher <hs@denx.de>
* i2c: sh_i2c: use setbits/clrbits macroTetsuyuki Kobayashi2012-10-16-4/+4
| | | | | | | Use setbits/clrbits macro when read-modify-write register. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* i2c: sh_i2c.c: check error in i2c_read and i2c_writeTetsuyuki Kobayashi2012-10-16-18/+32
| | | | | | | | Before this patch, i2c_{read,write} always returned 0. Check TACK in i2c_raw_{read,write} so that i2c_{read,write} return non-zero when error. Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
* i2c: sh_i2c: enable i2c_probeTetsuyuki Kobayashi2012-10-16-5/+27
| | | | | | | | | Before this patch i2c_probe() always returned 0 and "i2c probe" command did not work properly. Modify i2c_set_addr() to check TACK when waiting DTE and make i2c_probe() call this function. Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
* i2c: sh_i2c.c: support I2C2, I2C3 and I2C4Tetsuyuki Kobayashi2012-10-16-0/+15
| | | | | | | sh_i2c.c support I2C0 and I2C1. This patch extends it to I2C4. Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
* i2c: sh_i2c.c: adjust for SH73A0Tetsuyuki Kobayashi2012-10-16-0/+4
| | | | | | | | Adjust i2c_raw_read() in sh_i2c.c to work for SH73A0. After this patch, "i2c md" and "i2c mw" command on U-Boot work properly on KZM-A9-GT board. Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
* i2c: sh_i2c.c: correct BUSY bit define in ICSRTetsuyuki Kobayashi2012-10-16-1/+1
| | | | | | | Correct BUSY bit define in ICSR from (1<<3) to (1<<4). Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
* i2c: sh_i2c.c: support iccl and icch extensionTetsuyuki Kobayashi2012-10-16-8/+22
| | | | | | | | R-mobile SoC (at least SH73A0) has extension bits to store 8th bit of iccl and icch. This patch add support for the extentin bits. Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
* imx: Use MXC_I2C_CLK in imx i2c driverMatthias Weisser2012-10-15-2/+2
| | | | | | | | i2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now using MXC_I2C_CLK on all imx systems using i2c. Signed-off-by: Matthias Weisser <weisserm@arcor.de> Acked-by: Stefano Babic <sbabic@denx.de>
* Tegra20: Move some include files to arch-tegra for sharing with Tegra30Tom Warren2012-10-15-2/+2
| | | | | | | | | | | The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file. All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK. Signed-off-by: Tom Warren <twarren@nvidia.com>
* i2c: sh: Remove irq_wait functionNobuhiro Iwamatsu2012-10-03-16/+0
| | | | | | | irq_wait function is not referred to from anywhere. Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-09-21-6/+6
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| * Tegra: Change Tegra20 to Tegra in common code, prep for T30Tom Warren2012-09-10-6/+6
| | | | | | | | | | | | | | | | | | | | Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate. Convert tegra20_ source file and function names to tegra_, also. Upcoming Tegra30 port will use common code/defines/names where possible. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* | omap4 i2c: add support for i2c bus 4Koen Kooi2012-09-06-0/+8
|/ | | | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
* mxs: Convert sys_proto.h prefixes to 'mxs'Otavio Salvador2012-09-01-1/+1
| | | | | | | The sys_proto.h functions (except the boot modes) are compatible with i.MX233 and i.MX28 so we use 'mxs' prefix for its methods. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* tegra20: rename tegra2 -> tegra20Allen Martin2012-09-01-6/+6
| | | | | | | | | | This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* mxs: prefix register structs with 'mxs' prefixOtavio Salvador2012-09-01-6/+6
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* omap24xx_i2c: add 2-byte address supportIlya Yanok2012-09-01-32/+26
| | | | | | | | | | | | | | | Various devices like EEPROMs require 2-byte address support to be properly accessed. This patch adds this support for OMAP2/3/4 I2C controller driver. I've tested it with EEPROM (16 bit address) and TPS65217 chip (8 bit address) on TI Beaglebone board. Unfortunately I don't have access to any compatible hardware with 16bit data register so I can't test if those #ifdef clauses really work. CC: Tom Rini <trini@ti.com> Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* I2C: Add support for Multi channelRajeshwari Shinde2012-07-31-0/+27
| | | | | | | | This adds multiple i2c channel support for I2C. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* I2C: Modify the I2C driver for EXYNOS5Rajeshwari Shinde2012-07-31-77/+117
| | | | | | | | | | | | | | | | | | | This patch modifies the S3C I2C driver to suppport EXYNOS5. The cahnges made to driver are as follows: - I2C base address is passed as a parameter to many functions to avoid multiple #ifdef - Channel initialisation is moved to a commom funation as it is required by i2c_init. - Hardcoding for I2CCON_ACKGEN removed. - Replaced printf with debug. - Checkpatch issues resolved. - Pinmux setting will be done in board/samsung/smdk5250/smdk5250.c to avoid repeated setting of gpio lines, as it have multi bus support. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* I2C: Move struct s3c24x0_i2c to a common place.Rajeshwari Shinde2012-07-31-0/+33
| | | | | | | | | | struct s3c24x0_i2c is being moved to common local header file so that the same can be used by s3c series and exynos series SoCs. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS supportTroy Kisky2012-07-31-0/+17
| | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
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