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path: root/drivers/i2c/omap24xx_i2c.c
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* i2c, omap24xx: add i2c deblock sequenzHeiko Schocher2014-07-16-0/+57
| | | | | | | | | | | | | | | | | | If a bus busy is detected when intializing the driver, toggle 9 times the scl pin. Therefore enable the test mode of the controller, in which the scl, sda pins can be controlled manually. Tested on the siemens boards pxm2, rut and dxr2. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Hannes Petermaier <oe5hpm@oevsv.at> Cc: Lubomir Popov <lpopov@mm-sol.com> Cc: Steve Sakoman <steve@sakoman.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Vincent Stehlé <v-stehle@ti.com> Cc: Samuel Egli <samuel.egli@siemens.com>
* OMAP24xx I2C: Add support for set-speedHannes Petermaier2014-02-20-50/+97
| | | | | | | | | | | | | | | Adds support for set-speed on the OMAP24xx I2C Adapter. Changes to omap24_i2c_write(...) for polling ARDY Bit from IRQ-Status. Otherwise on a subsequent call the transfer of last byte from the predecessor is aborted and therefore lost. For exmaple when i2c_write(...) is followed by a i2c_setspeed(...) (which has to deactivate and activate master for changing psc,...). Minor cosmetical changes. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at> Cc: Heiko Schocher <hs@denx.de>
* arm: omap: i2c: don't zero cnt in i2c_writeNikita Kiryanov2013-12-05-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Writing zero into I2Ci.I2C_CNT register causes random I2C failures in OMAP3 based devices. This seems to be related to the following advisory which apears in multiple erratas for OMAP3 SoCs (OMAP35xx, DM37xx), as well as OMAP4430 TRM: Advisory: I2C Module Does Not Allow 0-Byte Data Requests Details: When configured as the master, the I2C module does not allow 0-byte data transfers. Note: Programming I2Ci.I2C_CNT[15:0]: DCOUNT = 0 will cause undefined behavior. Workaround(s): No workaround. Do not use 0-byte data requests. The writes in question are unnecessary from a functional point of view. Most of them are done after I/O has finished, and the only one that preceds I/O (in i2c_probe()) is also unnecessary because a stop bit is sent before actual data transmission takes place. Therefore, remove all writes that zero the cnt register. Cc: Heiko Schocher <hs@denx.de> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Tom Rini <trini@ti.com> Cc: Lubomir Popov <lpopov@mm-sol.com> Cc: Enric Balletbo Serra <eballetbo@gmail.com> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Lubomir Popov <lpopov@mm-sol.com>
* i2c, omap24xx: convert driver to new mutlibus/mutliadapter frameworkHeiko Schocher2013-11-13-64/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add omap24xx driver to new multibus/multiadpater support - adapted all config files, which uses this driver Tested on the am335x based siemens boards rut, dxr2 and pxm2 posted here: http://patchwork.ozlabs.org/patch/263211/ Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Tom Rini <trini@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Thomas Weber <weber@corscience.de> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Nishanth Menon <nm@ti.com> Cc: Pali Rohár <pali.rohar@gmail.com> Cc: Peter Barada <peter.barada@logicpd.com> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Michael Jones <michael.jones@matrix-vision.de> Cc: Raphael Assenat <raph@8d.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Stefano Babic <sbabic@denx.de>
* ARM: OMAP: I2C: New read, write and probe functionsLubomir Popov2013-06-10-191/+299
| | | | | | | | | | | | | | | | | | | New i2c_read, i2c_write and i2c_probe functions, tested on OMAP4 (4430/60/70), OMAP5 (5430) and AM335X (3359); should work on older OMAPs and derivatives as well. The only anticipated exception would be the OMAP2420, which shall require driver modification. - Rewritten i2c_read to operate correctly with all types of chips (old function could not read consistent data from some I2C slaves). - Optimised i2c_write. - New i2c_probe, performs write access vs read. The old probe could hang the system under certain conditions (e.g. unconfigured pads). - The read/write/probe functions try to identify unconfigured bus. - Status functions now read irqstatus_raw as per TRM guidelines (except for OMAP243X and OMAP34XX). - Driver now supports up to I2C5 (OMAP5). Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Tested-by: Heiko Schocher <hs@denx.de>
* Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-01-08-6/+14
|\ | | | | | | | | This required manual merging drivers/mtd/nand/Makefile and adding am335x_evm support for CONFIG_SPL_NAND_DRIVERS
| * omap24xx_i2c: Handle wait_for_bb errorVincent Stehlé2012-12-10-6/+14
| | | | | | | | | | | | | | | | We add a return code to wait_for_bb() to be able to report errors to the callers properly. We in turn handle this new error code in i2c_read, i2c_write and i2c_probe. Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
* | omap24xx_i2c: Handle OMAP5 like OMAP2,3,4Vincent Stehlé2012-12-11-5/+10
|/ | | | | | | | | | | OMAP5 has 8b i2c data register field, like OMAP2, 3 and 4. Handle in the same way. This fixes the following error on OMAP5: OMAP5430 EVM # mmc rescan timed out in wait_for_bb: I2C_STAT=1410 twl6035: could not turn on LDO9. Signed-off-by: Vincent Stehlé <v-stehle@ti.com>
* omap4 i2c: add support for i2c bus 4Koen Kooi2012-09-06-0/+8
| | | | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
* omap24xx_i2c: add 2-byte address supportIlya Yanok2012-09-01-32/+26
| | | | | | | | | | | | | | | Various devices like EEPROMs require 2-byte address support to be properly accessed. This patch adds this support for OMAP2/3/4 I2C controller driver. I've tested it with EEPROM (16 bit address) and TPS65217 chip (8 bit address) on TI Beaglebone board. Unfortunately I don't have access to any compatible hardware with 16bit data register so I can't test if those #ifdef clauses really work. CC: Tom Rini <trini@ti.com> Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* omap24xx_i2c: Add AM33XX supportTom Rini2012-07-07-3/+3
| | | | | | | | | The same places that check for CONFIG_OMAP44XX need to check for CONFIG_AM33XX as we share the same i2c block. Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Heiko Schocher <hs@denx.de>
* Revert "I2C: OMAP: detect more devices when probing an i2c bus"Tom Rini2012-07-07-11/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 0e57968a215d1b9d271f3fa5bebeddeaea0c8075. The short version of the original commit is that some i2c devices cannot be probed via read as they NAK the first cycle, so try and probe via a write that we abort before it writes to the device. This however is not allowed by the TRM for any of these parts. The section on I2C_CON (table 17-35 I2C_CON for am/dm37x for example) says you must not change the register while STT has been set. On these parts, the unpredictable behavior that the chip exhibits is not problematic. On OMAP4 however it results in the chip being in a bad state: Panda # i2c probe Valid chip addresses: 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5D 5E 5F 60 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7D 7E 7F Panda # i2c md 50 0 timed out in wait_for_pin: I2C_STAT=0 I2C read: I/O error Error reading the chip. We must revert the original behavior to bring probe back into line with the TRM. Cc: Nick Thompson <nick.thompson@ge.com> Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Heiko Schocher <hs@denx.de>
* Revert "ARM: I2C: I2C Multi byte address support"Tom Rini2012-02-21-294/+173
| | | | | | | | | | This reverts commits 2faa76196af4b3e93bcb9e38ed9090cbd3b06db3 as this has introduced some large problems on all other platforms and have more changes in them than the commit message implies. Cc: Heiko Schocher <hs@denx.de> Cc: Patil, Rachna <rachna@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* Revert "ARM: AM33XX: Add AM33XX I2C driver support"Tom Rini2012-02-21-13/+7
| | | | | | | | | This reverts commit 498cbdfe62a8330f6c89765bdd15e60328a26511 as we need to revert the i2c changes that add the support for the platform. Cc: Heiko Schocher <hs@denx.de> Cc: Patil, Rachna <rachna@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* ARM: AM33XX: Add AM33XX I2C driver supportPatil, Rachna2012-01-23-7/+13
| | | | | | | | 1. Compliant with Philips I2C specification version 2.1 2. Supports upto 100Kbps in standard mode Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Patil, Rachna <rachna@ti.com>
* ARM: I2C: I2C Multi byte address supportPatil, Rachna2012-01-23-173/+294
| | | | | | | | | | Existing OMAP I2C driver does not support address length greater than one. Hence this patch is to add support for 2 byte address read/write. Signed-off-by: Philip, Avinash <avinashphilip@ti.com> Signed-off-by: Hebbar, Gururaja <gururaja.hebbar@ti.com> Signed-off-by: Patil, Rachna <rachna@ti.com>
* drivers/i2c/omap24xx_i2c.c: move all local variables to SRAMAndreas Müller2012-01-16-4/+9
| | | | | | | | | | | | | At old overo boards TWL4030 RTC irq is connected to gpio112. Unfortunately this pin is also used for revision detection. Therefore we need to send shut-up to TWL4030 to avoid reading wrong revision. In SPL this must be done before SDRAM is set up because the type of SDRAM is revision dependent. By this patch it is ensured that all variables used by omap24xx_i2c.c are located in SRAM. Signed-off-by: Andreas Müller <schnitzeltony@gmx.de> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
* drivers/i2c/omap24xx_i2c.c: replace printf with one argument by putsAndreas Müller2012-01-16-6/+6
| | | | | Signed-off-by: Andreas Müller <schnitzeltony@gmx.de> Acked-by: Heiko Schocher <hs@denx.de>
* ARMV7: OMAP: I2C driver: cosmetic: make checkpatch-compatibleMichael Jones2011-09-12-52/+53
| | | | | | Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: Write more than 1 byte at a time in i2c_writeMichael Jones2011-09-12-78/+58
| | | | | | | | | | This allows the EEPROM layer to send a single i2c write command per page, and wait CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS between i2c write commands. Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* cosmetic: spell fixes etc.Michael Jones2011-07-28-1/+1
| | | | | Signed-off-by: Michael Jones <michael.jones@matrix-vision.de> Acked-by: Detlev Zundel <dzu@denx.de>
* I2C: OMAP: detect more devices when probing an i2c busNick Thompson2011-04-14-31/+11
| | | | | | | | | | | | | | | | | | | | The omap24xx driver only seems to support devices that have a single subaddress byte. With these types of devices, the first access in a bus transaction is usually a write (writes the subaddress) followed by either a read or write to access the devices registers. Many such devices will respond to a read as the first access, but there are at least some that will NACK such a read. (e.g. ADV7180.) The probe function attempts to detect a devices ACK to a read access only and fails to find devices that NACK a read. This commit modifies the probe function to start a write instead. This detects devices that respond to reads (since they must also respond to writes) as well as those that only respond to writes. The bus is immediately set to idle after a (N)ACK avoiding actually writing anything to the device. Signed-off-by: Nick Thompson <nick.thompson@ge.com>
* Move DECLARE_GLOBAL_DATA_PTR to file scopeJohn Rigby2010-12-21-1/+2
| | | | | | | | | | | | | | | It can be optimised out by the compiler otherwise resulting in obscure errors like a board not booting. This has been documented in README since 2006 when these were first fixed up for GCC 4.x. Signed-off-by: John Rigby <john.rigby@linaro.org> Fix some additional places. Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-By: Albert ARIBAUD <albert.aribaud@free.fr>
* ARMV7: OMAP: I2C driver: Fix bug found in 37XX testingSteve Sakoman2010-10-25-1/+1
| | | | | | | | | | | | | | | | | | | On OMAP36/37XX the standard on chip pullups are not sufficient to ensure proper i2c operation without external pullups or switching to high speed mode and enabling special on chip pullups. This is an issue for Beagle xM, which does not have external pullups on the expansion board i2c lines. The issue manifests itself as an AL (arbitration lost) error when probing for a non-existent device (i.e. on a Beagle xM with no expansion boards attached). This issue does not occur on expansion boards that include pullups or on Overo 37XX COM's since they include pull-ups. This patch fixes the issue by checking for the AL bit in the i2c_probe function. Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
* ARMV7: OMAP: I2C driver: Restructure i2c_probe functionSteve Sakoman2010-10-20-11/+30
| | | | | | | | This patch removes the "magic number" delays and instead monitors state changes in the status register bits. Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org> Tested-by: Heiko Schocher <hs@denx.de>
* ARMV7: OMAP: I2C driver: Restructure i2c_write_byte functionSteve Sakoman2010-10-20-36/+42
| | | | | | | | This patch removes the "magic number" delays and instead monitors state changes in the status register bits. Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org> Tested-by: Heiko Schocher <hs@denx.de>
* ARMV7: OMAP: I2C driver: Restructure i2c_read_byte functionSteve Sakoman2010-10-20-39/+37
| | | | | | | | This patch removes the "magic number" delays and instead monitors state changes in the status register bits. Signed-off-by: Steve Sakoman <steve.sakomanlinaro.org> Tested-by: Heiko Schocher <hs@denx.de>
* ARMV7: OMAP: I2C driver: Use same timeout value as linux kernel driverSteve Sakoman2010-10-20-6/+8
| | | | | | | | | | This patch matches the poll interval (1 millisecond) and timeout (1 second) used in the linux driver. It also adds a return value of 0 in the event of a timeout error and cleans up some formatting errors in that section of the code. Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org> Tested-by: Heiko Schocher <hs@denx.de>
* i2c, omap24xx: set bus_initialized only after relocation.Heiko Schocher2010-09-19-1/+3
| | | | | | | Portions of this work were supported by funding from the CE Linux Forum. Signed-off-by: Heiko Schocher <hs@denx.de>
* Prepare v2010.09-rc1v2010.09-rc1Wolfgang Denk2010-09-10-1/+0
| | | | | | Coding style cleanup. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARMV7: Modify i2c driver for more reliable operation on OMAP4Steve Sakoman2010-08-05-10/+21
| | | | | | | | | | | | This patch modifies the init routine to follow the TRM recommendations. It also modifies the i2c_read_byte function to reflect subtle differences between the i2c controller in OMAP3 and OMAP4. Signed-off-by: Steve Sakoman <steve@sakoman.com> Acked-by: Nishanth Menon <menon.nishanth@gmail.com> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: Restructure OMAP i2c driver to allow code sharing between OMAP3 and OMAP4Steve Sakoman2010-07-05-3/+14
| | | | | | | This patch modifies the omap24xx driver so that it will also work with OMAP4. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* OMAP2/3: I2C: Add support for second and third busDirk Behme2009-11-16-67/+99
| | | | | | | | | | Add support to use second and third I2C bus, too. Bus 0 is still the default, but by calling i2c_set_bus_num(1/2) before doing I2C accesses, code can switch to bus 1 and 2, too. Don't forget to switch back afterwards, then. Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* OMAP I2C Fix the sampling clock.Tom Rix2009-07-28-7/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This problem is seen on Zoom1 and Zoom2 in the startup and when i2c probe is used Before : In: serial Out: serial Err: serial timed out in wait_for_bb: I2C_STAT=1000 timed out in wait_for_bb: I2C_STAT=1000 timed out in wait_for_bb: I2C_STAT=1000 timed out in wait_for_pin: I2C_STAT=1000 I2C read: I/O error timed out in wait_for_bb: I2C_STAT=1000 timed out in wait_for_bb: I2C_STAT=1000 Die ID #327c00020000000004013ddd05026013 Hit any key to stop autoboot: 0 OMAP3 Zoom1# i2c probe Valid chip addresses:timed out in wait_for_bb: I2C_STAT=1000 02 03 04 05 06 07 08 09 0A 0B 0C 0D <snip> After : In: serial Out: serial Err: serial Die ID #327c00020000000004013ddd05026013 Hit any key to stop autoboot: 0 OMAP3 Zoom1# i2c probe Valid chip addresses: 48 49 4A 4B The addresses are for the twl4030. The prescalar that converts the function clock to the sampling clock is hardcoded to 0. The reference manual recommends 7 if the function clock is 96MHz. Instead of just changing the hardcoded values, the prescalar is calculated from the value I2C_IP_CLK. The i2c #defines are in kHz. The speed passed into the i2c init routine is in Hz. To be consistent, change the defines to be in Hz. The timing calculations are based on what is done in the linux 2.6.30 kernel in drivers/i2c/buses/i2c_omap.c as apposed to what is done in TRM. The major variables in the timing caculations are specified as #defines that can be overriden as required. The variables and their defaults are I2C_IP_CLK SYSTEM_CLOCK_96 I2C_INTERNAL_SAMPLING_CLK 19200000 I2C_FASTSPEED_SCLL_TRIM 6 I2C_FASTSPEED_SCLH_TRIM 6 I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM I2C_FASTSPEED_SCLH_TRIM I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM I2C_FASTSPEED_SCLL_TRIM I2C_HIGHSPEED_PHASE_TWO_SCLH I2C_FASTSPEED_SCLH_TRIM This was runtime verified on Zoom1, Zoom2, Beagle and Overo. The 400kHz and 3.4M cases were verifed on test Zoom1, Zoom2, Beagle and Overo configurations. Testing for omap2 will be done in a second step as Nishanth and Jean-Christophe commented. Signed-off-by: Tom Rix <Tom.Rix@windriver.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Heiko Schocher <hs@denx.de>
* OMAP3: Add I2C supportDirk Behme2009-01-24-0/+23
| | | | | | Add I2C support. Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
* ARM: OMAP: Convert IO macrosDirk Behme2008-11-21-67/+64
| | | | | | Convert IO macros to readx/writex. Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
* Cleanup: fix "MHz" spellingWolfgang Denk2008-10-21-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-2/+2
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* i2c: Clean drivers/i2c/ MakefileMichal Simek2008-08-18-4/+0
| | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* drivers/i2c : move i2c drivers to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2007-11-20-0/+329
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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