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path: root/drivers/i2c/mxc_i2c.c
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* i2c:mxc fix array size of i2c_dataPeng Fan2015-01-08-11/+11
| | | | | | | | | | | We should not hardcode array size of i2c_data to 3. To CONFIG_FSL_LSCH3, there are 4 i2c interface, but not 3. So the size of i2c_data array should be calculated using "ARRAY_SIZE(i2c_bases)". To avoid compile error, move i2c_bases before sram_data structure which contains i2c_data array. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* ls102xa: i2c: Add i2c support for LS102xAWang Huan2014-09-08-2/+2
| | | | | | | | | | | The existing i.MX's I2C driver mxc_i2c.c is compatible with the controller of LS102xA. As I2C's registers are 8-bit on LS102xA, I2C_QUIRK_REG is enabled to use 8-bit driver. This patch is to add I2C 1,2,3 support for LS102xA. Signed-off-by: Alison Wang <alison.wang@freescale.com>
* ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoCYork Sun2014-07-03-0/+5
| | | | | | | | | | | | | | Freescale LayerScape with Chassis Generation 3 is a set of SoCs with ARMv8 cores and 3rd generation of Chassis. We use different MMU setup to support memory map and cache attribute for these SoCs. MMU and cache are enabled very early to bootst performance, especially for early development on emulators. After u-boot relocates to DDR, a new MMU table with QBMan cache access is created in DDR. SMMU pagesize is set in SMMU_sACR register. Both DDR3 and DDR4 are supported. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Arnab Basu <arnab.basu@freescale.com>
* driver/mxc_i2c: Move static data structure to global_dataYork Sun2014-04-29-10/+8
| | | | | | | | | This driver needs a data structure in SRAM before SDRAM is available. This is not alway the case using .data section. Moving this data structure to global_data guarantees it is writable. Signed-off-by: York Sun <yorksun@freescale.com> CC: Troy Kisky <troy.kisky@boundarydevices.com>
* i2c: mxc: move to new subsystemtrem2013-10-17-59/+78
| | | | Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2013-07-24-7/+55
|\ | | | | | | | | | | | | | | | | | | | | The sandburst-specific i2c drivers have been deleted, conflict was just over the SPDX conversion. Conflicts: board/sandburst/common/ppc440gx_i2c.c board/sandburst/common/ppc440gx_i2c.h Signed-off-by: Tom Rini <trini@ti.com>
| * I2C: mxc_i2c: Add support for Vybrid VF610 platformAlison Wang2013-07-23-7/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for Vybrid VF610 platform. There are some differences between i.MX6 and Vybrid for I2C controller. (1) The registers' offset are different. (2) The I2C clock divider values are different. (3) In I2C control register, the enable/disable/reset bit is inverted for Vybrid comparing to i.MX6. (4) In I2C status register, the interrupt flag bit is cleared by writing "1" for Vybrid. For i.MX6, this bit is cleared by writing "0". (5) In I2C status register, the arbitration lost flag bit is cleared by writing "1" for Vybrid. For i.MX6, this bit is cleared by writing "0". Signed-off-by: Alison Wang <b18965@freescale.com>
* | Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
|/ | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* i2c: Staticize local functions in mxc i2c driverMarek Vasut2012-12-11-2/+2
| | | | | | | | | Some functions in the MXC i2c driver were not static, fix this by making them so. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* imx: Use MXC_I2C_CLK in imx i2c driverMatthias Weisser2012-10-15-2/+2
| | | | | | | | i2c didn't work on imx25 due to missing MXC_IPG_PERCLK. Now using MXC_I2C_CLK on all imx systems using i2c. Signed-off-by: Matthias Weisser <weisserm@arcor.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS supportTroy Kisky2012-07-31-0/+17
| | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mxc_i2c: add bus recovery supportTroy Kisky2012-07-31-0/+26
| | | | | | | | | Add support for calling a function that will toggle the SCL line to return the bus to idle condition. The actual toggling function is added in a later patch. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mxc_i2c: prep work for multiple busses supportTroy Kisky2012-07-31-21/+104
| | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mxc_i2c: add i2c_regs argument to i2c_imx_stopTroy Kisky2012-07-31-12/+7
| | | | | | | This is prep work for CONFIG_I2C_MULTI_BUS. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* mxc_i2c: add retriesTroy Kisky2012-07-31-9/+27
| | | | | | | Retry unexpected hardware errors. This will not retry a received NAK. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mxc_i2c: check for arbitration lostTroy Kisky2012-07-31-0/+7
| | | | | | | No need to continue waiting if arbitration lost. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* mxc_i2c: change slave addr if conflicts with destination.Troy Kisky2012-07-31-0/+2
| | | | | | | The i2c controller cannot be both master and slave in the same transaction. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mxc_i2c: don't disable controller after every transactionTroy Kisky2012-07-31-15/+13
| | | | | | | This helps in a multiple bus master environment which is why I also added a wait for bus idle. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mxc_i2c: place i2c_reset code inlineTroy Kisky2012-07-31-12/+3
| | | | | | | | imx_reset is only referenced once so move to that location. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* mxc_i2c: place imx_start code inlineTroy Kisky2012-07-31-33/+20
| | | | | | | | imx_start is only referenced once so move to that location. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* mxc_i2c: remove redundant readTroy Kisky2012-07-31-1/+0
| | | | | | | | wait_for_sr_state returns i2sr on success so no need to read again. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into ↵Troy Kisky2012-07-31-51/+29
| | | | | | | | | | | | | | | | | | | | wait_for_sr_state Not using udelay gives a more accurate timeout. The current implementation of udelay in imx-common does not seem to wait at all for a udelay(1). Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> ---- V2: Added WATCHDOG_RESET as suggested by Marek Vasut add error message when stop fails mxc_i2c: code i2c_probe as a 0 length i2c_write Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mxc_i2c.c: code i2c_probe as a 0 length i2c_writeTroy Kisky2012-07-31-17/+8
| | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_writeTroy Kisky2012-07-31-3/+7
| | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
* mxc_i2c: create i2c_init_transferTroy Kisky2012-07-31-26/+18
| | | | | | | | | Initial code of i2c_read and i2c_write is identical, move to subroutine. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mxc_i2c: clear i2sr before waiting for bitTroy Kisky2012-07-31-4/+5
| | | | | | | | | | | Let's clear the sr register before waiting for bit to be set, instead of clearing it after hardware sets it. No real operational difference here, but allows combining of i2c_imx_trx_complete and i2c_imx_bus_busy in later patches. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* mxc_i2c: create tx_byte functionTroy Kisky2012-07-31-58/+24
| | | | | | | | Use tx_byte function instead of having 3 copies of the code. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* mxc_i2c: remove ifdef of CONFIG_HARD_I2CTroy Kisky2012-07-31-5/+1
| | | | | | | | This is always selected when CONFIG_I2C_MXC is selected, so it adds no value. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* mxc_i2c: fix i2c_imx_stopTroy Kisky2012-07-31-1/+1
| | | | | | | | | | Instead of clearing 2 bits, all the other bits were set because '|=' was used instead of '&='. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mxc_i2c: remove setting speed at each startTroy Kisky2012-07-11-6/+0
| | | | | | | | | | | | Other then being very weird, this code was also wrong. For example, say I set speed to 100K. I'll read back the speed as 85937. But the speed is really 85937.5, so we I reset the speed to 85937, I'll get 73660.7. After a couple of transactions my speed is now exactly 68750 so it will remain there. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* mxc_i2c: specify i2c base address in config fileTroy Kisky2012-07-11-21/+4
| | | | | | | | | The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd and mx53loco. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
* I2C: Fix mxc_i2c.c problem on imx31_phycoreMarek Vasut2011-11-03-11/+26
| | | | | | | | | | | | | | | | | The problem was caused by a global variable being used early in the boot process. The symptoms were on imx31_phycore board, reading the environment from I2C EEPROM didn't work correctly and causes default environment to be loaded. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Anatolij Gustschin <agust@denx.de> Tested-by: Stefano Babic <sbabic@denx.de>
* I2C: added I2C-2 and I2C-3 to MX35Stefano Babic2011-11-03-0/+4
| | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* I2C: Add i2c_get/set_speed() to mxc_i2c.cMarek Vasut2011-10-27-8/+23
| | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* I2C: mxc_i2c reworkMarek Vasut2011-09-30-133/+289
| | | | | | | | | | | | | | | | Rewrite the mxc_i2c driver. * This version is much closer to Linux implementation. * Fixes IPG_PERCLK being incorrectly used as clock source * Fixes behaviour of the driver on iMX51 * Clean up coding style a bit ;-) Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Jason Hui <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linro.org> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Jason Liu <jason.hui@linro.org>
* I2C: mxc: fix compilation for MX31Stefano Babic2011-09-07-4/+1
| | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* IMX: MX31: Cleanup include files and drop nasty #ifdef in driversStefano Babic2011-04-27-6/+1
| | | | | | | | | | As exception among the i.MX processors, the i.MX31 has headers without general names (mx31-regs.h, mx31.h instead of imx-regs.h and clock.h). This requires several nasty #ifdef in the drivers to include the correct header. The patch cleans up the driver and renames the header files as for the other i.MX processors. Signed-off-by: Stefano Babic <sbabic@denx.de>
* I2C: mxc_i2c: address failure with mx35 processorStefano Babic2011-02-02-18/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is sporadic failures when more as one I2C slave is on the bus and the processor tries to communicate with more as one slave. The problem was seen on a mx35pdk (two I2C slaves, PMIC controller and CAN/RTC chip). The current driver uses the IIF bit in the status register to check if the bus is busy or not. According to the manual, this is not correct, because the IIB bit should be checked. Not only, to check if a transfer is finished must be checked the ICF bit, and this is not tested at all. This patch comes from analyse with a corresponding driver provided by Freescale as part of the LTIB tool. Comparing the two drivers, it appears that the current u-boot driver checks the wrong bits, and depending on race condition, the transfer can be successful or not. The patch gets rid also of own debug function (DPRINTF), replaced with the general debug(). Tested on Freescale mx35pdk. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* I2C: mxc_i2c: get rid of __REG accessStefano Babic2011-02-02-28/+44
| | | | | | | | | | | This driver accesses to processor's register via __REG macros, that are removed (or are planned to be removed) and replaced by C structures. This patches replaces all occurrencies of __REG macros. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* mxc_i2c: Add support for the i.MX35 processorStefano Babic2011-02-02-4/+5
| | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
* mxc_i2c: add support for MX53 processorLiu Hui-R643432011-02-02-3/+18
| | | | | | This patch add I2C support for Freescale MX53 processor Signed-off-by: Jason Liu <r64343@freescale.com>
* i.MX31: Start the I2C clock on driver initialisationGuennadi Liakhovetski2009-02-14-0/+6
| | | | | | | | | | | | i.MX31 powers on with most clocks running, so, after a power on this explicit clock start up is not required. However, as Linux boots it disables most clocks to save power. This includes the I2C clock. If we then soft reboot from Linux the I2C clock stays off. This breaks the phycore, which has its environment in I2C EEPROM. Fix the problem by explicitly starting the clock in I2C driver initialisation routine. Signed-off-by: Guennadi Liakhovetski <lg@denx.de> Ack-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-4/+4
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* i2c: Clean drivers/i2c/ MakefileMichal Simek2008-08-18-1/+1
| | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* add an i2c driver for mx31Sascha Hauer2008-04-13-0/+202
| | | | | | | This patch adds an i2c driver for Freescale i.MX processors Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
* Revert merge of git://www.denx.de/git/u-boot-arm, commit 62479b18:Wolfgang Denk2008-04-11-207/+0
| | | | | | | | | | | | | | | | | | | | | | Reverting became necessary after it turned out that the patches in the u-boot-arm repo were modified, and in some cases corrupted. This reverts the following commits: 066bebd6353e33af3adefc3404560871699e9961 7a837b7310166ae8fc8b8d66d7ef01b60a80f9d6 c88ae20580b2b01487b4cdcc8b2a113f551aee36 a147e56f03871bba4f05058d5e04ce7deb010b04 d6674e0e2a6a1f033945f78838566210d3f28c95 8c8463cce44d849e37744749b32d38e1dfb12e50 c98b47ad24b2d91f41c09a3d62d7f70ad84f4b7d 8bf69d81782619187933a605f1a95ee1d069478d 8c16cb0d3b971f46fbe77c072664c0f2dcd4471d a574a73852a527779234e73e17e7597fd8128882 1377b5583a48021d983e1fd565f7d40c89e84d63 1704dc20917b4f71e373e2c888497ee666d40380 Signed-off-by: Wolfgang Denk <wd@denx.de>
* add an i2c driver for mx31Sascha Hauer2008-03-30-0/+207
This patch adds an i2c driver for Freescale i.MX processors Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
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