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* drivers/i2c/fsl_i2c: modify i2c_read to handle multi-byte writeShaveta Leekha2014-04-29-7/+34
| | | | | | | | | | | | | | | | | | | | | | | | | Most of the I2C slaves support accesses in the typical style that is : read/write series of bytes at particular address offset. These transactions look like:" (1) START:Address:Tx:Offset:RESTART:Address[0..4]:Tx/Rx:data[0..n]:STOP" However there are certain devices which support accesses in terms of the transactions as follows: (2) "START:Address:Tx:Txdata[0..n1]:Clock_stretching: RESTART:Address:Rx:data[0..n2]" Here Txdata is typically a command and some associated data, similarly Rxdata could be command status plus some data received as a response to the command sent. Type (1) transactions are currently supportd in the i2c driver using i2c_read and i2c_write APIs. I2C EEPROMs, RTC, etc fall in this category. To handle type (2) along with type (1) transactions, i2c_read() function has been modified. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
* fsl_i2c: add workaround for the erratum I2C A004447Chunhe Lan2013-08-20-3/+11
| | | | | | | | | | | | | | | | | | | | | | | This workaround is for the erratum I2C A004447. Device reference manual provides a scheme that allows the I2C master controller to generate nine SCL pulses, which enable an I2C slave device that held SDA low to release SDA. However, due to this erratum, this scheme no longer works. In addition, when I2C is used as a source of the PBL, the state machine is not able to recover. At the same time, delete the reduplicative definition of SVR_VER and SVR_REV. The SVR_REV is the low 8 bits rather than the low 16 bits of svr. And we use the CONFIG_SYS_FSL_A004447_SVR_REV macro instead of hard-code value 0x10, 0x11 and 0x20. The CONFIG_SYS_FSL_A004447_SVR_REV = 0x00 represents that one version of platform has this I2C errata. So enable this errata by IS_SVR_REV(svr, maj, min) function. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Heiko Schocher <hs@denx.de>
* fsl_i2c: generate nine pulses on SCL if the I2C bus is hungChunhe Lan2013-08-20-2/+57
| | | | | | | | | | When the code detected that the bus is hung (e.g. SDA stuck low), send 9 pulses on SCL to try to fixup the bus. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Heiko Schocher <hs@denx.de>
* i2c, fsl_i2c: switch to new multibus/multiadapter supportHeiko Schocher2013-07-23-133/+85
| | | | | | | | | - added to fsl_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
* i2c: fsl_i2c: i2c_read(): dont try to write address w/ alen=0Reinhard Pfau2013-07-16-3/+6
| | | | | | | | | if alen is 0: no longer start a write cycle before reading data. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Andy Fleming <afleming@freescale.com>
* ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_dataSimon Glass2013-02-04-3/+4
| | | | | | | Move these fields into arch_global_data and tidy up. This is needed for both ppc and m68k since they share the i2c driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* drivers/i2c/fsl_i2c.c: sparse fixKim Phillips2012-10-25-1/+1
| | | | | | | fsl_i2c.c:217:14: warning: symbol 'get_i2c_clock' was not declared. Should it be static? Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Heiko Schocher <hs@denx.de>
* fsl_i2c: Fix compile warningKumar Gala2011-11-09-1/+1
| | | | | | | fsl_i2c.c: In function 'i2c_init': fsl_i2c.c:245:7: warning: assignment discards qualifiers from pointer target type Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Powerpc/i2c: Use the same initialize codesJerry Huang2011-11-04-22/+25
| | | | | | Make the I2C2 and I2C1 use the same initialize codes. Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
* fsl_i2c: Added a callpoint for i2c_board_late_initRichard Retanubun2010-04-19-3/+13
| | | | | | | This patch adds a callpoint in i2c_init that allows board specific i2c board initialization (typically for i2c bus reset) that is called after i2c_init operations, allowing the i2c_board_late_init function to use the pre-configured i2c bus speed and slave address.
* fsl_i2c: Do not generate STOP after read.Joakim Tjernlund2009-09-28-5/+6
| | | | | | | | | __i2c_read always ends with a STOP condition thereby releasing the bus. It is cleaner to do the STOP magic in i2c_read(), like i2c_write() does. This may also help future multimaster systems which wants to hold on to the bus until all transactions are finished. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* fsl_i2c: Impl. AN2919, rev 5 to calculate FDR/DFSRJoakim Tjernlund2009-09-28-35/+55
| | | | | | | | | The latest AN2919 has changed the way FDR/DFSR should be calculated. Update the driver according to spec. However, Condition 2 is not accounted for as it is not clear how to do so. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Wolfgang Grandegger <wg@grandegger.com>
* fsl_i2c: Add CONFIG_FSL_I2C_CUSTOM_{DFSR/FDR}Joakim Tjernlund2009-09-28-3/+11
| | | | | | | | | Some boards need a higher DFSR value than the spec currently recommends so give these boards the means to define there own. For completeness, add CONFIG_FSL_I2C_CUSTOM_FDR too. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* fsl_i2c: Wait for STOP condition to propagateJoakim Tjernlund2009-09-28-4/+8
| | | | | | | | | | | | | After issuing a STOP one must wait until the STOP has completed on the bus before doing something new to the controller. Also add an extra read of SR as the manual mentions doing that is a good idea. Remove surplus write of CR just before a write, isn't required and could potentially disturb the I2C bus. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
* fsl_i2c: increase I2C timeout values and make them configurableTimur Tabi2009-09-06-4/+20
| | | | | | | | | | | | | | | | The value of I2C_TIMEOUT in fsl_i2c.c has several problems. First, it is defined as CONFIG_HZ/4, but it is used as a count of microseconds, so it makes no sense to derive it from a clock rate. Second, the current value (250) is too low for some boards, so it needs to be increased. Third, the timeout necessary for multiple-master arbitration is larger than the timeout for basic read/write operations, so we shouldn't have a single constant for both timeouts. Finally, it would be nice if we could override these values on a per-board basis. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Wolfgang Denk <wd@denx.de> Tested-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Peter Tyser <ptyser@xes-inc.com>
* i2c, mpc83xx: add CONFIG_SYS_I2C_INIT_BOARD for fsl_i2cHeiko Schocher2009-07-21-0/+6
| | | | | | | | | | | | | | | | | | | | | | This patch adds the possibility to call a board specific i2c bus reset routine for the fsl_i2c bus driver, and adds this option for the keymile kmeter1 board. The deblock sequence for this board is implemented and tested in the following way: CR = 0x20 (release SDA and SCL pin) CR = 0xa0 (start read) dummy read dummy read if 2. dummy read == 0x00 3. dummy read CR = 0x80 (SDA and SCL now 1 SR = 0x86) CR = 0x00 (Modul reset SR=0x81) CR = 0x80 (SDA and SCL = 1, SR = 0x81) Signed-off-by: Heiko Schocher <hs@denx.de>
* 83xx, i2c: add mux support for fsl_i2cHeiko Schocher2009-03-05-1/+21
| | | | | | | | | | This patch adds I2C mux support for the fsl_i2c driver. This allows you to add "new" i2c busses, which are reached over i2c muxes. For more infos, please look in the README and search for CONFIG_I2C_MUX. Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* i2c: merge all i2c_reg_read() and i2c_reg_write() into inline functionsTimur Tabi2008-12-15-16/+0
| | | | | | | | | | All implementations of the functions i2c_reg_read() and i2c_reg_write() are identical. We can save space and simplify the code by converting these functions into inlines and putting them in i2c.h. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-By: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Section name should be ".data", not "data"Trent Piepho2008-12-09-4/+3
| | | | | Signed-off-by: Trent Piepho <tpiepho@freescale.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-11/+11
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Add I2C frequency dividers for ColdFireTsiChung Liew2008-08-28-1/+33
| | | | | | | | | | The existing I2C freqency dividers for FDR does not apply to ColdFire platforms; thus, a seperate table is added based on MCF5xxx Reference Manual Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com> Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com> Acked-by: Tabi Timur <timur@freescale.com>
* i2c: Clean drivers/i2c/ MakefileMichal Simek2008-08-18-2/+0
| | | | Signed-off-by: Michal Simek <monstr@monstr.eu>
* Fix merge problemsStefan Roese2008-08-06-7/+11
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* Fix warnings introduced by I2C bus speed setting patchKumar Gala2008-04-13-4/+3
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Add support for setting the I2C bus speed in fsl_i2c.cTimur Tabi2008-03-27-9/+105
| | | | | | | | | | Add support to the Freescale I2C driver (fsl_i2c.c) for setting and querying the I2C bus speed. Current 8[356]xx boards define the CFG_I2C_SPEED macro, but fsl_i2c.c ignores it and uses conservative value when programming the I2C bus speed. Signed-off-by: Timur Tabi <timur@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* drivers/i2c : move i2c drivers to drivers/i2cJean-Christophe PLAGNIOL-VILLARD2007-11-20-0/+295
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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