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* fpga: xilinx: Show fpga info if definedMichal Simek2015-01-21-4/+5
| | | | | | | Show fpga_op->info even if desc->iface_fns is not defined. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* fpga: xilinx: Check if fpga operations are definedMichal Simek2015-01-21-2/+15
| | | | | | | Ensure that operations are correctly setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* m68k: Fix warnings with gcc 4.6Simon Glass2014-06-11-3/+3
| | | | | | | | Most of the warnings seem to be related to using 'int' for size_t. Change this and fix up the remaining warnings and problems. For bootm, the warning was masked by others, and there is an actual bug in the code. Signed-off-by: Simon Glass <sjg@chromium.org>
* fpga: Added support to load bit stream from SD/MMCSiva Durga Prasad Paladugu2014-05-20-0/+16
| | | | | | | | | | | | Added support to load a bitstream image in chunks by reading it in chunks from SD/MMC. Command format: loadfs [dev] [address] [image size] [blocksize] <interface> [<dev[:part]>] <filename> Example: fpga loadfs 0 1000000 3dbafc 4000 mmc 0 fpga.bin Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: Define bitstream type based on command selectionMichal Simek2014-05-20-4/+6
| | | | | | | | | | Clean up partial, full and compressed bitstream handling. U-Boot supports full bitstream loading and partial based on detection which is not 100% correct. Extending fpga_load/fpga_loadbitstream() with one more argument which stores bitstream type. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: xilinx: Simplify load/dump/info function handlingMichal Simek2014-05-13-152/+7
| | | | | | | | Connect FPGA version with appropriate operations to remove huge switch-cases for every FPGA family. Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: xilinx: Avoid CamelCase for in Xilinx_descMichal Simek2014-05-13-7/+7
| | | | | | No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: virtex2: Avoid CamelCaseMichal Simek2014-05-13-7/+7
| | | | | | No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: spartan3: Avoid CamelCaseMichal Simek2014-05-13-7/+7
| | | | | | No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* fpga: spartan2: Avoid CamelCaseMichal Simek2014-05-13-7/+7
| | | | | | No functional changes. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-18/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* fpga: Check device name against bitstream nameMichal Simek2013-05-06-0/+23
| | | | | | | | Ensure that wrong bitstream won't be loaded to current device. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* fpga: zynq: Add support for loading bitstreamMichal Simek2013-05-06-0/+37
| | | | | | | | | | | | | Devcfg device requires to load bitstream in binary format. But u-boot also has an option for loading bitstream in bit format. Let's handle both cases by zynqpl driver. Also add suport for loading partial bitstreams. The first driver version was done by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* fpga: Change the first parameter in fpga_loadbitstreamMichal Simek2013-05-06-2/+2
| | | | | | | | | All fpga functions use devnum as int. Only fpga_loadbitstream is using it as unsinged long dev. This patch synchronize it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* cmd: fpga: Move fpga_loadbitstream to fpga.cMichal Simek2013-05-06-0/+86
| | | | | | | | | In bitstream decoding you can directly check device which you want to load and in fpga.c are fpga_validate and fpga_dev_info functions which should be used for it. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@ti.com>
* Consolidate bool typeYork Sun2013-04-01-2/+2
| | | | | | | | | | | | | 'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99. All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0. Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files. Signed-off-by: York Sun <yorksun@freescale.com>
* fpga: constify to fix build warningWolfgang Denk2011-08-01-2/+2
| | | | | | | | | | | | | | | Fix compiler warning: cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data' from incompatible pointer type Adding the needed 'const' here entails a whole bunch of additonal changes all over the FPGA code. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andre Schwarz <andre.schwarz@matrix-vision.de> Cc: Murray Jensen <Murray.Jensen@csiro.au> Acked-by: Andre Schwarz<andre.schwarz@matrix-vision.de>
* fpga: Remove relocation fixupsPeter Tyser2009-10-03-42/+0
| | | | | | | | PPC boards are the only users of the current FPGA code which is littered with manual relocation fixups. Now that proper relocation is supported for PPC boards, remove FPGA manual relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* FPGA: move fpga drivers to drivers/fpgaJean-Christophe PLAGNIOL-VILLARD2008-12-05-0/+307
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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