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* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-18/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* Consolidate bool typeYork Sun2013-04-01-30/+30
| | | | | | | | | | | | | 'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99. All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0. Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files. Signed-off-by: York Sun <yorksun@freescale.com>
* fpga: Spartan-3: let print the progress if configuredStefano Babic2012-01-05-1/+0
| | | | | | | | CONFIG_SYS_FPGA_PROG_FEEDBACK was already introduced to print the current status of FPGA loading - an undef in the code made this CONFIG_ useless. Signed-off-by: Stefano Babic <sbabic@denx.de>
* fpga: constify to fix build warningWolfgang Denk2011-08-01-12/+12
| | | | | | | | | | | | | | | Fix compiler warning: cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data' from incompatible pointer type Adding the needed 'const' here entails a whole bunch of additonal changes all over the FPGA code. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Andre Schwarz <andre.schwarz@matrix-vision.de> Cc: Murray Jensen <Murray.Jensen@csiro.au> Acked-by: Andre Schwarz<andre.schwarz@matrix-vision.de>
* add Xilinx_abort_fn to Xilinx_Spartan3_Slave_Serial_fnsWolfgang Wegner2010-11-30-0/+6
| | | | | | | | Currently the hardware was left in an undefined state in case Spartan3 serial load failed. This patch adds Xilinx_abort_fn to give the board a possibility to clean up in this case. Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
* add block write function to spartan3 slave serial loadWolfgang Wegner2010-03-24-25/+29
| | | | | | | | | | | Using seperate function calls for each bit-bang of slave serial load can be painfully slow. This patch adds the possibility to supply a block write function that loads the complete block of data in one call (like it can already be done with Altera FPGAs). On an MCF5373L (240 MHz) loading an XC3S4000 this reduces the load time from around 15 seconds to around 3 seconds Signed-off-by: Wolfgang Wegner <w.wegner at astro-kom.de>
* fpga: Remove relocation fixupsPeter Tyser2009-10-03-185/+0
| | | | | | | | PPC boards are the only users of the current FPGA code which is littered with manual relocation fixups. Now that proper relocation is supported for PPC boards, remove FPGA manual relocation. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* fpga: Fix Spartan III FPGA bootingMatthias Fuchs2009-02-21-15/+7
| | | | | | | | | | | | This patch does some minor fixing of the Xilinx Spartan III FPGA boot code: - Fixed call order of post configuration callback and success message printing (result of copy-paste?) - remove obsolete comment - minor coding style cleanup Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* FPGA: move fpga drivers to drivers/fpgaJean-Christophe PLAGNIOL-VILLARD2008-12-05-0/+668
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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