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path: root/drivers/ddr
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* drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.Purna Chandra Mandal2016-02-01-0/+497
* drivers/ddr/fsl: fsl_ddr_sdram_size remove unused controllersEd Swarthout2016-01-25-0/+1
* driver/ddr/fsl: Add workaround for A009663Shengzhou Liu2016-01-25-0/+10
* fsl/ddr: Add workaround for ERRATUM_A009942Shengzhou Liu2016-01-25-0/+18
* Add more SPDX-License-Identifier tagsTom Rini2016-01-19-30/+10
* ddr: altera: Init the rule ID in debug codeMarek Vasut2016-01-16-0/+1
* mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BITPhil Sutter2016-01-14-11/+11
* axp: Fix debugging support in DDR3 write levelingPhil Sutter2016-01-14-2/+2
* arm: mvebu: Make ECC support configurable on Armada XPStefan Roese2016-01-14-0/+8
* arm: mvebu: ddr: Fix compilation warningStefan Roese2016-01-14-17/+0
* move erratum a008336 and a008514 to soc specific fileYao Yuan2015-12-15-34/+0
* fsl/ddr: updated ddr errata-A008378 for arm and power SoCsShengzhou Liu2015-12-13-3/+6
* driver/ddr/fsl: Update timing config for heavy loadYork Sun2015-12-13-2/+24
* driver/ddr/fsl: Update workaround for A008511 for vref rangeYork Sun2015-12-13-7/+15
* driver/ddr/fsl: Update MR5 RTT parkYork Sun2015-12-13-4/+15
* driver/ddr/fsl: Update DDR4 MR6 for Vref rangeYork Sun2015-12-13-0/+3
* driver/ddr/fsl: Update DDR4 RTT valuesYork Sun2015-12-13-2/+235
* drivers/ddr/fsl: Fix typo in BIST test for DDR4York Sun2015-11-30-12/+12
* drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3York Sun2015-11-30-0/+41
* armv8: ls2085a: Add support of LS2085A SoCPrabhakar Kushwaha2015-11-30-2/+2
* armv8: LS2080A: Rename LS2085A to reflect LS2080APrabhakar Kushwaha2015-11-30-2/+2
* arm: mvebu: Fix SAR1_CPU_CORE_MASKDirk Eibach2015-11-17-5/+2
* arm: mvebu: a38x: Remove unsupported topologiesKevin Smith2015-11-17-77/+0
* Various Makefiles: Add SPDX-License-Identifier tagsTom Rini2015-11-10-3/+1
* drivers/ddr/fsl_ddr: Make SR_IE configurableJoakim Tjernlund2015-10-30-1/+1
* bitops: introduce BIT() definitionHeiko Schocher2015-09-11-2/+0
* ddr: altera: Repair uninited variableMarek Vasut2015-08-23-1/+1
* ddr: altera: Replace float multiplication with integer oneMarek Vasut2015-08-23-1/+1
* arm: mvebu: Add complete SDRAM ECC scrubbingStefan Roese2015-08-17-2/+2
* arm: mvebu: sdram: Enable ECC support on Armada XPStefan Roese2015-08-17-1/+1
* ddr: altera: sequencer: Clean checkpatch issuesMarek Vasut2015-08-08-71/+88
* ddr: altera: sequencer: Clean data typesMarek Vasut2015-08-08-48/+48
* ddr: altera: sequencer: Pluck out misc macros from codeMarek Vasut2015-08-08-22/+15
* ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VALMarek Vasut2015-08-08-49/+4
* ddr: altera: sequencer: Zap VFIFO_SIZEMarek Vasut2015-08-08-7/+4
* ddr: altera: sequencer: Wrap misc remaining macrosMarek Vasut2015-08-08-0/+2
* ddr: altera: sequencer: Pluck out IO_* macros from codeMarek Vasut2015-08-08-101/+100
* ddr: altera: sequencer: Wrap IO_* macrosMarek Vasut2015-08-08-0/+2
* ddr: altera: sequencer: Pluck out RW_MGR_* macros from codeMarek Vasut2015-08-08-154/+154
* ddr: altera: sequencer: Wrap RW_MGR_* macrosMarek Vasut2015-08-08-0/+4
* ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_initMarek Vasut2015-08-08-6/+8
* ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKSMarek Vasut2015-08-08-1/+0
* ddr: altera: sequencer: Zap unused params and macrosMarek Vasut2015-08-08-75/+5
* ddr: altera: sequencer: Move qts-generated files to board dirMarek Vasut2015-08-08-605/+9
* ddr: altera: sdram: Make sdram_start and sdram_end into u32Marek Vasut2015-08-08-11/+12
* ddr: altera: sdram: Minor cleanup in sdram_get_rule()Marek Vasut2015-08-08-4/+4
* ddr: altera: sdram: Minor cleanup in sdram_set_rule()Marek Vasut2015-08-08-4/+4
* ddr: altera: sdram: Add missing kerneldocMarek Vasut2015-08-08-0/+12
* ddr: altera: sdram: Clean up sdram_write_verify()Marek Vasut2015-08-08-25/+26
* ddr: altera: sdram: Clean up sdram_calculate_size() part 2Marek Vasut2015-08-08-23/+12
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