| Commit message (Collapse) | Author | Age | Lines |
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The offset of module information is at 128, different from DDR3.
Signed-off-by: York Sun <yorksun@freescale.com>
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This makes it clear where the code resides.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move the CLI prototypes from common.h to cli.h as part of an effort to
reduce the size of common.h.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register
calculation and programming.
Signed-off-by: York Sun <yorksun@freescale.com>
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Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.
Signed-off-by: York Sun <yorksun@freescale.com>
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